nslu2_machdep.c revision 1.23 1 1.23 skrll /* $NetBSD: nslu2_machdep.c,v 1.23 2012/11/12 18:00:39 skrll Exp $ */
2 1.1 scw
3 1.1 scw /*-
4 1.1 scw * Copyright (c) 2006 The NetBSD Foundation, Inc.
5 1.1 scw * All rights reserved.
6 1.1 scw *
7 1.1 scw * This code is derived from software contributed to The NetBSD Foundation
8 1.1 scw * by Steve C. Woodford.
9 1.1 scw *
10 1.1 scw * Redistribution and use in source and binary forms, with or without
11 1.1 scw * modification, are permitted provided that the following conditions
12 1.1 scw * are met:
13 1.1 scw * 1. Redistributions of source code must retain the above copyright
14 1.1 scw * notice, this list of conditions and the following disclaimer.
15 1.1 scw * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 scw * notice, this list of conditions and the following disclaimer in the
17 1.1 scw * documentation and/or other materials provided with the distribution.
18 1.1 scw *
19 1.1 scw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 scw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 scw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 scw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 scw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 scw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 scw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 scw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 scw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 scw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 scw * POSSIBILITY OF SUCH DAMAGE.
30 1.1 scw */
31 1.1 scw /*
32 1.1 scw * Copyright (c) 2003
33 1.1 scw * Ichiro FUKUHARA <ichiro (at) ichiro.org>.
34 1.1 scw * All rights reserved.
35 1.1 scw *
36 1.1 scw * Redistribution and use in source and binary forms, with or without
37 1.1 scw * modification, are permitted provided that the following conditions
38 1.1 scw * are met:
39 1.1 scw * 1. Redistributions of source code must retain the above copyright
40 1.1 scw * notice, this list of conditions and the following disclaimer.
41 1.1 scw * 2. Redistributions in binary form must reproduce the above copyright
42 1.1 scw * notice, this list of conditions and the following disclaimer in the
43 1.1 scw * documentation and/or other materials provided with the distribution.
44 1.1 scw *
45 1.1 scw * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
46 1.1 scw * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
47 1.1 scw * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
48 1.1 scw * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
49 1.1 scw * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 1.1 scw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51 1.1 scw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 1.1 scw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 1.1 scw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 1.1 scw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
55 1.1 scw * SUCH DAMAGE.
56 1.1 scw */
57 1.1 scw /*
58 1.1 scw * Copyright (c) 1997,1998 Mark Brinicombe.
59 1.1 scw * Copyright (c) 1997,1998 Causality Limited.
60 1.1 scw * All rights reserved.
61 1.1 scw *
62 1.1 scw * Redistribution and use in source and binary forms, with or without
63 1.1 scw * modification, are permitted provided that the following conditions
64 1.1 scw * are met:
65 1.1 scw * 1. Redistributions of source code must retain the above copyright
66 1.1 scw * notice, this list of conditions and the following disclaimer.
67 1.1 scw * 2. Redistributions in binary form must reproduce the above copyright
68 1.1 scw * notice, this list of conditions and the following disclaimer in the
69 1.1 scw * documentation and/or other materials provided with the distribution.
70 1.1 scw * 3. All advertising materials mentioning features or use of this software
71 1.1 scw * must display the following acknowledgement:
72 1.1 scw * This product includes software developed by Mark Brinicombe
73 1.1 scw * for the NetBSD Project.
74 1.1 scw * 4. The name of the company nor the name of the author may be used to
75 1.1 scw * endorse or promote products derived from this software without specific
76 1.1 scw * prior written permission.
77 1.1 scw *
78 1.1 scw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
79 1.1 scw * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
80 1.1 scw * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
81 1.1 scw * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
82 1.1 scw * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
83 1.1 scw * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
84 1.1 scw * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
85 1.1 scw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
86 1.1 scw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
87 1.1 scw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
88 1.1 scw * SUCH DAMAGE.
89 1.1 scw */
90 1.1 scw
91 1.1 scw /*
92 1.18 wiz * Machine dependent functions for kernel setup for Linksys NSLU2
93 1.1 scw * using RedBoot firmware.
94 1.1 scw */
95 1.1 scw
96 1.1 scw #include <sys/cdefs.h>
97 1.23 skrll __KERNEL_RCSID(0, "$NetBSD: nslu2_machdep.c,v 1.23 2012/11/12 18:00:39 skrll Exp $");
98 1.1 scw
99 1.1 scw #include "opt_ddb.h"
100 1.1 scw #include "opt_kgdb.h"
101 1.1 scw #include "opt_pmap_debug.h"
102 1.1 scw
103 1.1 scw #include <sys/param.h>
104 1.1 scw #include <sys/device.h>
105 1.1 scw #include <sys/systm.h>
106 1.1 scw #include <sys/kernel.h>
107 1.1 scw #include <sys/exec.h>
108 1.1 scw #include <sys/proc.h>
109 1.1 scw #include <sys/msgbuf.h>
110 1.1 scw #include <sys/reboot.h>
111 1.1 scw #include <sys/termios.h>
112 1.1 scw #include <sys/ksyms.h>
113 1.1 scw
114 1.1 scw #include <uvm/uvm_extern.h>
115 1.1 scw
116 1.1 scw #include <dev/cons.h>
117 1.1 scw
118 1.1 scw #include <machine/db_machdep.h>
119 1.1 scw #include <ddb/db_sym.h>
120 1.1 scw #include <ddb/db_extern.h>
121 1.1 scw
122 1.1 scw #include <machine/bootconfig.h>
123 1.19 dyoung #include <sys/bus.h>
124 1.1 scw #include <machine/cpu.h>
125 1.1 scw #include <machine/frame.h>
126 1.1 scw #include <arm/undefined.h>
127 1.1 scw
128 1.1 scw #include <arm/arm32/machdep.h>
129 1.1 scw
130 1.1 scw #include <arm/xscale/ixp425reg.h>
131 1.1 scw #include <arm/xscale/ixp425var.h>
132 1.1 scw #include <arm/xscale/ixp425_sipvar.h>
133 1.1 scw
134 1.1 scw #include <evbarm/nslu2/nslu2reg.h>
135 1.1 scw
136 1.1 scw #include "com.h"
137 1.1 scw #if NCOM > 0
138 1.1 scw #include <dev/ic/comreg.h>
139 1.1 scw #include <dev/ic/comvar.h>
140 1.1 scw #endif
141 1.1 scw
142 1.1 scw #include "ksyms.h"
143 1.1 scw
144 1.1 scw /* Kernel text starts 2MB in from the bottom of the kernel address space. */
145 1.1 scw #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
146 1.1 scw #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
147 1.1 scw
148 1.1 scw /*
149 1.1 scw * The range 0xc1000000 - 0xccffffff is available for kernel VM space
150 1.1 scw * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
151 1.1 scw */
152 1.1 scw #define KERNEL_VM_SIZE 0x0C000000
153 1.1 scw
154 1.1 scw BootConfig bootconfig; /* Boot config storage */
155 1.1 scw char *boot_args = NULL;
156 1.1 scw char *boot_file = NULL;
157 1.1 scw
158 1.1 scw vm_offset_t physical_start;
159 1.1 scw vm_offset_t physical_freestart;
160 1.1 scw vm_offset_t physical_freeend;
161 1.1 scw vm_offset_t physical_end;
162 1.1 scw u_int free_pages;
163 1.1 scw
164 1.1 scw /* Physical and virtual addresses for some global pages */
165 1.1 scw pv_addr_t minidataclean;
166 1.1 scw
167 1.1 scw vm_offset_t msgbufphys;
168 1.1 scw
169 1.1 scw extern int end;
170 1.1 scw
171 1.1 scw #ifdef PMAP_DEBUG
172 1.1 scw extern int pmap_debug_level;
173 1.1 scw #endif
174 1.1 scw
175 1.1 scw #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
176 1.1 scw
177 1.1 scw #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
178 1.1 scw #define KERNEL_PT_KERNEL_NUM 4
179 1.1 scw #define KERNEL_PT_IO (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
180 1.1 scw /* L2 tables for mapping kernel VM */
181 1.1 scw #define KERNEL_PT_VMDATA (KERNEL_PT_IO + 1)
182 1.1 scw #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
183 1.1 scw #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
184 1.1 scw
185 1.1 scw pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
186 1.1 scw
187 1.1 scw /* Prototypes */
188 1.1 scw
189 1.1 scw void consinit(void);
190 1.11 dsl u_int cpu_get_control(void);
191 1.1 scw
192 1.1 scw /*
193 1.1 scw * Define the default console speed for the board. This is generally
194 1.1 scw * what the firmware provided with the board defaults to.
195 1.1 scw */
196 1.1 scw #ifndef CONSPEED
197 1.1 scw #define CONSPEED B115200
198 1.1 scw #endif /* ! CONSPEED */
199 1.1 scw
200 1.1 scw #ifndef CONUNIT
201 1.1 scw #define CONUNIT 0
202 1.1 scw #endif
203 1.1 scw
204 1.1 scw #ifndef CONMODE
205 1.1 scw #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB)) | CS8) /* 8N1 */
206 1.1 scw #endif
207 1.1 scw
208 1.1 scw int comcnspeed = CONSPEED;
209 1.1 scw int comcnmode = CONMODE;
210 1.1 scw int comcnunit = CONUNIT;
211 1.1 scw
212 1.1 scw #if KGDB
213 1.1 scw #ifndef KGDB_DEVNAME
214 1.1 scw #error Must define KGDB_DEVNAME
215 1.1 scw #endif
216 1.1 scw const char kgdb_devname[] = KGDB_DEVNAME;
217 1.1 scw
218 1.1 scw #ifndef KGDB_DEVADDR
219 1.1 scw #error Must define KGDB_DEVADDR
220 1.1 scw #endif
221 1.1 scw unsigned long kgdb_devaddr = KGDB_DEVADDR;
222 1.1 scw
223 1.1 scw #ifndef KGDB_DEVRATE
224 1.1 scw #define KGDB_DEVRATE CONSPEED
225 1.1 scw #endif
226 1.1 scw int kgdb_devrate = KGDB_DEVRATE;
227 1.1 scw
228 1.1 scw #ifndef KGDB_DEVMODE
229 1.1 scw #define KGDB_DEVMODE CONMODE
230 1.1 scw #endif
231 1.1 scw int kgdb_devmode = KGDB_DEVMODE;
232 1.1 scw #endif /* KGDB */
233 1.1 scw
234 1.1 scw /*
235 1.1 scw * void cpu_reboot(int howto, char *bootstr)
236 1.1 scw *
237 1.1 scw * Reboots the system
238 1.1 scw *
239 1.1 scw * Deal with any syncing, unmounting, dumping and shutdown hooks,
240 1.1 scw * then reset the CPU.
241 1.1 scw */
242 1.1 scw void
243 1.1 scw cpu_reboot(int howto, char *bootstr)
244 1.1 scw {
245 1.1 scw
246 1.1 scw #ifdef DIAGNOSTIC
247 1.1 scw /* info */
248 1.1 scw printf("boot: howto=%08x curproc=%p\n", howto, curproc);
249 1.1 scw #endif
250 1.1 scw
251 1.1 scw /*
252 1.1 scw * If we are still cold then hit the air brakes
253 1.1 scw * and crash to earth fast
254 1.1 scw */
255 1.1 scw if (cold) {
256 1.1 scw doshutdownhooks();
257 1.8 dyoung pmf_system_shutdown(boothowto);
258 1.1 scw printf("The operating system has halted.\n");
259 1.1 scw printf("Please press any key to reboot.\n\n");
260 1.1 scw cngetc();
261 1.1 scw goto reset;
262 1.1 scw }
263 1.1 scw
264 1.1 scw /* Disable console buffering */
265 1.1 scw
266 1.1 scw /*
267 1.1 scw * If RB_NOSYNC was not specified sync the discs.
268 1.1 scw * Note: Unless cold is set to 1 here, syslogd will die during the
269 1.1 scw * unmount. It looks like syslogd is getting woken up only to find
270 1.1 scw * that it cannot page part of the binary in as the filesystem has
271 1.1 scw * been unmounted.
272 1.1 scw */
273 1.1 scw if (!(howto & RB_NOSYNC))
274 1.1 scw bootsync();
275 1.1 scw
276 1.1 scw /* Say NO to interrupts */
277 1.1 scw splhigh();
278 1.1 scw
279 1.1 scw /* Do a dump if requested. */
280 1.1 scw if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
281 1.1 scw dumpsys();
282 1.1 scw
283 1.1 scw /* Run any shutdown hooks */
284 1.1 scw doshutdownhooks();
285 1.1 scw
286 1.8 dyoung pmf_system_shutdown(boothowto);
287 1.8 dyoung
288 1.1 scw /* Make sure IRQ's are disabled */
289 1.1 scw IRQdisable;
290 1.1 scw
291 1.2 scw if ((howto & (RB_HALT | RB_POWERDOWN)) == RB_HALT) {
292 1.1 scw printf("The operating system has halted.\n");
293 1.2 scw printf("Please press any key to reboot.\n\n");
294 1.1 scw cngetc();
295 1.1 scw }
296 1.1 scw
297 1.1 scw reset:
298 1.1 scw /*
299 1.1 scw * Make really really sure that all interrupts are disabled,
300 1.1 scw */
301 1.1 scw (void) disable_interrupts(I32_bit | F32_bit);
302 1.1 scw
303 1.1 scw if (howto & RB_POWERDOWN) {
304 1.1 scw uint32_t reg;
305 1.1 scw
306 1.1 scw printf("powering down...\n\r");
307 1.1 scw /* Delay to allow the UART's Tx FIFO to drain */
308 1.1 scw delay(50000);
309 1.1 scw
310 1.1 scw #define GPRD(r) *((volatile uint32_t *)(IXP425_GPIO_VBASE+(r)))
311 1.1 scw #define GPWR(r,v) *((volatile uint32_t *)(IXP425_GPIO_VBASE+(r))) = (v)
312 1.1 scw
313 1.1 scw /*
314 1.1 scw * Power-down pin requires a short pulse
315 1.1 scw */
316 1.1 scw reg = GPRD(IXP425_GPIO_GPOUTR);
317 1.1 scw reg |= 1u << GPIO_POWER_OFF;
318 1.1 scw GPWR(IXP425_GPIO_GPOUTR, reg);
319 1.1 scw
320 1.1 scw delay(1000);
321 1.1 scw
322 1.1 scw reg = GPRD(IXP425_GPIO_GPOUTR);
323 1.1 scw reg &= ~(1u << GPIO_POWER_OFF);
324 1.1 scw GPWR(IXP425_GPIO_GPOUTR, reg);
325 1.1 scw
326 1.1 scw delay(500000);
327 1.1 scw printf("POWER OFF FAILED! TRYING TO REBOOT INSTEAD\n\r");
328 1.1 scw }
329 1.1 scw
330 1.1 scw printf("rebooting...\n\r");
331 1.1 scw
332 1.4 scw #define WDWR(r,v) *((volatile uint32_t *)(IXP425_OST_WDOG_VBASE+(r))) = (v)
333 1.1 scw /* Force a watchdog reset */
334 1.1 scw WDWR(IXP425_OST_WDOG_KEY, OST_WDOG_KEY_MAJICK);
335 1.1 scw WDWR(IXP425_OST_WDOG_ENAB, OST_WDOG_ENAB_RST_ENA);
336 1.1 scw WDWR(IXP425_OST_WDOG, 0x1000);
337 1.1 scw WDWR(IXP425_OST_WDOG_ENAB,
338 1.1 scw OST_WDOG_ENAB_RST_ENA | OST_WDOG_ENAB_CNT_ENA);
339 1.1 scw
340 1.1 scw delay(500000);
341 1.1 scw
342 1.1 scw /* ...and if that didn't work, just croak. */
343 1.1 scw printf("RESET FAILED!\n");
344 1.1 scw
345 1.1 scw for (;;);
346 1.1 scw }
347 1.1 scw
348 1.1 scw /* Static device mappings. */
349 1.1 scw static const struct pmap_devmap nslu2_devmap[] = {
350 1.1 scw /* Physical/Virtual address for I/O space */
351 1.1 scw {
352 1.1 scw IXP425_IO_VBASE,
353 1.1 scw IXP425_IO_HWBASE,
354 1.1 scw IXP425_IO_SIZE,
355 1.1 scw VM_PROT_READ|VM_PROT_WRITE,
356 1.1 scw PTE_NOCACHE,
357 1.1 scw },
358 1.1 scw
359 1.1 scw /* Expansion Bus */
360 1.1 scw {
361 1.1 scw IXP425_EXP_VBASE,
362 1.1 scw IXP425_EXP_HWBASE,
363 1.1 scw IXP425_EXP_SIZE,
364 1.1 scw VM_PROT_READ|VM_PROT_WRITE,
365 1.1 scw PTE_NOCACHE,
366 1.1 scw },
367 1.1 scw
368 1.1 scw /* IXP425 PCI Configuration */
369 1.1 scw {
370 1.1 scw IXP425_PCI_VBASE,
371 1.1 scw IXP425_PCI_HWBASE,
372 1.1 scw IXP425_PCI_SIZE,
373 1.1 scw VM_PROT_READ|VM_PROT_WRITE,
374 1.1 scw PTE_NOCACHE,
375 1.1 scw },
376 1.1 scw
377 1.1 scw /* SDRAM Controller */
378 1.1 scw {
379 1.1 scw IXP425_MCU_VBASE,
380 1.1 scw IXP425_MCU_HWBASE,
381 1.1 scw IXP425_MCU_SIZE,
382 1.1 scw VM_PROT_READ|VM_PROT_WRITE,
383 1.1 scw PTE_NOCACHE,
384 1.1 scw },
385 1.1 scw
386 1.1 scw /* PCI Memory Space */
387 1.1 scw {
388 1.1 scw IXP425_PCI_MEM_VBASE,
389 1.1 scw IXP425_PCI_MEM_HWBASE,
390 1.1 scw IXP425_PCI_MEM_SIZE,
391 1.1 scw VM_PROT_READ|VM_PROT_WRITE,
392 1.1 scw PTE_NOCACHE,
393 1.1 scw },
394 1.1 scw
395 1.1 scw /* Flash memory */
396 1.1 scw {
397 1.1 scw NSLU2_FLASH_VBASE,
398 1.1 scw NSLU2_FLASH_HWBASE,
399 1.1 scw NSLU2_FLASH_SIZE,
400 1.1 scw VM_PROT_READ|VM_PROT_WRITE,
401 1.1 scw PTE_NOCACHE,
402 1.1 scw },
403 1.1 scw
404 1.1 scw {
405 1.1 scw 0,
406 1.1 scw 0,
407 1.1 scw 0,
408 1.1 scw 0,
409 1.1 scw 0,
410 1.1 scw }
411 1.1 scw };
412 1.1 scw
413 1.1 scw /*
414 1.1 scw * u_int initarm(...)
415 1.1 scw *
416 1.1 scw * Initial entry point on startup. This gets called before main() is
417 1.1 scw * entered.
418 1.1 scw * It should be responsible for setting up everything that must be
419 1.1 scw * in place when main is called.
420 1.1 scw * This includes
421 1.1 scw * Taking a copy of the boot configuration structure.
422 1.1 scw * Initialising the physical console so characters can be printed.
423 1.1 scw * Setting up page tables for the kernel
424 1.1 scw * Relocating the kernel to the bottom of physical memory
425 1.1 scw */
426 1.1 scw u_int
427 1.1 scw initarm(void *arg)
428 1.1 scw {
429 1.1 scw extern vaddr_t xscale_cache_clean_addr;
430 1.1 scw #ifdef DIAGNOSTIC
431 1.1 scw extern vsize_t xscale_minidata_clean_size;
432 1.1 scw #endif
433 1.1 scw int loop;
434 1.1 scw int loop1;
435 1.1 scw u_int kerneldatasize;
436 1.1 scw u_int l1pagetable;
437 1.1 scw u_int freemempos;
438 1.1 scw uint32_t reg;
439 1.1 scw
440 1.1 scw /*
441 1.1 scw * Make sure the power-down GPIO pin is configured correctly, as
442 1.1 scw * cpu_reboot() may be called early on (e.g. from within ddb(9)).
443 1.1 scw */
444 1.1 scw /* Pin is active-high, so make sure it's driven low */
445 1.1 scw reg = GPRD(IXP425_GPIO_GPOUTR);
446 1.1 scw reg &= ~(1u << GPIO_POWER_OFF);
447 1.1 scw GPWR(IXP425_GPIO_GPOUTR, reg);
448 1.1 scw
449 1.1 scw /* Set as output */
450 1.1 scw reg = GPRD(IXP425_GPIO_GPOER);
451 1.1 scw reg &= ~(1u << GPIO_POWER_OFF);
452 1.1 scw GPWR(IXP425_GPIO_GPOER, reg);
453 1.1 scw
454 1.1 scw /*
455 1.1 scw * Since we map v0xf0000000 == p0xc8000000, it's possible for
456 1.1 scw * us to initialize the console now.
457 1.1 scw */
458 1.1 scw consinit();
459 1.1 scw
460 1.1 scw #ifdef VERBOSE_INIT_ARM
461 1.1 scw /* Talk to the user */
462 1.1 scw printf("\nNetBSD/evbarm (Linksys NSLU2) booting ...\n");
463 1.1 scw #endif
464 1.1 scw
465 1.1 scw /*
466 1.1 scw * Heads up ... Setup the CPU / MMU / TLB functions
467 1.1 scw */
468 1.1 scw if (set_cpufuncs())
469 1.1 scw panic("cpu not recognized!");
470 1.1 scw
471 1.1 scw /* XXX overwrite bootconfig to hardcoded values */
472 1.1 scw bootconfig.dramblocks = 1;
473 1.1 scw bootconfig.dram[0].address = 0x10000000;
474 1.1 scw bootconfig.dram[0].pages = ixp425_sdram_size() / PAGE_SIZE;
475 1.1 scw
476 1.23 skrll kerneldatasize = (uint32_t)&end - (uint32_t)KERNEL_TEXT_BASE;
477 1.1 scw
478 1.1 scw #ifdef VERBOSE_INIT_ARM
479 1.1 scw printf("kernsize=0x%x\n", kerneldatasize);
480 1.1 scw #endif
481 1.1 scw kerneldatasize = ((kerneldatasize - 1) & ~(PAGE_SIZE * 4 - 1)) + PAGE_SIZE * 8;
482 1.1 scw
483 1.1 scw /*
484 1.1 scw * Set up the variables that define the availablilty of
485 1.1 scw * physical memory. For now, we're going to set
486 1.1 scw * physical_freestart to 0x10200000 (where the kernel
487 1.1 scw * was loaded), and allocate the memory we need downwards.
488 1.1 scw * If we get too close to the L1 table that we set up, we
489 1.1 scw * will panic. We will update physical_freestart and
490 1.1 scw * physical_freeend later to reflect what pmap_bootstrap()
491 1.1 scw * wants to see.
492 1.1 scw *
493 1.1 scw * XXX pmap_bootstrap() needs an enema.
494 1.1 scw */
495 1.1 scw physical_start = bootconfig.dram[0].address;
496 1.1 scw physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
497 1.1 scw
498 1.1 scw physical_freestart = physical_start
499 1.1 scw + (KERNEL_TEXT_BASE - KERNEL_BASE) + kerneldatasize;
500 1.1 scw physical_freeend = physical_end;
501 1.1 scw
502 1.1 scw physmem = (physical_end - physical_start) / PAGE_SIZE;
503 1.1 scw
504 1.1 scw /* Tell the user about the memory */
505 1.1 scw #ifdef VERBOSE_INIT_ARM
506 1.1 scw printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
507 1.1 scw physical_start, physical_end - 1);
508 1.1 scw
509 1.1 scw printf("Allocating page tables\n");
510 1.1 scw #endif
511 1.1 scw free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
512 1.1 scw
513 1.1 scw freemempos = 0x10000000;
514 1.1 scw
515 1.1 scw #ifdef VERBOSE_INIT_ARM
516 1.1 scw printf("physical_start = 0x%08lx, physical_end = 0x%08lx\n",
517 1.1 scw physical_start, physical_end);
518 1.1 scw #endif
519 1.1 scw
520 1.1 scw /* Define a macro to simplify memory allocation */
521 1.1 scw #define valloc_pages(var, np) \
522 1.1 scw alloc_pages((var).pv_pa, (np)); \
523 1.1 scw (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
524 1.1 scw
525 1.1 scw #if 0
526 1.1 scw #define alloc_pages(var, np) \
527 1.1 scw physical_freeend -= ((np) * PAGE_SIZE); \
528 1.1 scw if (physical_freeend < physical_freestart) \
529 1.1 scw panic("initarm: out of memory"); \
530 1.1 scw (var) = physical_freeend; \
531 1.1 scw free_pages -= (np); \
532 1.1 scw memset((char *)(var), 0, ((np) * PAGE_SIZE));
533 1.1 scw #else
534 1.1 scw #define alloc_pages(var, np) \
535 1.1 scw (var) = freemempos; \
536 1.1 scw memset((char *)(var), 0, ((np) * PAGE_SIZE)); \
537 1.1 scw freemempos += (np) * PAGE_SIZE;
538 1.1 scw #endif
539 1.1 scw
540 1.1 scw loop1 = 0;
541 1.1 scw for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
542 1.1 scw /* Are we 16KB aligned for an L1 ? */
543 1.1 scw if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
544 1.1 scw && kernel_l1pt.pv_pa == 0) {
545 1.1 scw valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
546 1.1 scw } else {
547 1.1 scw valloc_pages(kernel_pt_table[loop1],
548 1.1 scw L2_TABLE_SIZE / PAGE_SIZE);
549 1.1 scw ++loop1;
550 1.1 scw }
551 1.1 scw }
552 1.1 scw
553 1.1 scw /* This should never be able to happen but better confirm that. */
554 1.1 scw if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
555 1.1 scw panic("initarm: Failed to align the kernel page directory");
556 1.1 scw
557 1.1 scw /*
558 1.1 scw * Allocate a page for the system page.
559 1.1 scw * This page will just contain the system vectors and can be
560 1.1 scw * shared by all processes.
561 1.1 scw */
562 1.1 scw alloc_pages(systempage.pv_pa, 1);
563 1.1 scw
564 1.1 scw /* Allocate stacks for all modes */
565 1.1 scw valloc_pages(irqstack, IRQ_STACK_SIZE);
566 1.1 scw valloc_pages(abtstack, ABT_STACK_SIZE);
567 1.1 scw valloc_pages(undstack, UND_STACK_SIZE);
568 1.1 scw valloc_pages(kernelstack, UPAGES);
569 1.1 scw
570 1.1 scw /* Allocate enough pages for cleaning the Mini-Data cache. */
571 1.1 scw KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
572 1.1 scw valloc_pages(minidataclean, 1);
573 1.1 scw
574 1.1 scw #ifdef VERBOSE_INIT_ARM
575 1.1 scw printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
576 1.1 scw irqstack.pv_va);
577 1.1 scw printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
578 1.1 scw abtstack.pv_va);
579 1.1 scw printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
580 1.1 scw undstack.pv_va);
581 1.1 scw printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
582 1.1 scw kernelstack.pv_va);
583 1.1 scw #endif
584 1.1 scw
585 1.1 scw /*
586 1.1 scw * XXX Defer this to later so that we can reclaim the memory
587 1.1 scw * XXX used by the RedBoot page tables.
588 1.1 scw */
589 1.1 scw alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
590 1.1 scw
591 1.1 scw /*
592 1.1 scw * Ok we have allocated physical pages for the primary kernel
593 1.1 scw * page tables
594 1.1 scw */
595 1.1 scw
596 1.1 scw #ifdef VERBOSE_INIT_ARM
597 1.1 scw printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
598 1.1 scw #endif
599 1.1 scw
600 1.1 scw /*
601 1.1 scw * Now we start construction of the L1 page table
602 1.1 scw * We start by mapping the L2 page tables into the L1.
603 1.1 scw * This means that we can replace L1 mappings later on if necessary
604 1.1 scw */
605 1.1 scw l1pagetable = kernel_l1pt.pv_pa;
606 1.1 scw
607 1.1 scw /* Map the L2 pages tables in the L1 page table */
608 1.1 scw pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
609 1.1 scw &kernel_pt_table[KERNEL_PT_SYS]);
610 1.1 scw for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
611 1.1 scw pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
612 1.1 scw &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
613 1.1 scw for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
614 1.1 scw pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
615 1.1 scw &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
616 1.1 scw
617 1.1 scw /* update the top of the kernel VM */
618 1.1 scw pmap_curmaxkvaddr =
619 1.1 scw KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
620 1.1 scw
621 1.1 scw pmap_link_l2pt(l1pagetable, IXP425_IO_VBASE,
622 1.1 scw &kernel_pt_table[KERNEL_PT_IO]);
623 1.1 scw
624 1.1 scw #ifdef VERBOSE_INIT_ARM
625 1.1 scw printf("Mapping kernel\n");
626 1.1 scw #endif
627 1.1 scw
628 1.1 scw /* Now we fill in the L2 pagetable for the kernel static code/data */
629 1.1 scw {
630 1.1 scw extern char etext[], _end[];
631 1.1 scw size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
632 1.1 scw size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
633 1.1 scw u_int logical;
634 1.1 scw
635 1.1 scw textsize = (textsize + PGOFSET) & ~PGOFSET;
636 1.1 scw totalsize = (totalsize + PGOFSET) & ~PGOFSET;
637 1.1 scw
638 1.1 scw logical = 0x00200000; /* offset of kernel in RAM */
639 1.1 scw
640 1.1 scw logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
641 1.1 scw physical_start + logical, textsize,
642 1.1 scw VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
643 1.1 scw logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
644 1.1 scw physical_start + logical, totalsize - textsize,
645 1.1 scw VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
646 1.1 scw }
647 1.1 scw
648 1.1 scw #ifdef VERBOSE_INIT_ARM
649 1.1 scw printf("Constructing L2 page tables\n");
650 1.1 scw #endif
651 1.1 scw
652 1.1 scw /* Map the stack pages */
653 1.1 scw pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
654 1.1 scw IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
655 1.1 scw pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
656 1.1 scw ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
657 1.1 scw pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
658 1.1 scw UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
659 1.1 scw pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
660 1.1 scw UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
661 1.1 scw
662 1.1 scw pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
663 1.1 scw L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
664 1.1 scw
665 1.1 scw for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
666 1.1 scw pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
667 1.1 scw kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
668 1.1 scw VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
669 1.1 scw }
670 1.1 scw
671 1.1 scw /* Map the Mini-Data cache clean area. */
672 1.1 scw xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
673 1.1 scw minidataclean.pv_pa);
674 1.1 scw
675 1.1 scw /* Map the vector page. */
676 1.1 scw pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
677 1.1 scw VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
678 1.1 scw
679 1.1 scw /*
680 1.1 scw * Map the IXP425 registers
681 1.1 scw */
682 1.1 scw pmap_devmap_bootstrap(l1pagetable, nslu2_devmap);
683 1.1 scw
684 1.1 scw /*
685 1.1 scw * Give the XScale global cache clean code an appropriately
686 1.1 scw * sized chunk of unmapped VA space starting at 0xff000000
687 1.1 scw * (our device mappings end before this address).
688 1.1 scw */
689 1.1 scw xscale_cache_clean_addr = 0xff000000U;
690 1.1 scw
691 1.1 scw /*
692 1.1 scw * Now we have the real page tables in place so we can switch to them.
693 1.1 scw * Once this is done we will be running with the REAL kernel page
694 1.1 scw * tables.
695 1.1 scw */
696 1.1 scw
697 1.1 scw /*
698 1.1 scw * Update the physical_freestart/physical_freeend/free_pages
699 1.1 scw * variables.
700 1.1 scw */
701 1.1 scw {
702 1.1 scw extern char _end[];
703 1.1 scw
704 1.1 scw physical_freestart = physical_start +
705 1.1 scw (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
706 1.1 scw KERNEL_BASE);
707 1.1 scw physical_freeend = physical_end;
708 1.1 scw free_pages =
709 1.1 scw (physical_freeend - physical_freestart) / PAGE_SIZE;
710 1.1 scw }
711 1.1 scw
712 1.1 scw /* Switch tables */
713 1.1 scw #ifdef VERBOSE_INIT_ARM
714 1.1 scw printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
715 1.1 scw physical_freestart, free_pages, free_pages);
716 1.1 scw printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
717 1.1 scw #endif
718 1.1 scw cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
719 1.22 matt cpu_setttb(kernel_l1pt.pv_pa, true);
720 1.1 scw cpu_tlb_flushID();
721 1.1 scw cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
722 1.1 scw
723 1.1 scw /*
724 1.1 scw * Moved from cpu_startup() as data_abort_handler() references
725 1.1 scw * this during uvm init
726 1.1 scw */
727 1.15 rmind uvm_lwp_setuarea(&lwp0, kernelstack.pv_va);
728 1.1 scw
729 1.1 scw #ifdef VERBOSE_INIT_ARM
730 1.1 scw printf("bootstrap done.\n");
731 1.1 scw #endif
732 1.1 scw
733 1.1 scw arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
734 1.1 scw
735 1.1 scw /*
736 1.1 scw * Pages were allocated during the secondary bootstrap for the
737 1.1 scw * stacks for different CPU modes.
738 1.1 scw * We must now set the r13 registers in the different CPU modes to
739 1.1 scw * point to these stacks.
740 1.1 scw * Since the ARM stacks use STMFD etc. we must set r13 to the top end
741 1.1 scw * of the stack memory.
742 1.1 scw */
743 1.1 scw #ifdef VERBOSE_INIT_ARM
744 1.1 scw printf("init subsystems: stacks ");
745 1.1 scw #endif
746 1.1 scw
747 1.1 scw set_stackptr(PSR_IRQ32_MODE,
748 1.1 scw irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
749 1.1 scw set_stackptr(PSR_ABT32_MODE,
750 1.1 scw abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
751 1.1 scw set_stackptr(PSR_UND32_MODE,
752 1.1 scw undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
753 1.1 scw
754 1.1 scw /*
755 1.1 scw * Well we should set a data abort handler.
756 1.1 scw * Once things get going this will change as we will need a proper
757 1.1 scw * handler.
758 1.1 scw * Until then we will use a handler that just panics but tells us
759 1.1 scw * why.
760 1.1 scw * Initialisation of the vectors will just panic on a data abort.
761 1.1 scw * This just fills in a slightly better one.
762 1.1 scw */
763 1.1 scw #ifdef VERBOSE_INIT_ARM
764 1.1 scw printf("vectors ");
765 1.1 scw #endif
766 1.1 scw data_abort_handler_address = (u_int)data_abort_handler;
767 1.1 scw prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
768 1.1 scw undefined_handler_address = (u_int)undefinedinstruction_bounce;
769 1.1 scw
770 1.1 scw /* Initialise the undefined instruction handlers */
771 1.1 scw #ifdef VERBOSE_INIT_ARM
772 1.1 scw printf("undefined ");
773 1.1 scw #endif
774 1.1 scw undefined_init();
775 1.1 scw
776 1.1 scw /* Load memory into UVM. */
777 1.1 scw #ifdef VERBOSE_INIT_ARM
778 1.1 scw printf("page ");
779 1.1 scw #endif
780 1.1 scw uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
781 1.1 scw uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
782 1.1 scw atop(physical_freestart), atop(physical_freeend),
783 1.1 scw VM_FREELIST_DEFAULT);
784 1.1 scw
785 1.1 scw /* Boot strap pmap telling it where the kernel page table is */
786 1.1 scw #ifdef VERBOSE_INIT_ARM
787 1.1 scw printf("pmap ");
788 1.1 scw #endif
789 1.6 matt pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
790 1.1 scw
791 1.1 scw /* Setup the IRQ system */
792 1.1 scw #ifdef VERBOSE_INIT_ARM
793 1.1 scw printf("irq ");
794 1.1 scw #endif
795 1.1 scw ixp425_intr_init();
796 1.1 scw #ifdef VERBOSE_INIT_ARM
797 1.1 scw printf("\nAll initialize done!\nNow Starting NetBSD, Hear we go!\n");
798 1.1 scw #endif
799 1.1 scw
800 1.1 scw #ifdef BOOTHOWTO
801 1.1 scw boothowto = BOOTHOWTO;
802 1.1 scw #endif
803 1.1 scw
804 1.1 scw #ifdef DDB
805 1.1 scw db_machine_init();
806 1.1 scw if (boothowto & RB_KDB)
807 1.1 scw Debugger();
808 1.1 scw #endif
809 1.1 scw
810 1.1 scw /* We return the new stack pointer address */
811 1.1 scw return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
812 1.1 scw }
813 1.1 scw
814 1.1 scw /*
815 1.1 scw * consinit
816 1.1 scw */
817 1.1 scw void
818 1.1 scw consinit(void)
819 1.1 scw {
820 1.1 scw static int consinit_called;
821 1.1 scw static const bus_addr_t addrs[2] = {
822 1.1 scw IXP425_UART0_HWBASE, IXP425_UART1_HWBASE
823 1.1 scw };
824 1.1 scw
825 1.1 scw if (consinit_called != 0)
826 1.1 scw return;
827 1.1 scw
828 1.1 scw consinit_called = 1;
829 1.1 scw
830 1.1 scw pmap_devmap_register(nslu2_devmap);
831 1.1 scw
832 1.1 scw if (comcnattach(&ixp425_a4x_bs_tag, addrs[comcnunit],
833 1.1 scw comcnspeed, IXP425_UART_FREQ, COM_TYPE_PXA2x0, comcnmode))
834 1.1 scw panic("can't init serial console (UART%d)", comcnunit);
835 1.1 scw }
836