1 1.47 andvar /* $NetBSD: smdk2410_machdep.c,v 1.47 2024/02/20 23:36:01 andvar Exp $ */ 2 1.1 bsh 3 1.1 bsh /* 4 1.1 bsh * Copyright (c) 2002, 2003 Fujitsu Component Limited 5 1.12 bsh * Copyright (c) 2002, 2003, 2005 Genetec Corporation 6 1.1 bsh * All rights reserved. 7 1.1 bsh * 8 1.1 bsh * Redistribution and use in source and binary forms, with or without 9 1.1 bsh * modification, are permitted provided that the following conditions 10 1.1 bsh * are met: 11 1.1 bsh * 1. Redistributions of source code must retain the above copyright 12 1.1 bsh * notice, this list of conditions and the following disclaimer. 13 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright 14 1.1 bsh * notice, this list of conditions and the following disclaimer in the 15 1.1 bsh * documentation and/or other materials provided with the distribution. 16 1.1 bsh * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 1.1 bsh * Genetec corporation may not be used to endorse or promote products 18 1.1 bsh * derived from this software without specific prior written permission. 19 1.1 bsh * 20 1.1 bsh * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 1.1 bsh * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 1.1 bsh * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 1.1 bsh * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 1.1 bsh * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 1.1 bsh * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 1.1 bsh * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 1.1 bsh * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 1.1 bsh * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 1.1 bsh * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 1.1 bsh * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 1.1 bsh * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 1.1 bsh * SUCH DAMAGE. 33 1.1 bsh */ 34 1.1 bsh /* 35 1.1 bsh * Copyright (c) 2001,2002 ARM Ltd 36 1.1 bsh * All rights reserved. 37 1.1 bsh * 38 1.1 bsh * Redistribution and use in source and binary forms, with or without 39 1.1 bsh * modification, are permitted provided that the following conditions 40 1.1 bsh * are met: 41 1.1 bsh * 1. Redistributions of source code must retain the above copyright 42 1.1 bsh * notice, this list of conditions and the following disclaimer. 43 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright 44 1.1 bsh * notice, this list of conditions and the following disclaimer in the 45 1.1 bsh * documentation and/or other materials provided with the distribution. 46 1.1 bsh * 3. The name of the company may not be used to endorse or promote 47 1.1 bsh * products derived from this software without specific prior written 48 1.1 bsh * permission. 49 1.1 bsh * 50 1.1 bsh * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND 51 1.1 bsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 52 1.1 bsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 53 1.1 bsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD 54 1.1 bsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 1.1 bsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 1.1 bsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 1.1 bsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 1.1 bsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 1.1 bsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 60 1.1 bsh * POSSIBILITY OF SUCH DAMAGE. 61 1.1 bsh * 62 1.1 bsh */ 63 1.1 bsh 64 1.1 bsh /* 65 1.1 bsh * Copyright (c) 1997,1998 Mark Brinicombe. 66 1.1 bsh * Copyright (c) 1997,1998 Causality Limited. 67 1.1 bsh * All rights reserved. 68 1.1 bsh * 69 1.1 bsh * Redistribution and use in source and binary forms, with or without 70 1.1 bsh * modification, are permitted provided that the following conditions 71 1.1 bsh * are met: 72 1.1 bsh * 1. Redistributions of source code must retain the above copyright 73 1.1 bsh * notice, this list of conditions and the following disclaimer. 74 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright 75 1.1 bsh * notice, this list of conditions and the following disclaimer in the 76 1.1 bsh * documentation and/or other materials provided with the distribution. 77 1.1 bsh * 3. All advertising materials mentioning features or use of this software 78 1.1 bsh * must display the following acknowledgement: 79 1.1 bsh * This product includes software developed by Mark Brinicombe 80 1.1 bsh * for the NetBSD Project. 81 1.1 bsh * 4. The name of the company nor the name of the author may be used to 82 1.1 bsh * endorse or promote products derived from this software without specific 83 1.1 bsh * prior written permission. 84 1.1 bsh * 85 1.1 bsh * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 86 1.1 bsh * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 87 1.1 bsh * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 88 1.1 bsh * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 89 1.1 bsh * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 90 1.1 bsh * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 91 1.1 bsh * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 92 1.1 bsh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 93 1.1 bsh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 94 1.1 bsh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 95 1.1 bsh * SUCH DAMAGE. 96 1.1 bsh * 97 1.28 wiz * Machine dependent functions for kernel setup for integrator board 98 1.1 bsh * 99 1.1 bsh * Created : 24/11/97 100 1.1 bsh */ 101 1.1 bsh 102 1.1 bsh /* 103 1.28 wiz * Machine dependent functions for kernel setup for Samsung SMDK2410 104 1.1 bsh * derived from integrator_machdep.c 105 1.1 bsh */ 106 1.1 bsh 107 1.1 bsh #include <sys/cdefs.h> 108 1.47 andvar __KERNEL_RCSID(0, "$NetBSD: smdk2410_machdep.c,v 1.47 2024/02/20 23:36:01 andvar Exp $"); 109 1.1 bsh 110 1.37 skrll #include "opt_arm_debug.h" 111 1.38 skrll #include "opt_console.h" 112 1.1 bsh #include "opt_ddb.h" 113 1.1 bsh #include "opt_kgdb.h" 114 1.1 bsh #include "opt_md.h" 115 1.1 bsh 116 1.1 bsh #include <sys/param.h> 117 1.1 bsh #include <sys/device.h> 118 1.1 bsh #include <sys/systm.h> 119 1.1 bsh #include <sys/kernel.h> 120 1.1 bsh #include <sys/exec.h> 121 1.1 bsh #include <sys/proc.h> 122 1.1 bsh #include <sys/msgbuf.h> 123 1.1 bsh #include <sys/reboot.h> 124 1.1 bsh #include <sys/termios.h> 125 1.1 bsh #include <sys/ksyms.h> 126 1.33 matt #include <sys/bus.h> 127 1.33 matt #include <sys/cpu.h> 128 1.33 matt #include <sys/intr.h> 129 1.1 bsh 130 1.1 bsh #include <uvm/uvm_extern.h> 131 1.1 bsh 132 1.1 bsh #include <dev/cons.h> 133 1.1 bsh #include <dev/md.h> 134 1.1 bsh 135 1.1 bsh #include <machine/db_machdep.h> 136 1.1 bsh #include <ddb/db_sym.h> 137 1.1 bsh #include <ddb/db_extern.h> 138 1.1 bsh #ifdef KGDB 139 1.1 bsh #include <sys/kgdb.h> 140 1.1 bsh #endif 141 1.1 bsh 142 1.1 bsh #include <machine/bootconfig.h> 143 1.33 matt #include <arm/locore.h> 144 1.1 bsh #include <arm/undefined.h> 145 1.1 bsh 146 1.1 bsh #include <arm/arm32/machdep.h> 147 1.1 bsh 148 1.1 bsh #include <arm/s3c2xx0/s3c2410reg.h> 149 1.1 bsh #include <arm/s3c2xx0/s3c2410var.h> 150 1.1 bsh 151 1.1 bsh #include "ksyms.h" 152 1.1 bsh 153 1.1 bsh #ifndef SDRAM_START 154 1.1 bsh #define SDRAM_START S3C2410_SDRAM_START 155 1.1 bsh #endif 156 1.1 bsh #ifndef SDRAM_SIZE 157 1.1 bsh #define SDRAM_SIZE (32*1024*1024) 158 1.1 bsh #endif 159 1.1 bsh 160 1.1 bsh /* 161 1.1 bsh * Address to map I/O registers in early initialize stage. 162 1.1 bsh */ 163 1.12 bsh #define SMDK2410_IO_VBASE 0xfd000000 164 1.1 bsh 165 1.1 bsh /* Kernel text starts 2MB in from the bottom of the kernel address space. */ 166 1.1 bsh #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000) 167 1.1 bsh #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000) 168 1.1 bsh 169 1.1 bsh /* 170 1.1 bsh * The range 0xc1000000 - 0xccffffff is available for kernel VM space 171 1.1 bsh * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff 172 1.1 bsh */ 173 1.1 bsh #define KERNEL_VM_SIZE 0x0C000000 174 1.1 bsh 175 1.1 bsh /* Memory disk support */ 176 1.1 bsh #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR) 177 1.1 bsh #define DO_MEMORY_DISK 178 1.1 bsh /* We have memory disk image outside of the kernel on ROM. */ 179 1.1 bsh #ifdef MEMORY_DISK_ROOT_ROM 180 1.1 bsh /* map the image directory and use read-only */ 181 1.1 bsh #else 182 1.1 bsh /* copy the image to RAM */ 183 1.1 bsh #endif 184 1.1 bsh #endif 185 1.1 bsh 186 1.1 bsh BootConfig bootconfig; /* Boot config storage */ 187 1.1 bsh char *boot_args = NULL; 188 1.1 bsh char *boot_file = NULL; 189 1.1 bsh 190 1.35 matt vaddr_t physical_start; 191 1.35 matt vaddr_t physical_freestart; 192 1.35 matt vaddr_t physical_freeend; 193 1.35 matt vaddr_t physical_end; 194 1.1 bsh u_int free_pages; 195 1.1 bsh 196 1.1 bsh /*int debug_flags;*/ 197 1.1 bsh #ifndef PMAP_STATIC_L1S 198 1.1 bsh int max_processes = 64; /* Default number */ 199 1.1 bsh #endif /* !PMAP_STATIC_L1S */ 200 1.1 bsh 201 1.35 matt paddr_t msgbufphys; 202 1.1 bsh 203 1.1 bsh #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */ 204 1.1 bsh #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */ 205 1.1 bsh #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */ 206 1.1 bsh 207 1.1 bsh #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 208 1.1 bsh 209 1.1 bsh #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 210 1.1 bsh #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 211 1.1 bsh 212 1.1 bsh pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 213 1.1 bsh 214 1.1 bsh /* Prototypes */ 215 1.1 bsh 216 1.1 bsh void consinit(void); 217 1.1 bsh void kgdb_port_init(void); 218 1.1 bsh 219 1.1 bsh 220 1.1 bsh #include "com.h" 221 1.1 bsh #if NCOM > 0 222 1.1 bsh #include <dev/ic/comreg.h> 223 1.1 bsh #include <dev/ic/comvar.h> 224 1.1 bsh #endif 225 1.1 bsh 226 1.1 bsh #include "sscom.h" 227 1.1 bsh #if NSSCOM > 0 228 1.1 bsh #include "opt_sscom.h" 229 1.1 bsh #include <arm/s3c2xx0/sscom_var.h> 230 1.1 bsh #endif 231 1.1 bsh 232 1.1 bsh /* 233 1.1 bsh * Define the default console speed for the board. This is generally 234 1.1 bsh * what the firmware provided with the board defaults to. 235 1.1 bsh */ 236 1.1 bsh #ifndef CONSPEED 237 1.1 bsh #define CONSPEED B115200 /* TTYDEF_SPEED */ 238 1.1 bsh #endif 239 1.1 bsh #ifndef CONMODE 240 1.1 bsh #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 241 1.1 bsh #endif 242 1.1 bsh 243 1.1 bsh int comcnspeed = CONSPEED; 244 1.1 bsh int comcnmode = CONMODE; 245 1.1 bsh 246 1.1 bsh 247 1.1 bsh /* 248 1.1 bsh * void cpu_reboot(int howto, char *bootstr) 249 1.1 bsh * 250 1.1 bsh * Reboots the system 251 1.1 bsh * 252 1.1 bsh * Deal with any syncing, unmounting, dumping and shutdown hooks, 253 1.1 bsh * then reset the CPU. 254 1.1 bsh */ 255 1.1 bsh void 256 1.1 bsh cpu_reboot(int howto, char *bootstr) 257 1.1 bsh { 258 1.1 bsh #ifdef DIAGNOSTIC 259 1.1 bsh /* info */ 260 1.1 bsh printf("boot: howto=%08x curproc=%p\n", howto, curproc); 261 1.1 bsh #endif 262 1.1 bsh 263 1.31 matt cpu_reset_address_paddr = vtophys((u_int)s3c2410_softreset); 264 1.1 bsh 265 1.1 bsh /* 266 1.1 bsh * If we are still cold then hit the air brakes 267 1.1 bsh * and crash to earth fast 268 1.1 bsh */ 269 1.1 bsh if (cold) { 270 1.1 bsh doshutdownhooks(); 271 1.19 dyoung pmf_system_shutdown(boothowto); 272 1.1 bsh printf("The operating system has halted.\n"); 273 1.1 bsh printf("Please press any key to reboot.\n\n"); 274 1.1 bsh cngetc(); 275 1.1 bsh printf("rebooting...\n"); 276 1.1 bsh cpu_reset(); 277 1.1 bsh /* NOTREACHED */ 278 1.1 bsh } 279 1.1 bsh /* Disable console buffering */ 280 1.1 bsh 281 1.1 bsh /* 282 1.1 bsh * If RB_NOSYNC was not specified sync the discs. 283 1.1 bsh * Note: Unless cold is set to 1 here, syslogd will die during the 284 1.1 bsh * unmount. It looks like syslogd is getting woken up only to find 285 1.1 bsh * that it cannot page part of the binary in as the filesystem has 286 1.1 bsh * been unmounted. 287 1.1 bsh */ 288 1.1 bsh if (!(howto & RB_NOSYNC)) 289 1.1 bsh bootsync(); 290 1.1 bsh 291 1.1 bsh /* Say NO to interrupts */ 292 1.1 bsh splhigh(); 293 1.1 bsh 294 1.1 bsh /* Do a dump if requested. */ 295 1.1 bsh if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 296 1.1 bsh dumpsys(); 297 1.1 bsh 298 1.1 bsh /* Run any shutdown hooks */ 299 1.1 bsh doshutdownhooks(); 300 1.1 bsh 301 1.19 dyoung pmf_system_shutdown(boothowto); 302 1.19 dyoung 303 1.1 bsh /* Make sure IRQ's are disabled */ 304 1.1 bsh IRQdisable; 305 1.1 bsh 306 1.1 bsh if (howto & RB_HALT) { 307 1.1 bsh printf("The operating system has halted.\n"); 308 1.1 bsh printf("Please press any key to reboot.\n\n"); 309 1.1 bsh cngetc(); 310 1.1 bsh } 311 1.1 bsh printf("rebooting...\n"); 312 1.1 bsh cpu_reset(); 313 1.1 bsh /* NOTREACHED */ 314 1.1 bsh } 315 1.2 bsh 316 1.12 bsh /* 317 1.12 bsh * Static device mappings. These peripheral registers are mapped at 318 1.12 bsh * fixed virtual addresses very early in initarm() so that we can use 319 1.12 bsh * them while booting the kernel , and stay at the same address 320 1.12 bsh * throughout whole kernel's life time. 321 1.12 bsh * 322 1.12 bsh * We use this table twice; once with bootstrap page table, and once 323 1.12 bsh * with kernel's page table which we build up in initarm(). 324 1.12 bsh * 325 1.12 bsh * Since we map these registers into the bootstrap page table using 326 1.12 bsh * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map 327 1.12 bsh * registers segment-aligned and segment-rounded in order to avoid 328 1.12 bsh * using the 2nd page tables. 329 1.12 bsh */ 330 1.12 bsh 331 1.12 bsh #define _V(n) (SMDK2410_IO_VBASE + (n) * L1_S_SIZE) 332 1.12 bsh 333 1.12 bsh #define GPIO_VBASE _V(0) 334 1.12 bsh #define INTCTL_VBASE _V(1) 335 1.21 cliff #define CLKMAN_VBASE _V(2) 336 1.12 bsh #define UART_VBASE _V(3) 337 1.12 bsh #ifdef MEMORY_DISK_DYNAMIC 338 1.12 bsh #define MEMORY_DISK_VADDR _V(4) 339 1.12 bsh #endif 340 1.12 bsh 341 1.12 bsh static const struct pmap_devmap smdk2410_devmap[] = { 342 1.12 bsh /* GPIO registers */ 343 1.46 skrll DEVMAP_ENTRY( 344 1.12 bsh GPIO_VBASE, 345 1.46 skrll S3C2410_GPIO_BASE, 346 1.46 skrll S3C2410_GPIO_SIZE 347 1.46 skrll ), 348 1.46 skrll DEVMAP_ENTRY( 349 1.12 bsh INTCTL_VBASE, 350 1.46 skrll S3C2410_INTCTL_BASE, 351 1.46 skrll S3C2410_INTCTL_SIZE 352 1.46 skrll ), 353 1.46 skrll DEVMAP_ENTRY( 354 1.21 cliff CLKMAN_VBASE, 355 1.46 skrll S3C2410_CLKMAN_BASE, 356 1.46 skrll S3C24X0_CLKMAN_SIZE 357 1.46 skrll ), 358 1.46 skrll /* UART registers for UART0, 1, 2. */ 359 1.46 skrll DEVMAP_ENTRY( 360 1.12 bsh UART_VBASE, 361 1.46 skrll S3C2410_UART0_BASE, 362 1.46 skrll S3C2410_UART_BASE(3) - S3C2410_UART0_BASE 363 1.46 skrll ), 364 1.12 bsh 365 1.46 skrll DEVMAP_ENTRY_END 366 1.12 bsh }; 367 1.12 bsh 368 1.14 perry static inline pd_entry_t * 369 1.12 bsh read_ttb(void) 370 1.12 bsh { 371 1.12 bsh long ttb; 372 1.12 bsh 373 1.14 perry __asm volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb)); 374 1.12 bsh 375 1.12 bsh 376 1.12 bsh return (pd_entry_t *)(ttb & ~((1 << 14) - 1)); 377 1.12 bsh } 378 1.12 bsh 379 1.12 bsh 380 1.12 bsh #define ioreg_read8(a) (*(volatile uint8_t *)(a)) 381 1.12 bsh #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v)) 382 1.6 bsh #define ioreg_read32(a) (*(volatile uint32_t *)(a)) 383 1.6 bsh #define ioreg_write32(a,v) (*(volatile uint32_t *)(a)=(v)) 384 1.1 bsh 385 1.1 bsh /* 386 1.41 skrll * vaddr_t initarm(...) 387 1.1 bsh * 388 1.1 bsh * Initial entry point on startup. This gets called before main() is 389 1.1 bsh * entered. 390 1.1 bsh * It should be responsible for setting up everything that must be 391 1.1 bsh * in place when main is called. 392 1.1 bsh * This includes 393 1.1 bsh * Taking a copy of the boot configuration structure. 394 1.1 bsh * Initialising the physical console so characters can be printed. 395 1.1 bsh * Setting up page tables for the kernel 396 1.1 bsh * Relocating the kernel to the bottom of physical memory 397 1.1 bsh */ 398 1.1 bsh 399 1.41 skrll vaddr_t 400 1.1 bsh initarm(void *arg) 401 1.1 bsh { 402 1.1 bsh int loop; 403 1.1 bsh int loop1; 404 1.1 bsh u_int l1pagetable; 405 1.15 perry extern int etext __asm("_etext"); 406 1.15 perry extern int end __asm("_end"); 407 1.1 bsh int progress_counter = 0; 408 1.1 bsh 409 1.1 bsh #ifdef DO_MEMORY_DISK 410 1.35 matt vaddr_t md_root_start; 411 1.1 bsh #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE) 412 1.1 bsh #endif 413 1.1 bsh 414 1.12 bsh #define gpio_read8(reg) ioreg_read8(GPIO_VBASE + (reg)) 415 1.1 bsh 416 1.1 bsh #define LEDSTEP() __LED(progress_counter++) 417 1.1 bsh 418 1.1 bsh #define pdatf (*(volatile uint8_t *)(S3C2410_GPIO_BASE+GPIO_PFDAT)) 419 1.1 bsh #define __LED(x) (pdatf = (pdatf & ~0xf0) | (~(x) & 0xf0)) 420 1.1 bsh 421 1.1 bsh LEDSTEP(); 422 1.6 bsh 423 1.6 bsh /* CS8900A on CS3 and CL-PD7610 need nBE1 signal. make sure 424 1.6 bsh * memory controller is set correctly. (USB download firmware 425 1.6 bsh * doesn't do this right) Also, we use WAIT signal for them. 426 1.6 bsh */ 427 1.43 skrll ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON, 428 1.6 bsh (BWSCON_ST|BWSCON_WS) << BWSCON_BANK_SHIFT(2) | 429 1.43 skrll (BWSCON_ST|BWSCON_WS) << BWSCON_BANK_SHIFT(3) | 430 1.6 bsh ioreg_read32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON)); 431 1.6 bsh /* tweak access timing for CS8900A */ 432 1.6 bsh ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BANKCON(3), 433 1.6 bsh (0<<BANKCON_TACS_SHIFT)|(1<<BANKCON_TCOS_SHIFT)| 434 1.6 bsh (7<<BANKCON_TACC_SHIFT)|(0<<BANKCON_TOCH_SHIFT)| 435 1.6 bsh (0<<BANKCON_TCAH_SHIFT)); 436 1.6 bsh 437 1.1 bsh /* 438 1.1 bsh * Heads up ... Setup the CPU / MMU / TLB functions 439 1.1 bsh */ 440 1.1 bsh if (set_cpufuncs()) 441 1.1 bsh panic("cpu not recognized!"); 442 1.1 bsh 443 1.1 bsh LEDSTEP(); 444 1.1 bsh 445 1.1 bsh /* 446 1.12 bsh * Map I/O registers that are used in startup. Now we are 447 1.12 bsh * still using page table prepared by bootloader. Later we'll 448 1.12 bsh * map those registers at the same address in the kernel page 449 1.12 bsh * table. 450 1.1 bsh */ 451 1.12 bsh pmap_devmap_bootstrap((vaddr_t)read_ttb(), smdk2410_devmap); 452 1.12 bsh 453 1.12 bsh #undef pdatf 454 1.12 bsh #define pdatf (*(volatile uint8_t *)(GPIO_VBASE+GPIO_PFDAT)) 455 1.12 bsh 456 1.1 bsh 457 1.1 bsh LEDSTEP(); 458 1.1 bsh 459 1.1 bsh /* Disable all peripheral interrupts */ 460 1.12 bsh ioreg_write32(INTCTL_VBASE + INTCTL_INTMSK, ~0); 461 1.12 bsh 462 1.8 bsh /* initialize some variables so that splfoo() doesn't 463 1.8 bsh touch illegal address. */ 464 1.12 bsh s3c2xx0_intr_bootstrap(INTCTL_VBASE); 465 1.1 bsh 466 1.1 bsh consinit(); 467 1.3 bsh #ifdef VERBOSE_INIT_ARM 468 1.1 bsh printf("consinit done\n"); 469 1.3 bsh #endif 470 1.1 bsh 471 1.1 bsh #ifdef KGDB 472 1.1 bsh LEDSTEP(); 473 1.1 bsh kgdb_port_init(); 474 1.1 bsh #endif 475 1.1 bsh LEDSTEP(); 476 1.1 bsh 477 1.3 bsh #ifdef VERBOSE_INIT_ARM 478 1.1 bsh /* Talk to the user */ 479 1.1 bsh printf("\nNetBSD/evbarm (SMDK2410) booting ...\n"); 480 1.3 bsh #endif 481 1.1 bsh /* 482 1.1 bsh * Ok we have the following memory map 483 1.1 bsh * 484 1.1 bsh * Physical Address Range Description 485 1.1 bsh * ----------------------- ---------------------------------- 486 1.1 bsh * 0x00000000 - 0x00ffffff Intel flash Memory (16MB) 487 1.1 bsh * 0x02000000 - 0x020fffff AMD flash Memory (1MB) 488 1.1 bsh * or (depend on DIPSW setting) 489 1.1 bsh * 0x00000000 - 0x000fffff AMD flash Memory (1MB) 490 1.1 bsh * 0x02000000 - 0x02ffffff Intel flash Memory (16MB) 491 1.1 bsh * 492 1.1 bsh * 0x30000000 - 0x31ffffff SDRAM (32MB) 493 1.1 bsh * 494 1.1 bsh * The initarm() has the responsibility for creating the kernel 495 1.1 bsh * page tables. 496 1.1 bsh * It must also set up various memory pointers that are used 497 1.1 bsh * by pmap etc. 498 1.1 bsh */ 499 1.1 bsh 500 1.1 bsh /* Fake bootconfig structure for the benefit of pmap.c */ 501 1.1 bsh /* XXX must make the memory description h/w independent */ 502 1.1 bsh bootconfig.dramblocks = 1; 503 1.1 bsh bootconfig.dram[0].address = SDRAM_START; 504 1.1 bsh bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE; 505 1.1 bsh 506 1.1 bsh /* 507 1.45 andvar * Set up the variables that define the availability of 508 1.1 bsh * physical memory. For now, we're going to set 509 1.1 bsh * physical_freestart to 0x08200000 (where the kernel 510 1.1 bsh * was loaded), and allocate the memory we need downwards. 511 1.1 bsh * If we get too close to the bottom of SDRAM, we 512 1.1 bsh * will panic. We will update physical_freestart and 513 1.1 bsh * physical_freeend later to reflect what pmap_bootstrap() 514 1.1 bsh * wants to see. 515 1.1 bsh * 516 1.1 bsh * XXX pmap_bootstrap() needs an enema. 517 1.1 bsh */ 518 1.1 bsh physical_start = bootconfig.dram[0].address; 519 1.1 bsh physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 520 1.1 bsh 521 1.1 bsh #ifdef DO_MEMORY_DISK 522 1.1 bsh #ifdef MEMORY_DISK_ROOT_ROM 523 1.1 bsh md_root_start = MEMORY_DISK_ROOT_ADDR; 524 1.1 bsh boothowto |= RB_RDONLY; 525 1.1 bsh #else 526 1.1 bsh /* Reserve physmem for ram disk */ 527 1.1 bsh md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1)); 528 1.43 skrll printf("Reserve %ld bytes for memory disk\n", 529 1.1 bsh physical_end - md_root_start); 530 1.1 bsh /* copy fs contents */ 531 1.1 bsh memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR, 532 1.1 bsh MD_ROOT_SIZE); 533 1.1 bsh physical_end = md_root_start; 534 1.1 bsh #endif 535 1.1 bsh #endif 536 1.1 bsh 537 1.1 bsh physical_freestart = SDRAM_START; /* XXX */ 538 1.1 bsh physical_freeend = SDRAM_START + 0x00200000; 539 1.1 bsh 540 1.1 bsh physmem = (physical_end - physical_start) / PAGE_SIZE; 541 1.1 bsh 542 1.1 bsh #ifdef VERBOSE_INIT_ARM 543 1.1 bsh /* Tell the user about the memory */ 544 1.47 andvar printf("physmemory: 0x%"PRIxPSIZE" pages at 0x%08lx -> 0x%08lx\n", physmem, 545 1.1 bsh physical_start, physical_end - 1); 546 1.1 bsh #endif 547 1.1 bsh 548 1.1 bsh /* 549 1.1 bsh * XXX 550 1.1 bsh * Okay, the kernel starts 2MB in from the bottom of physical 551 1.1 bsh * memory. We are going to allocate our bootstrap pages downwards 552 1.1 bsh * from there. 553 1.1 bsh * 554 1.1 bsh * We need to allocate some fixed page tables to get the kernel 555 1.1 bsh * going. We allocate one page directory and a number of page 556 1.1 bsh * tables and store the physical addresses in the kernel_pt_table 557 1.1 bsh * array. 558 1.1 bsh * 559 1.1 bsh * The kernel page directory must be on a 16K boundary. The page 560 1.10 abs * tables must be on 4K boundaries. What we do is allocate the 561 1.1 bsh * page directory on the first 16K boundary that we encounter, and 562 1.1 bsh * the page tables on 4K boundaries otherwise. Since we allocate 563 1.1 bsh * at least 3 L2 page tables, we are guaranteed to encounter at 564 1.1 bsh * least one 16K aligned region. 565 1.1 bsh */ 566 1.1 bsh 567 1.1 bsh #ifdef VERBOSE_INIT_ARM 568 1.1 bsh printf("Allocating page tables\n"); 569 1.1 bsh #endif 570 1.1 bsh 571 1.1 bsh free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 572 1.1 bsh 573 1.1 bsh #ifdef VERBOSE_INIT_ARM 574 1.1 bsh printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 575 1.1 bsh physical_freestart, free_pages, free_pages); 576 1.1 bsh #endif 577 1.1 bsh 578 1.1 bsh /* Define a macro to simplify memory allocation */ 579 1.1 bsh #define valloc_pages(var, np) \ 580 1.1 bsh alloc_pages((var).pv_pa, (np)); \ 581 1.1 bsh (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 582 1.1 bsh 583 1.1 bsh #define alloc_pages(var, np) \ 584 1.1 bsh physical_freeend -= ((np) * PAGE_SIZE); \ 585 1.1 bsh if (physical_freeend < physical_freestart) \ 586 1.1 bsh panic("initarm: out of memory"); \ 587 1.1 bsh (var) = physical_freeend; \ 588 1.1 bsh free_pages -= (np); \ 589 1.1 bsh memset((char *)(var), 0, ((np) * PAGE_SIZE)); 590 1.1 bsh 591 1.1 bsh loop1 = 0; 592 1.1 bsh for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 593 1.1 bsh /* Are we 16KB aligned for an L1 ? */ 594 1.1 bsh if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 595 1.1 bsh && kernel_l1pt.pv_pa == 0) { 596 1.1 bsh valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 597 1.1 bsh } else { 598 1.1 bsh valloc_pages(kernel_pt_table[loop1], 599 1.1 bsh L2_TABLE_SIZE / PAGE_SIZE); 600 1.1 bsh ++loop1; 601 1.1 bsh } 602 1.1 bsh } 603 1.1 bsh 604 1.1 bsh /* This should never be able to happen but better confirm that. */ 605 1.1 bsh if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0) 606 1.1 bsh panic("initarm: Failed to align the kernel page directory\n"); 607 1.1 bsh 608 1.1 bsh /* 609 1.1 bsh * Allocate a page for the system page mapped to V0x00000000 610 1.1 bsh * This page will just contain the system vectors and can be 611 1.1 bsh * shared by all processes. 612 1.1 bsh */ 613 1.1 bsh alloc_pages(systempage.pv_pa, 1); 614 1.1 bsh 615 1.1 bsh /* Allocate stacks for all modes */ 616 1.1 bsh valloc_pages(irqstack, IRQ_STACK_SIZE); 617 1.1 bsh valloc_pages(abtstack, ABT_STACK_SIZE); 618 1.1 bsh valloc_pages(undstack, UND_STACK_SIZE); 619 1.1 bsh valloc_pages(kernelstack, UPAGES); 620 1.1 bsh 621 1.1 bsh #ifdef VERBOSE_INIT_ARM 622 1.1 bsh printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 623 1.1 bsh irqstack.pv_va); 624 1.1 bsh printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 625 1.1 bsh abtstack.pv_va); 626 1.1 bsh printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 627 1.1 bsh undstack.pv_va); 628 1.1 bsh printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 629 1.1 bsh kernelstack.pv_va); 630 1.1 bsh #endif 631 1.1 bsh 632 1.1 bsh alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 633 1.1 bsh 634 1.1 bsh LEDSTEP(); 635 1.1 bsh 636 1.1 bsh /* 637 1.1 bsh * Ok we have allocated physical pages for the primary kernel 638 1.1 bsh * page tables 639 1.1 bsh */ 640 1.1 bsh 641 1.1 bsh #ifdef VERBOSE_INIT_ARM 642 1.1 bsh printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 643 1.1 bsh #endif 644 1.1 bsh 645 1.1 bsh /* 646 1.1 bsh * Now we start construction of the L1 page table 647 1.1 bsh * We start by mapping the L2 page tables into the L1. 648 1.1 bsh * This means that we can replace L1 mappings later on if necessary 649 1.1 bsh */ 650 1.1 bsh l1pagetable = kernel_l1pt.pv_pa; 651 1.1 bsh 652 1.1 bsh /* Map the L2 pages tables in the L1 page table */ 653 1.1 bsh pmap_link_l2pt(l1pagetable, 0x00000000, 654 1.1 bsh &kernel_pt_table[KERNEL_PT_SYS]); 655 1.1 bsh for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 656 1.1 bsh pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 657 1.1 bsh &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 658 1.1 bsh for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 659 1.1 bsh pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 660 1.1 bsh &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 661 1.1 bsh 662 1.1 bsh /* update the top of the kernel VM */ 663 1.1 bsh pmap_curmaxkvaddr = 664 1.1 bsh KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 665 1.1 bsh 666 1.1 bsh #ifdef VERBOSE_INIT_ARM 667 1.1 bsh printf("Mapping kernel\n"); 668 1.1 bsh #endif 669 1.1 bsh 670 1.1 bsh /* Now we fill in the L2 pagetable for the kernel static code/data */ 671 1.1 bsh { 672 1.1 bsh size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE; 673 1.1 bsh size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE; 674 1.1 bsh u_int logical; 675 1.1 bsh 676 1.1 bsh textsize = (textsize + PGOFSET) & ~PGOFSET; 677 1.1 bsh totalsize = (totalsize + PGOFSET) & ~PGOFSET; 678 1.1 bsh 679 1.1 bsh logical = 0x00200000; /* offset of kernel in RAM */ 680 1.1 bsh 681 1.1 bsh logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 682 1.1 bsh physical_start + logical, textsize, 683 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 684 1.1 bsh logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 685 1.1 bsh physical_start + logical, totalsize - textsize, 686 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 687 1.1 bsh } 688 1.1 bsh 689 1.1 bsh #ifdef VERBOSE_INIT_ARM 690 1.1 bsh printf("Constructing L2 page tables\n"); 691 1.1 bsh #endif 692 1.1 bsh 693 1.1 bsh /* Map the stack pages */ 694 1.1 bsh pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 695 1.1 bsh IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 696 1.1 bsh PTE_CACHE); 697 1.1 bsh pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 698 1.1 bsh ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 699 1.1 bsh PTE_CACHE); 700 1.1 bsh pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 701 1.1 bsh UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 702 1.1 bsh PTE_CACHE); 703 1.1 bsh pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 704 1.1 bsh UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 705 1.1 bsh 706 1.1 bsh pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 707 1.1 bsh L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 708 1.1 bsh 709 1.1 bsh for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 710 1.1 bsh pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 711 1.1 bsh kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 712 1.1 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 713 1.1 bsh } 714 1.1 bsh 715 1.1 bsh /* Map the vector page. */ 716 1.1 bsh #if 1 717 1.1 bsh /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 718 1.1 bsh * cache-clean code there. */ 719 1.1 bsh pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 720 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 721 1.1 bsh #else 722 1.1 bsh pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 723 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 724 1.1 bsh #endif 725 1.1 bsh 726 1.1 bsh #ifdef MEMORY_DISK_DYNAMIC 727 1.1 bsh /* map MD root image */ 728 1.12 bsh pmap_map_chunk(l1pagetable, MEMORY_DISK_VADDR, md_root_start, 729 1.12 bsh MD_ROOT_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 730 1.1 bsh 731 1.1 bsh md_root_setconf((void *)md_root_start, MD_ROOT_SIZE); 732 1.1 bsh #endif /* MEMORY_DISK_DYNAMIC */ 733 1.1 bsh /* 734 1.1 bsh * map integrated peripherals at same address in l1pagetable 735 1.1 bsh * so that we can continue to use console. 736 1.1 bsh */ 737 1.12 bsh pmap_devmap_bootstrap(l1pagetable, smdk2410_devmap); 738 1.1 bsh 739 1.1 bsh /* 740 1.1 bsh * Now we have the real page tables in place so we can switch to them. 741 1.1 bsh * Once this is done we will be running with the REAL kernel page 742 1.1 bsh * tables. 743 1.1 bsh */ 744 1.1 bsh 745 1.1 bsh /* 746 1.1 bsh * Update the physical_freestart/physical_freeend/free_pages 747 1.1 bsh * variables. 748 1.1 bsh */ 749 1.1 bsh { 750 1.1 bsh physical_freestart = physical_start + 751 1.1 bsh (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE); 752 1.1 bsh physical_freeend = physical_end; 753 1.1 bsh free_pages = 754 1.1 bsh (physical_freeend - physical_freestart) / PAGE_SIZE; 755 1.1 bsh } 756 1.1 bsh 757 1.1 bsh /* Switch tables */ 758 1.1 bsh #ifdef VERBOSE_INIT_ARM 759 1.1 bsh printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 760 1.1 bsh physical_freestart, free_pages, free_pages); 761 1.1 bsh printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 762 1.1 bsh #endif 763 1.1 bsh LEDSTEP(); 764 1.1 bsh cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 765 1.32 matt cpu_setttb(kernel_l1pt.pv_pa, true); 766 1.1 bsh cpu_tlb_flushID(); 767 1.1 bsh cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 768 1.1 bsh 769 1.1 bsh /* 770 1.1 bsh * Moved from cpu_startup() as data_abort_handler() references 771 1.1 bsh * this during uvm init 772 1.1 bsh */ 773 1.25 rmind uvm_lwp_setuarea(&lwp0, kernelstack.pv_va); 774 1.1 bsh 775 1.1 bsh #ifdef VERBOSE_INIT_ARM 776 1.1 bsh printf("done!\n"); 777 1.1 bsh #endif 778 1.1 bsh 779 1.1 bsh LEDSTEP(); 780 1.1 bsh #ifdef VERBOSE_INIT_ARM 781 1.1 bsh printf("bootstrap done.\n"); 782 1.1 bsh #endif 783 1.1 bsh 784 1.1 bsh arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 785 1.1 bsh 786 1.1 bsh /* 787 1.1 bsh * Pages were allocated during the secondary bootstrap for the 788 1.1 bsh * stacks for different CPU modes. 789 1.1 bsh * We must now set the r13 registers in the different CPU modes to 790 1.1 bsh * point to these stacks. 791 1.1 bsh * Since the ARM stacks use STMFD etc. we must set r13 to the top end 792 1.1 bsh * of the stack memory. 793 1.1 bsh */ 794 1.3 bsh #ifdef VERBOSE_INIT_ARM 795 1.1 bsh printf("init subsystems: stacks "); 796 1.3 bsh #endif 797 1.1 bsh 798 1.1 bsh set_stackptr(PSR_IRQ32_MODE, 799 1.1 bsh irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 800 1.1 bsh set_stackptr(PSR_ABT32_MODE, 801 1.1 bsh abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 802 1.1 bsh set_stackptr(PSR_UND32_MODE, 803 1.1 bsh undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 804 1.1 bsh 805 1.1 bsh LEDSTEP(); 806 1.1 bsh 807 1.1 bsh /* 808 1.1 bsh * Well we should set a data abort handler. 809 1.1 bsh * Once things get going this will change as we will need a proper 810 1.1 bsh * handler. 811 1.1 bsh * Until then we will use a handler that just panics but tells us 812 1.1 bsh * why. 813 1.1 bsh * Initialisation of the vectors will just panic on a data abort. 814 1.9 abs * This just fills in a slightly better one. 815 1.1 bsh */ 816 1.1 bsh #ifdef VERBOSE_INIT_ARM 817 1.1 bsh printf("vectors "); 818 1.1 bsh #endif 819 1.1 bsh data_abort_handler_address = (u_int)data_abort_handler; 820 1.1 bsh prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 821 1.1 bsh undefined_handler_address = (u_int)undefinedinstruction_bounce; 822 1.1 bsh 823 1.1 bsh /* Initialise the undefined instruction handlers */ 824 1.3 bsh #ifdef VERBOSE_INIT_ARM 825 1.1 bsh printf("undefined "); 826 1.3 bsh #endif 827 1.1 bsh undefined_init(); 828 1.1 bsh 829 1.1 bsh LEDSTEP(); 830 1.1 bsh 831 1.1 bsh /* Load memory into UVM. */ 832 1.1 bsh #ifdef VERBOSE_INIT_ARM 833 1.1 bsh printf("page "); 834 1.1 bsh #endif 835 1.36 cherry uvm_md_init(); 836 1.1 bsh uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 837 1.1 bsh atop(physical_freestart), atop(physical_freeend), 838 1.1 bsh VM_FREELIST_DEFAULT); 839 1.1 bsh 840 1.1 bsh LEDSTEP(); 841 1.39 skrll /* Boot strap pmap telling it where managed kernel virtual memory is */ 842 1.1 bsh #ifdef VERBOSE_INIT_ARM 843 1.1 bsh printf("pmap "); 844 1.1 bsh #endif 845 1.18 matt pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE); 846 1.1 bsh 847 1.1 bsh LEDSTEP(); 848 1.1 bsh 849 1.1 bsh /* Setup the IRQ system */ 850 1.1 bsh #ifdef VERBOSE_INIT_ARM 851 1.1 bsh printf("irq "); 852 1.1 bsh #endif 853 1.1 bsh /* XXX irq_init(); */ 854 1.1 bsh 855 1.3 bsh #ifdef VERBOSE_INIT_ARM 856 1.1 bsh printf("done.\n"); 857 1.3 bsh #endif 858 1.1 bsh 859 1.1 bsh #ifdef BOOTHOWTO 860 1.1 bsh boothowto |= BOOTHOWTO; 861 1.1 bsh #endif 862 1.1 bsh { 863 1.1 bsh uint8_t gpio = ~gpio_read8(GPIO_PFDAT); 864 1.43 skrll 865 1.1 bsh if (gpio & (1<<0)) /* SW1 (EINT0) */ 866 1.1 bsh boothowto ^= RB_SINGLE; 867 1.1 bsh if (gpio & (1<<2)) /* SW2 (EINT2) */ 868 1.1 bsh boothowto ^= RB_KDB; 869 1.1 bsh #ifdef VERBOSE_INIT_ARM 870 1.1 bsh printf( "sw: %x boothowto: %x\n", gpio, boothowto ); 871 1.1 bsh #endif 872 1.1 bsh } 873 1.1 bsh 874 1.1 bsh #ifdef KGDB 875 1.1 bsh if (boothowto & RB_KDB) { 876 1.1 bsh kgdb_debug_init = 1; 877 1.1 bsh kgdb_connect(1); 878 1.1 bsh } 879 1.1 bsh #endif 880 1.1 bsh 881 1.1 bsh #ifdef DDB 882 1.1 bsh db_machine_init(); 883 1.1 bsh if (boothowto & RB_KDB) 884 1.1 bsh Debugger(); 885 1.1 bsh #endif 886 1.1 bsh 887 1.1 bsh /* We return the new stack pointer address */ 888 1.40 skrll return kernelstack.pv_va + USPACE_SVC_STACK_TOP; 889 1.1 bsh } 890 1.1 bsh 891 1.1 bsh void 892 1.1 bsh consinit(void) 893 1.1 bsh { 894 1.1 bsh static int consinit_done = 0; 895 1.12 bsh bus_space_tag_t iot = &s3c2xx0_bs_tag; 896 1.12 bsh int pclk; 897 1.1 bsh 898 1.1 bsh if (consinit_done != 0) 899 1.1 bsh return; 900 1.1 bsh 901 1.1 bsh consinit_done = 1; 902 1.1 bsh 903 1.21 cliff s3c24x0_clock_freq2(CLKMAN_VBASE, NULL, NULL, &pclk); 904 1.12 bsh 905 1.1 bsh #if NSSCOM > 0 906 1.1 bsh #ifdef SSCOM0CONSOLE 907 1.1 bsh if (0 == s3c2410_sscom_cnattach(iot, 0, comcnspeed, 908 1.1 bsh pclk, comcnmode)) 909 1.1 bsh return; 910 1.1 bsh #endif 911 1.1 bsh #ifdef SSCOM1CONSOLE 912 1.1 bsh if (0 == s3c2410_sscom_cnattach(iot, 1, comcnspeed, 913 1.1 bsh pclk, comcnmode)) 914 1.1 bsh return; 915 1.1 bsh #endif 916 1.1 bsh #endif /* NSSCOM */ 917 1.1 bsh #if NCOM>0 && defined(CONCOMADDR) 918 1.1 bsh if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed, 919 1.1 bsh COM_FREQ, COM_TYPE_NORMAL, comcnmode)) 920 1.1 bsh panic("can't init serial console @%x", CONCOMADDR); 921 1.1 bsh return; 922 1.1 bsh #endif 923 1.1 bsh 924 1.1 bsh consinit_done = 0; 925 1.1 bsh } 926 1.1 bsh 927 1.1 bsh 928 1.1 bsh #ifdef KGDB 929 1.1 bsh 930 1.1 bsh #if (NSSCOM > 0) 931 1.1 bsh 932 1.1 bsh #ifdef KGDB_DEVNAME 933 1.1 bsh const char kgdb_devname[] = KGDB_DEVNAME; 934 1.1 bsh #else 935 1.1 bsh const char kgdb_devname[] = ""; 936 1.1 bsh #endif 937 1.1 bsh 938 1.1 bsh #ifndef KGDB_DEVMODE 939 1.1 bsh #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */ 940 1.1 bsh #endif 941 1.1 bsh int kgdb_sscom_mode = KGDB_DEVMODE; 942 1.1 bsh 943 1.1 bsh #endif /* NSSCOM */ 944 1.1 bsh 945 1.1 bsh void 946 1.1 bsh kgdb_port_init(void) 947 1.1 bsh { 948 1.1 bsh #if (NSSCOM > 0) 949 1.1 bsh int unit = -1; 950 1.12 bsh int pclk; 951 1.1 bsh 952 1.1 bsh if (strcmp(kgdb_devname, "sscom0") == 0) 953 1.1 bsh unit = 0; 954 1.1 bsh else if (strcmp(kgdb_devname, "sscom1") == 0) 955 1.1 bsh unit = 1; 956 1.1 bsh 957 1.1 bsh if (unit >= 0) { 958 1.21 cliff s3c24x0_clock_freq2(CLKMAN_VBASE, NULL, NULL, &pclk); 959 1.12 bsh 960 1.12 bsh s3c2410_sscom_kgdb_attach(&s3c2xx0_bs_tag, 961 1.1 bsh unit, kgdb_rate, pclk, kgdb_sscom_mode); 962 1.1 bsh } 963 1.1 bsh #endif 964 1.1 bsh } 965 1.1 bsh #endif 966 1.1 bsh 967 1.4 bsh static struct arm32_dma_range smdk2410_dma_ranges[1]; 968 1.4 bsh 969 1.4 bsh bus_dma_tag_t 970 1.4 bsh s3c2xx0_bus_dma_init(struct arm32_bus_dma_tag *dma_tag_template) 971 1.4 bsh { 972 1.4 bsh extern paddr_t physical_start, physical_end; 973 1.4 bsh struct arm32_bus_dma_tag *dmat; 974 1.4 bsh 975 1.4 bsh smdk2410_dma_ranges[0].dr_sysbase = physical_start; 976 1.4 bsh smdk2410_dma_ranges[0].dr_busbase = physical_start; 977 1.4 bsh smdk2410_dma_ranges[0].dr_len = physical_end - physical_start; 978 1.4 bsh 979 1.4 bsh #if 1 980 1.4 bsh dmat = dma_tag_template; 981 1.4 bsh #else 982 1.42 chs dmat = malloc(sizeof *dmat, M_DEVBUF, M_WAITOK); 983 1.4 bsh *dmat = *dma_tag_template; 984 1.4 bsh #endif 985 1.4 bsh 986 1.4 bsh dmat->_ranges = smdk2410_dma_ranges; 987 1.4 bsh dmat->_nranges = 1; 988 1.4 bsh 989 1.4 bsh return dmat; 990 1.4 bsh } 991