smdk2410_machdep.c revision 1.14 1 1.14 perry /* $NetBSD: smdk2410_machdep.c,v 1.14 2005/12/24 20:07:03 perry Exp $ */
2 1.1 bsh
3 1.1 bsh /*
4 1.1 bsh * Copyright (c) 2002, 2003 Fujitsu Component Limited
5 1.12 bsh * Copyright (c) 2002, 2003, 2005 Genetec Corporation
6 1.1 bsh * All rights reserved.
7 1.1 bsh *
8 1.1 bsh * Redistribution and use in source and binary forms, with or without
9 1.1 bsh * modification, are permitted provided that the following conditions
10 1.1 bsh * are met:
11 1.1 bsh * 1. Redistributions of source code must retain the above copyright
12 1.1 bsh * notice, this list of conditions and the following disclaimer.
13 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 bsh * notice, this list of conditions and the following disclaimer in the
15 1.1 bsh * documentation and/or other materials provided with the distribution.
16 1.1 bsh * 3. Neither the name of The Fujitsu Component Limited nor the name of
17 1.1 bsh * Genetec corporation may not be used to endorse or promote products
18 1.1 bsh * derived from this software without specific prior written permission.
19 1.1 bsh *
20 1.1 bsh * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
21 1.1 bsh * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 1.1 bsh * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 1.1 bsh * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 1.1 bsh * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
25 1.1 bsh * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 1.1 bsh * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 1.1 bsh * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 1.1 bsh * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29 1.1 bsh * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 1.1 bsh * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 1.1 bsh * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 1.1 bsh * SUCH DAMAGE.
33 1.1 bsh */
34 1.1 bsh /*
35 1.1 bsh * Copyright (c) 2001,2002 ARM Ltd
36 1.1 bsh * All rights reserved.
37 1.1 bsh *
38 1.1 bsh * Redistribution and use in source and binary forms, with or without
39 1.1 bsh * modification, are permitted provided that the following conditions
40 1.1 bsh * are met:
41 1.1 bsh * 1. Redistributions of source code must retain the above copyright
42 1.1 bsh * notice, this list of conditions and the following disclaimer.
43 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
44 1.1 bsh * notice, this list of conditions and the following disclaimer in the
45 1.1 bsh * documentation and/or other materials provided with the distribution.
46 1.1 bsh * 3. The name of the company may not be used to endorse or promote
47 1.1 bsh * products derived from this software without specific prior written
48 1.1 bsh * permission.
49 1.1 bsh *
50 1.1 bsh * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND
51 1.1 bsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
52 1.1 bsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
53 1.1 bsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD
54 1.1 bsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 1.1 bsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 1.1 bsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 1.1 bsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 1.1 bsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 1.1 bsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
60 1.1 bsh * POSSIBILITY OF SUCH DAMAGE.
61 1.1 bsh *
62 1.1 bsh */
63 1.1 bsh
64 1.1 bsh /*
65 1.1 bsh * Copyright (c) 1997,1998 Mark Brinicombe.
66 1.1 bsh * Copyright (c) 1997,1998 Causality Limited.
67 1.1 bsh * All rights reserved.
68 1.1 bsh *
69 1.1 bsh * Redistribution and use in source and binary forms, with or without
70 1.1 bsh * modification, are permitted provided that the following conditions
71 1.1 bsh * are met:
72 1.1 bsh * 1. Redistributions of source code must retain the above copyright
73 1.1 bsh * notice, this list of conditions and the following disclaimer.
74 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
75 1.1 bsh * notice, this list of conditions and the following disclaimer in the
76 1.1 bsh * documentation and/or other materials provided with the distribution.
77 1.1 bsh * 3. All advertising materials mentioning features or use of this software
78 1.1 bsh * must display the following acknowledgement:
79 1.1 bsh * This product includes software developed by Mark Brinicombe
80 1.1 bsh * for the NetBSD Project.
81 1.1 bsh * 4. The name of the company nor the name of the author may be used to
82 1.1 bsh * endorse or promote products derived from this software without specific
83 1.1 bsh * prior written permission.
84 1.1 bsh *
85 1.1 bsh * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
86 1.1 bsh * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
87 1.1 bsh * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
88 1.1 bsh * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
89 1.1 bsh * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
90 1.1 bsh * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
91 1.1 bsh * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 1.1 bsh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 1.1 bsh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 1.1 bsh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
95 1.1 bsh * SUCH DAMAGE.
96 1.1 bsh *
97 1.1 bsh * Machine dependant functions for kernel setup for integrator board
98 1.1 bsh *
99 1.1 bsh * Created : 24/11/97
100 1.1 bsh */
101 1.1 bsh
102 1.1 bsh /*
103 1.1 bsh * Machine dependant functions for kernel setup for Samsung SMDK2410
104 1.1 bsh * derived from integrator_machdep.c
105 1.1 bsh */
106 1.1 bsh
107 1.1 bsh #include <sys/cdefs.h>
108 1.14 perry __KERNEL_RCSID(0, "$NetBSD: smdk2410_machdep.c,v 1.14 2005/12/24 20:07:03 perry Exp $");
109 1.1 bsh
110 1.1 bsh #include "opt_ddb.h"
111 1.1 bsh #include "opt_kgdb.h"
112 1.1 bsh #include "opt_ipkdb.h"
113 1.1 bsh #include "opt_pmap_debug.h"
114 1.1 bsh #include "opt_md.h"
115 1.1 bsh
116 1.1 bsh #include <sys/param.h>
117 1.1 bsh #include <sys/device.h>
118 1.1 bsh #include <sys/systm.h>
119 1.1 bsh #include <sys/kernel.h>
120 1.1 bsh #include <sys/exec.h>
121 1.1 bsh #include <sys/proc.h>
122 1.1 bsh #include <sys/msgbuf.h>
123 1.1 bsh #include <sys/reboot.h>
124 1.1 bsh #include <sys/termios.h>
125 1.1 bsh #include <sys/ksyms.h>
126 1.1 bsh
127 1.1 bsh #include <uvm/uvm_extern.h>
128 1.1 bsh
129 1.1 bsh #include <dev/cons.h>
130 1.1 bsh #include <dev/md.h>
131 1.1 bsh
132 1.1 bsh #include <machine/db_machdep.h>
133 1.1 bsh #include <ddb/db_sym.h>
134 1.1 bsh #include <ddb/db_extern.h>
135 1.1 bsh #ifdef KGDB
136 1.1 bsh #include <sys/kgdb.h>
137 1.1 bsh #endif
138 1.1 bsh
139 1.1 bsh #include <machine/bootconfig.h>
140 1.1 bsh #include <machine/bus.h>
141 1.1 bsh #include <machine/cpu.h>
142 1.1 bsh #include <machine/frame.h>
143 1.1 bsh #include <machine/intr.h>
144 1.1 bsh #include <arm/undefined.h>
145 1.1 bsh
146 1.1 bsh #include <arm/arm32/machdep.h>
147 1.1 bsh
148 1.1 bsh #include <arm/s3c2xx0/s3c2410reg.h>
149 1.1 bsh #include <arm/s3c2xx0/s3c2410var.h>
150 1.1 bsh
151 1.1 bsh #include "ksyms.h"
152 1.1 bsh
153 1.1 bsh #ifndef SDRAM_START
154 1.1 bsh #define SDRAM_START S3C2410_SDRAM_START
155 1.1 bsh #endif
156 1.1 bsh #ifndef SDRAM_SIZE
157 1.1 bsh #define SDRAM_SIZE (32*1024*1024)
158 1.1 bsh #endif
159 1.1 bsh
160 1.1 bsh /*
161 1.1 bsh * Address to map I/O registers in early initialize stage.
162 1.1 bsh */
163 1.12 bsh #define SMDK2410_IO_VBASE 0xfd000000
164 1.1 bsh
165 1.1 bsh /* Kernel text starts 2MB in from the bottom of the kernel address space. */
166 1.1 bsh #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
167 1.1 bsh #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
168 1.1 bsh
169 1.1 bsh /*
170 1.1 bsh * The range 0xc1000000 - 0xccffffff is available for kernel VM space
171 1.1 bsh * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
172 1.1 bsh */
173 1.1 bsh #define KERNEL_VM_SIZE 0x0C000000
174 1.1 bsh
175 1.1 bsh /* Memory disk support */
176 1.1 bsh #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR)
177 1.1 bsh #define DO_MEMORY_DISK
178 1.1 bsh /* We have memory disk image outside of the kernel on ROM. */
179 1.1 bsh #ifdef MEMORY_DISK_ROOT_ROM
180 1.1 bsh /* map the image directory and use read-only */
181 1.1 bsh #else
182 1.1 bsh /* copy the image to RAM */
183 1.1 bsh #endif
184 1.1 bsh #endif
185 1.1 bsh
186 1.1 bsh
187 1.1 bsh /*
188 1.1 bsh * Address to call from cpu_reset() to reset the machine.
189 1.1 bsh * This is machine architecture dependant as it varies depending
190 1.1 bsh * on where the ROM appears when you turn the MMU off.
191 1.1 bsh */
192 1.1 bsh u_int cpu_reset_address = (u_int)0;
193 1.1 bsh
194 1.1 bsh /* Define various stack sizes in pages */
195 1.1 bsh #define IRQ_STACK_SIZE 1
196 1.1 bsh #define ABT_STACK_SIZE 1
197 1.1 bsh #ifdef IPKDB
198 1.1 bsh #define UND_STACK_SIZE 2
199 1.1 bsh #else
200 1.1 bsh #define UND_STACK_SIZE 1
201 1.1 bsh #endif
202 1.1 bsh
203 1.1 bsh BootConfig bootconfig; /* Boot config storage */
204 1.1 bsh char *boot_args = NULL;
205 1.1 bsh char *boot_file = NULL;
206 1.1 bsh
207 1.1 bsh vm_offset_t physical_start;
208 1.1 bsh vm_offset_t physical_freestart;
209 1.1 bsh vm_offset_t physical_freeend;
210 1.1 bsh vm_offset_t physical_end;
211 1.1 bsh u_int free_pages;
212 1.1 bsh vm_offset_t pagetables_start;
213 1.1 bsh int physmem = 0;
214 1.1 bsh
215 1.1 bsh /*int debug_flags;*/
216 1.1 bsh #ifndef PMAP_STATIC_L1S
217 1.1 bsh int max_processes = 64; /* Default number */
218 1.1 bsh #endif /* !PMAP_STATIC_L1S */
219 1.1 bsh
220 1.1 bsh /* Physical and virtual addresses for some global pages */
221 1.1 bsh pv_addr_t systempage;
222 1.1 bsh pv_addr_t irqstack;
223 1.1 bsh pv_addr_t undstack;
224 1.1 bsh pv_addr_t abtstack;
225 1.1 bsh pv_addr_t kernelstack;
226 1.1 bsh
227 1.1 bsh vm_offset_t msgbufphys;
228 1.1 bsh
229 1.1 bsh extern u_int data_abort_handler_address;
230 1.1 bsh extern u_int prefetch_abort_handler_address;
231 1.1 bsh extern u_int undefined_handler_address;
232 1.1 bsh
233 1.1 bsh #ifdef PMAP_DEBUG
234 1.1 bsh extern int pmap_debug_level;
235 1.1 bsh #endif
236 1.1 bsh
237 1.1 bsh #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
238 1.1 bsh #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
239 1.1 bsh #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */
240 1.1 bsh
241 1.1 bsh #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
242 1.1 bsh
243 1.1 bsh #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
244 1.1 bsh #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
245 1.1 bsh
246 1.1 bsh pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
247 1.1 bsh
248 1.1 bsh struct user *proc0paddr;
249 1.1 bsh
250 1.1 bsh /* Prototypes */
251 1.1 bsh
252 1.1 bsh void consinit(void);
253 1.1 bsh void kgdb_port_init(void);
254 1.1 bsh
255 1.1 bsh
256 1.1 bsh #include "com.h"
257 1.1 bsh #if NCOM > 0
258 1.1 bsh #include <dev/ic/comreg.h>
259 1.1 bsh #include <dev/ic/comvar.h>
260 1.1 bsh #endif
261 1.1 bsh
262 1.1 bsh #include "sscom.h"
263 1.1 bsh #if NSSCOM > 0
264 1.1 bsh #include "opt_sscom.h"
265 1.1 bsh #include <arm/s3c2xx0/sscom_var.h>
266 1.1 bsh #endif
267 1.1 bsh
268 1.1 bsh /*
269 1.1 bsh * Define the default console speed for the board. This is generally
270 1.1 bsh * what the firmware provided with the board defaults to.
271 1.1 bsh */
272 1.1 bsh #ifndef CONSPEED
273 1.1 bsh #define CONSPEED B115200 /* TTYDEF_SPEED */
274 1.1 bsh #endif
275 1.1 bsh #ifndef CONMODE
276 1.1 bsh #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
277 1.1 bsh #endif
278 1.1 bsh
279 1.1 bsh int comcnspeed = CONSPEED;
280 1.1 bsh int comcnmode = CONMODE;
281 1.1 bsh
282 1.1 bsh
283 1.1 bsh /*
284 1.1 bsh * void cpu_reboot(int howto, char *bootstr)
285 1.1 bsh *
286 1.1 bsh * Reboots the system
287 1.1 bsh *
288 1.1 bsh * Deal with any syncing, unmounting, dumping and shutdown hooks,
289 1.1 bsh * then reset the CPU.
290 1.1 bsh */
291 1.1 bsh void
292 1.1 bsh cpu_reboot(int howto, char *bootstr)
293 1.1 bsh {
294 1.1 bsh #ifdef DIAGNOSTIC
295 1.1 bsh /* info */
296 1.1 bsh printf("boot: howto=%08x curproc=%p\n", howto, curproc);
297 1.1 bsh #endif
298 1.1 bsh
299 1.1 bsh cpu_reset_address = vtophys((u_int)s3c2410_softreset);
300 1.1 bsh
301 1.1 bsh /*
302 1.1 bsh * If we are still cold then hit the air brakes
303 1.1 bsh * and crash to earth fast
304 1.1 bsh */
305 1.1 bsh if (cold) {
306 1.1 bsh doshutdownhooks();
307 1.1 bsh printf("The operating system has halted.\n");
308 1.1 bsh printf("Please press any key to reboot.\n\n");
309 1.1 bsh cngetc();
310 1.1 bsh printf("rebooting...\n");
311 1.1 bsh cpu_reset();
312 1.1 bsh /* NOTREACHED */
313 1.1 bsh }
314 1.1 bsh /* Disable console buffering */
315 1.1 bsh
316 1.1 bsh /*
317 1.1 bsh * If RB_NOSYNC was not specified sync the discs.
318 1.1 bsh * Note: Unless cold is set to 1 here, syslogd will die during the
319 1.1 bsh * unmount. It looks like syslogd is getting woken up only to find
320 1.1 bsh * that it cannot page part of the binary in as the filesystem has
321 1.1 bsh * been unmounted.
322 1.1 bsh */
323 1.1 bsh if (!(howto & RB_NOSYNC))
324 1.1 bsh bootsync();
325 1.1 bsh
326 1.1 bsh /* Say NO to interrupts */
327 1.1 bsh splhigh();
328 1.1 bsh
329 1.1 bsh /* Do a dump if requested. */
330 1.1 bsh if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
331 1.1 bsh dumpsys();
332 1.1 bsh
333 1.1 bsh /* Run any shutdown hooks */
334 1.1 bsh doshutdownhooks();
335 1.1 bsh
336 1.1 bsh /* Make sure IRQ's are disabled */
337 1.1 bsh IRQdisable;
338 1.1 bsh
339 1.1 bsh if (howto & RB_HALT) {
340 1.1 bsh printf("The operating system has halted.\n");
341 1.1 bsh printf("Please press any key to reboot.\n\n");
342 1.1 bsh cngetc();
343 1.1 bsh }
344 1.1 bsh printf("rebooting...\n");
345 1.1 bsh cpu_reset();
346 1.1 bsh /* NOTREACHED */
347 1.1 bsh }
348 1.2 bsh
349 1.12 bsh /*
350 1.12 bsh * Static device mappings. These peripheral registers are mapped at
351 1.12 bsh * fixed virtual addresses very early in initarm() so that we can use
352 1.12 bsh * them while booting the kernel , and stay at the same address
353 1.12 bsh * throughout whole kernel's life time.
354 1.12 bsh *
355 1.12 bsh * We use this table twice; once with bootstrap page table, and once
356 1.12 bsh * with kernel's page table which we build up in initarm().
357 1.12 bsh *
358 1.12 bsh * Since we map these registers into the bootstrap page table using
359 1.12 bsh * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
360 1.12 bsh * registers segment-aligned and segment-rounded in order to avoid
361 1.12 bsh * using the 2nd page tables.
362 1.12 bsh */
363 1.12 bsh
364 1.12 bsh #define _A(a) ((a) & ~L1_S_OFFSET)
365 1.12 bsh #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
366 1.12 bsh
367 1.12 bsh #define _V(n) (SMDK2410_IO_VBASE + (n) * L1_S_SIZE)
368 1.12 bsh
369 1.12 bsh #define GPIO_VBASE _V(0)
370 1.12 bsh #define INTCTL_VBASE _V(1)
371 1.12 bsh #define CLKMAN_VBASE _V(2)
372 1.12 bsh #define UART_VBASE _V(3)
373 1.12 bsh #ifdef MEMORY_DISK_DYNAMIC
374 1.12 bsh #define MEMORY_DISK_VADDR _V(4)
375 1.12 bsh #endif
376 1.12 bsh
377 1.12 bsh static const struct pmap_devmap smdk2410_devmap[] = {
378 1.12 bsh /* GPIO registers */
379 1.12 bsh {
380 1.12 bsh GPIO_VBASE,
381 1.12 bsh _A(S3C2410_GPIO_BASE),
382 1.12 bsh _S(S3C2410_GPIO_SIZE),
383 1.12 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
384 1.12 bsh },
385 1.12 bsh {
386 1.12 bsh INTCTL_VBASE,
387 1.12 bsh _A(S3C2410_INTCTL_BASE),
388 1.12 bsh _S(S3C2410_INTCTL_SIZE),
389 1.12 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
390 1.12 bsh },
391 1.12 bsh {
392 1.12 bsh CLKMAN_VBASE,
393 1.12 bsh _A(S3C2410_CLKMAN_BASE),
394 1.12 bsh _S(S3C24X0_CLKMAN_SIZE),
395 1.12 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
396 1.12 bsh },
397 1.12 bsh { /* UART registers for UART0, 1, 2. */
398 1.12 bsh UART_VBASE,
399 1.12 bsh _A(S3C2410_UART0_BASE),
400 1.12 bsh _S(S3C2410_UART_BASE(3) - S3C2410_UART0_BASE),
401 1.12 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
402 1.12 bsh },
403 1.12 bsh
404 1.12 bsh { 0, 0, 0, 0 }
405 1.12 bsh };
406 1.12 bsh
407 1.12 bsh #undef _A
408 1.12 bsh #undef _S
409 1.12 bsh
410 1.14 perry static inline pd_entry_t *
411 1.12 bsh read_ttb(void)
412 1.12 bsh {
413 1.12 bsh long ttb;
414 1.12 bsh
415 1.14 perry __asm volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb));
416 1.12 bsh
417 1.12 bsh
418 1.12 bsh return (pd_entry_t *)(ttb & ~((1 << 14) - 1));
419 1.12 bsh }
420 1.12 bsh
421 1.12 bsh
422 1.12 bsh #define ioreg_read8(a) (*(volatile uint8_t *)(a))
423 1.12 bsh #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v))
424 1.6 bsh #define ioreg_read32(a) (*(volatile uint32_t *)(a))
425 1.6 bsh #define ioreg_write32(a,v) (*(volatile uint32_t *)(a)=(v))
426 1.1 bsh
427 1.1 bsh /*
428 1.1 bsh * u_int initarm(...)
429 1.1 bsh *
430 1.1 bsh * Initial entry point on startup. This gets called before main() is
431 1.1 bsh * entered.
432 1.1 bsh * It should be responsible for setting up everything that must be
433 1.1 bsh * in place when main is called.
434 1.1 bsh * This includes
435 1.1 bsh * Taking a copy of the boot configuration structure.
436 1.1 bsh * Initialising the physical console so characters can be printed.
437 1.1 bsh * Setting up page tables for the kernel
438 1.1 bsh * Relocating the kernel to the bottom of physical memory
439 1.1 bsh */
440 1.1 bsh
441 1.1 bsh u_int
442 1.1 bsh initarm(void *arg)
443 1.1 bsh {
444 1.1 bsh int loop;
445 1.1 bsh int loop1;
446 1.1 bsh u_int l1pagetable;
447 1.1 bsh extern int etext asm("_etext");
448 1.1 bsh extern int end asm("_end");
449 1.1 bsh pv_addr_t kernel_l1pt;
450 1.1 bsh int progress_counter = 0;
451 1.1 bsh
452 1.1 bsh #ifdef DO_MEMORY_DISK
453 1.1 bsh vm_offset_t md_root_start;
454 1.1 bsh #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE)
455 1.1 bsh #endif
456 1.1 bsh
457 1.12 bsh #define gpio_read8(reg) ioreg_read8(GPIO_VBASE + (reg))
458 1.1 bsh
459 1.1 bsh #define LEDSTEP() __LED(progress_counter++)
460 1.1 bsh
461 1.1 bsh #define pdatf (*(volatile uint8_t *)(S3C2410_GPIO_BASE+GPIO_PFDAT))
462 1.1 bsh #define __LED(x) (pdatf = (pdatf & ~0xf0) | (~(x) & 0xf0))
463 1.1 bsh
464 1.1 bsh LEDSTEP();
465 1.6 bsh
466 1.6 bsh /* CS8900A on CS3 and CL-PD7610 need nBE1 signal. make sure
467 1.6 bsh * memory controller is set correctly. (USB download firmware
468 1.6 bsh * doesn't do this right) Also, we use WAIT signal for them.
469 1.6 bsh */
470 1.6 bsh ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON,
471 1.6 bsh (BWSCON_ST|BWSCON_WS) << BWSCON_BANK_SHIFT(2) |
472 1.6 bsh (BWSCON_ST|BWSCON_WS) << BWSCON_BANK_SHIFT(3) |
473 1.6 bsh ioreg_read32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON));
474 1.6 bsh /* tweak access timing for CS8900A */
475 1.6 bsh ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BANKCON(3),
476 1.6 bsh (0<<BANKCON_TACS_SHIFT)|(1<<BANKCON_TCOS_SHIFT)|
477 1.6 bsh (7<<BANKCON_TACC_SHIFT)|(0<<BANKCON_TOCH_SHIFT)|
478 1.6 bsh (0<<BANKCON_TCAH_SHIFT));
479 1.6 bsh
480 1.1 bsh /*
481 1.1 bsh * Heads up ... Setup the CPU / MMU / TLB functions
482 1.1 bsh */
483 1.1 bsh if (set_cpufuncs())
484 1.1 bsh panic("cpu not recognized!");
485 1.1 bsh
486 1.1 bsh LEDSTEP();
487 1.1 bsh
488 1.1 bsh /*
489 1.12 bsh * Map I/O registers that are used in startup. Now we are
490 1.12 bsh * still using page table prepared by bootloader. Later we'll
491 1.12 bsh * map those registers at the same address in the kernel page
492 1.12 bsh * table.
493 1.1 bsh */
494 1.12 bsh pmap_devmap_bootstrap((vaddr_t)read_ttb(), smdk2410_devmap);
495 1.12 bsh
496 1.12 bsh #undef pdatf
497 1.12 bsh #define pdatf (*(volatile uint8_t *)(GPIO_VBASE+GPIO_PFDAT))
498 1.12 bsh
499 1.1 bsh
500 1.1 bsh LEDSTEP();
501 1.1 bsh
502 1.1 bsh /* Disable all peripheral interrupts */
503 1.12 bsh ioreg_write32(INTCTL_VBASE + INTCTL_INTMSK, ~0);
504 1.12 bsh
505 1.8 bsh /* initialize some variables so that splfoo() doesn't
506 1.8 bsh touch illegal address. */
507 1.12 bsh s3c2xx0_intr_bootstrap(INTCTL_VBASE);
508 1.1 bsh
509 1.1 bsh consinit();
510 1.3 bsh #ifdef VERBOSE_INIT_ARM
511 1.1 bsh printf("consinit done\n");
512 1.3 bsh #endif
513 1.1 bsh
514 1.1 bsh #ifdef KGDB
515 1.1 bsh LEDSTEP();
516 1.1 bsh kgdb_port_init();
517 1.1 bsh #endif
518 1.1 bsh LEDSTEP();
519 1.1 bsh
520 1.3 bsh #ifdef VERBOSE_INIT_ARM
521 1.1 bsh /* Talk to the user */
522 1.1 bsh printf("\nNetBSD/evbarm (SMDK2410) booting ...\n");
523 1.3 bsh #endif
524 1.1 bsh /*
525 1.1 bsh * Ok we have the following memory map
526 1.1 bsh *
527 1.1 bsh * Physical Address Range Description
528 1.1 bsh * ----------------------- ----------------------------------
529 1.1 bsh * 0x00000000 - 0x00ffffff Intel flash Memory (16MB)
530 1.1 bsh * 0x02000000 - 0x020fffff AMD flash Memory (1MB)
531 1.1 bsh * or (depend on DIPSW setting)
532 1.1 bsh * 0x00000000 - 0x000fffff AMD flash Memory (1MB)
533 1.1 bsh * 0x02000000 - 0x02ffffff Intel flash Memory (16MB)
534 1.1 bsh *
535 1.1 bsh * 0x30000000 - 0x31ffffff SDRAM (32MB)
536 1.1 bsh *
537 1.1 bsh * The initarm() has the responsibility for creating the kernel
538 1.1 bsh * page tables.
539 1.1 bsh * It must also set up various memory pointers that are used
540 1.1 bsh * by pmap etc.
541 1.1 bsh */
542 1.1 bsh
543 1.1 bsh /* Fake bootconfig structure for the benefit of pmap.c */
544 1.1 bsh /* XXX must make the memory description h/w independent */
545 1.1 bsh bootconfig.dramblocks = 1;
546 1.1 bsh bootconfig.dram[0].address = SDRAM_START;
547 1.1 bsh bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE;
548 1.1 bsh
549 1.1 bsh /*
550 1.1 bsh * Set up the variables that define the availablilty of
551 1.1 bsh * physical memory. For now, we're going to set
552 1.1 bsh * physical_freestart to 0x08200000 (where the kernel
553 1.1 bsh * was loaded), and allocate the memory we need downwards.
554 1.1 bsh * If we get too close to the bottom of SDRAM, we
555 1.1 bsh * will panic. We will update physical_freestart and
556 1.1 bsh * physical_freeend later to reflect what pmap_bootstrap()
557 1.1 bsh * wants to see.
558 1.1 bsh *
559 1.1 bsh * XXX pmap_bootstrap() needs an enema.
560 1.1 bsh */
561 1.1 bsh physical_start = bootconfig.dram[0].address;
562 1.1 bsh physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
563 1.1 bsh
564 1.1 bsh #ifdef DO_MEMORY_DISK
565 1.1 bsh #ifdef MEMORY_DISK_ROOT_ROM
566 1.1 bsh md_root_start = MEMORY_DISK_ROOT_ADDR;
567 1.1 bsh boothowto |= RB_RDONLY;
568 1.1 bsh #else
569 1.1 bsh /* Reserve physmem for ram disk */
570 1.1 bsh md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1));
571 1.1 bsh printf("Reserve %ld bytes for memory disk\n",
572 1.1 bsh physical_end - md_root_start);
573 1.1 bsh /* copy fs contents */
574 1.1 bsh memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR,
575 1.1 bsh MD_ROOT_SIZE);
576 1.1 bsh physical_end = md_root_start;
577 1.1 bsh #endif
578 1.1 bsh #endif
579 1.1 bsh
580 1.1 bsh physical_freestart = SDRAM_START; /* XXX */
581 1.1 bsh physical_freeend = SDRAM_START + 0x00200000;
582 1.1 bsh
583 1.1 bsh physmem = (physical_end - physical_start) / PAGE_SIZE;
584 1.1 bsh
585 1.1 bsh #ifdef VERBOSE_INIT_ARM
586 1.1 bsh /* Tell the user about the memory */
587 1.1 bsh printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
588 1.1 bsh physical_start, physical_end - 1);
589 1.1 bsh #endif
590 1.1 bsh
591 1.1 bsh /*
592 1.1 bsh * XXX
593 1.1 bsh * Okay, the kernel starts 2MB in from the bottom of physical
594 1.1 bsh * memory. We are going to allocate our bootstrap pages downwards
595 1.1 bsh * from there.
596 1.1 bsh *
597 1.1 bsh * We need to allocate some fixed page tables to get the kernel
598 1.1 bsh * going. We allocate one page directory and a number of page
599 1.1 bsh * tables and store the physical addresses in the kernel_pt_table
600 1.1 bsh * array.
601 1.1 bsh *
602 1.1 bsh * The kernel page directory must be on a 16K boundary. The page
603 1.10 abs * tables must be on 4K boundaries. What we do is allocate the
604 1.1 bsh * page directory on the first 16K boundary that we encounter, and
605 1.1 bsh * the page tables on 4K boundaries otherwise. Since we allocate
606 1.1 bsh * at least 3 L2 page tables, we are guaranteed to encounter at
607 1.1 bsh * least one 16K aligned region.
608 1.1 bsh */
609 1.1 bsh
610 1.1 bsh #ifdef VERBOSE_INIT_ARM
611 1.1 bsh printf("Allocating page tables\n");
612 1.1 bsh #endif
613 1.1 bsh
614 1.1 bsh free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
615 1.1 bsh
616 1.1 bsh #ifdef VERBOSE_INIT_ARM
617 1.1 bsh printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
618 1.1 bsh physical_freestart, free_pages, free_pages);
619 1.1 bsh #endif
620 1.1 bsh
621 1.1 bsh /* Define a macro to simplify memory allocation */
622 1.1 bsh #define valloc_pages(var, np) \
623 1.1 bsh alloc_pages((var).pv_pa, (np)); \
624 1.1 bsh (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
625 1.1 bsh
626 1.1 bsh #define alloc_pages(var, np) \
627 1.1 bsh physical_freeend -= ((np) * PAGE_SIZE); \
628 1.1 bsh if (physical_freeend < physical_freestart) \
629 1.1 bsh panic("initarm: out of memory"); \
630 1.1 bsh (var) = physical_freeend; \
631 1.1 bsh free_pages -= (np); \
632 1.1 bsh memset((char *)(var), 0, ((np) * PAGE_SIZE));
633 1.1 bsh
634 1.1 bsh loop1 = 0;
635 1.1 bsh kernel_l1pt.pv_pa = 0;
636 1.1 bsh for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
637 1.1 bsh /* Are we 16KB aligned for an L1 ? */
638 1.1 bsh if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
639 1.1 bsh && kernel_l1pt.pv_pa == 0) {
640 1.1 bsh valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
641 1.1 bsh } else {
642 1.1 bsh valloc_pages(kernel_pt_table[loop1],
643 1.1 bsh L2_TABLE_SIZE / PAGE_SIZE);
644 1.1 bsh ++loop1;
645 1.1 bsh }
646 1.1 bsh }
647 1.1 bsh
648 1.1 bsh /* This should never be able to happen but better confirm that. */
649 1.1 bsh if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0)
650 1.1 bsh panic("initarm: Failed to align the kernel page directory\n");
651 1.1 bsh
652 1.1 bsh /*
653 1.1 bsh * Allocate a page for the system page mapped to V0x00000000
654 1.1 bsh * This page will just contain the system vectors and can be
655 1.1 bsh * shared by all processes.
656 1.1 bsh */
657 1.1 bsh alloc_pages(systempage.pv_pa, 1);
658 1.1 bsh
659 1.1 bsh /* Allocate stacks for all modes */
660 1.1 bsh valloc_pages(irqstack, IRQ_STACK_SIZE);
661 1.1 bsh valloc_pages(abtstack, ABT_STACK_SIZE);
662 1.1 bsh valloc_pages(undstack, UND_STACK_SIZE);
663 1.1 bsh valloc_pages(kernelstack, UPAGES);
664 1.1 bsh
665 1.1 bsh #ifdef VERBOSE_INIT_ARM
666 1.1 bsh printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
667 1.1 bsh irqstack.pv_va);
668 1.1 bsh printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
669 1.1 bsh abtstack.pv_va);
670 1.1 bsh printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
671 1.1 bsh undstack.pv_va);
672 1.1 bsh printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
673 1.1 bsh kernelstack.pv_va);
674 1.1 bsh #endif
675 1.1 bsh
676 1.1 bsh alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
677 1.1 bsh
678 1.1 bsh LEDSTEP();
679 1.1 bsh
680 1.1 bsh /*
681 1.1 bsh * Ok we have allocated physical pages for the primary kernel
682 1.1 bsh * page tables
683 1.1 bsh */
684 1.1 bsh
685 1.1 bsh #ifdef VERBOSE_INIT_ARM
686 1.1 bsh printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
687 1.1 bsh #endif
688 1.1 bsh
689 1.1 bsh /*
690 1.1 bsh * Now we start construction of the L1 page table
691 1.1 bsh * We start by mapping the L2 page tables into the L1.
692 1.1 bsh * This means that we can replace L1 mappings later on if necessary
693 1.1 bsh */
694 1.1 bsh l1pagetable = kernel_l1pt.pv_pa;
695 1.1 bsh
696 1.1 bsh /* Map the L2 pages tables in the L1 page table */
697 1.1 bsh pmap_link_l2pt(l1pagetable, 0x00000000,
698 1.1 bsh &kernel_pt_table[KERNEL_PT_SYS]);
699 1.1 bsh for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
700 1.1 bsh pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
701 1.1 bsh &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
702 1.1 bsh for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
703 1.1 bsh pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
704 1.1 bsh &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
705 1.1 bsh
706 1.1 bsh /* update the top of the kernel VM */
707 1.1 bsh pmap_curmaxkvaddr =
708 1.1 bsh KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
709 1.1 bsh
710 1.1 bsh #ifdef VERBOSE_INIT_ARM
711 1.1 bsh printf("Mapping kernel\n");
712 1.1 bsh #endif
713 1.1 bsh
714 1.1 bsh /* Now we fill in the L2 pagetable for the kernel static code/data */
715 1.1 bsh {
716 1.1 bsh size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE;
717 1.1 bsh size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE;
718 1.1 bsh u_int logical;
719 1.1 bsh
720 1.1 bsh textsize = (textsize + PGOFSET) & ~PGOFSET;
721 1.1 bsh totalsize = (totalsize + PGOFSET) & ~PGOFSET;
722 1.1 bsh
723 1.1 bsh logical = 0x00200000; /* offset of kernel in RAM */
724 1.1 bsh
725 1.1 bsh logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
726 1.1 bsh physical_start + logical, textsize,
727 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
728 1.1 bsh logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
729 1.1 bsh physical_start + logical, totalsize - textsize,
730 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
731 1.1 bsh }
732 1.1 bsh
733 1.1 bsh #ifdef VERBOSE_INIT_ARM
734 1.1 bsh printf("Constructing L2 page tables\n");
735 1.1 bsh #endif
736 1.1 bsh
737 1.1 bsh /* Map the stack pages */
738 1.1 bsh pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
739 1.1 bsh IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
740 1.1 bsh PTE_CACHE);
741 1.1 bsh pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
742 1.1 bsh ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
743 1.1 bsh PTE_CACHE);
744 1.1 bsh pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
745 1.1 bsh UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
746 1.1 bsh PTE_CACHE);
747 1.1 bsh pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
748 1.1 bsh UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
749 1.1 bsh
750 1.1 bsh pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
751 1.1 bsh L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
752 1.1 bsh
753 1.1 bsh for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
754 1.1 bsh pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
755 1.1 bsh kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
756 1.1 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
757 1.1 bsh }
758 1.1 bsh
759 1.1 bsh /* Map the vector page. */
760 1.1 bsh #if 1
761 1.1 bsh /* MULTI-ICE requires that page 0 is NC/NB so that it can download the
762 1.1 bsh * cache-clean code there. */
763 1.1 bsh pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
764 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
765 1.1 bsh #else
766 1.1 bsh pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
767 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
768 1.1 bsh #endif
769 1.1 bsh
770 1.1 bsh #ifdef MEMORY_DISK_DYNAMIC
771 1.1 bsh /* map MD root image */
772 1.12 bsh pmap_map_chunk(l1pagetable, MEMORY_DISK_VADDR, md_root_start,
773 1.12 bsh MD_ROOT_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
774 1.1 bsh
775 1.1 bsh md_root_setconf((void *)md_root_start, MD_ROOT_SIZE);
776 1.1 bsh #endif /* MEMORY_DISK_DYNAMIC */
777 1.1 bsh /*
778 1.1 bsh * map integrated peripherals at same address in l1pagetable
779 1.1 bsh * so that we can continue to use console.
780 1.1 bsh */
781 1.12 bsh pmap_devmap_bootstrap(l1pagetable, smdk2410_devmap);
782 1.1 bsh
783 1.1 bsh /*
784 1.1 bsh * Now we have the real page tables in place so we can switch to them.
785 1.1 bsh * Once this is done we will be running with the REAL kernel page
786 1.1 bsh * tables.
787 1.1 bsh */
788 1.1 bsh
789 1.1 bsh /*
790 1.1 bsh * Update the physical_freestart/physical_freeend/free_pages
791 1.1 bsh * variables.
792 1.1 bsh */
793 1.1 bsh {
794 1.1 bsh physical_freestart = physical_start +
795 1.1 bsh (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE);
796 1.1 bsh physical_freeend = physical_end;
797 1.1 bsh free_pages =
798 1.1 bsh (physical_freeend - physical_freestart) / PAGE_SIZE;
799 1.1 bsh }
800 1.1 bsh
801 1.1 bsh /* Switch tables */
802 1.1 bsh #ifdef VERBOSE_INIT_ARM
803 1.1 bsh printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
804 1.1 bsh physical_freestart, free_pages, free_pages);
805 1.1 bsh printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
806 1.1 bsh #endif
807 1.1 bsh LEDSTEP();
808 1.1 bsh cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
809 1.1 bsh setttb(kernel_l1pt.pv_pa);
810 1.1 bsh cpu_tlb_flushID();
811 1.1 bsh cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
812 1.1 bsh
813 1.1 bsh /*
814 1.1 bsh * Moved from cpu_startup() as data_abort_handler() references
815 1.1 bsh * this during uvm init
816 1.1 bsh */
817 1.1 bsh proc0paddr = (struct user *)kernelstack.pv_va;
818 1.1 bsh lwp0.l_addr = proc0paddr;
819 1.1 bsh
820 1.1 bsh #ifdef VERBOSE_INIT_ARM
821 1.1 bsh printf("done!\n");
822 1.1 bsh #endif
823 1.1 bsh
824 1.1 bsh LEDSTEP();
825 1.1 bsh #ifdef VERBOSE_INIT_ARM
826 1.1 bsh printf("bootstrap done.\n");
827 1.1 bsh #endif
828 1.1 bsh
829 1.1 bsh arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
830 1.1 bsh
831 1.1 bsh /*
832 1.1 bsh * Pages were allocated during the secondary bootstrap for the
833 1.1 bsh * stacks for different CPU modes.
834 1.1 bsh * We must now set the r13 registers in the different CPU modes to
835 1.1 bsh * point to these stacks.
836 1.1 bsh * Since the ARM stacks use STMFD etc. we must set r13 to the top end
837 1.1 bsh * of the stack memory.
838 1.1 bsh */
839 1.3 bsh #ifdef VERBOSE_INIT_ARM
840 1.1 bsh printf("init subsystems: stacks ");
841 1.3 bsh #endif
842 1.1 bsh
843 1.1 bsh set_stackptr(PSR_IRQ32_MODE,
844 1.1 bsh irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
845 1.1 bsh set_stackptr(PSR_ABT32_MODE,
846 1.1 bsh abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
847 1.1 bsh set_stackptr(PSR_UND32_MODE,
848 1.1 bsh undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
849 1.1 bsh
850 1.1 bsh LEDSTEP();
851 1.1 bsh
852 1.1 bsh /*
853 1.1 bsh * Well we should set a data abort handler.
854 1.1 bsh * Once things get going this will change as we will need a proper
855 1.1 bsh * handler.
856 1.1 bsh * Until then we will use a handler that just panics but tells us
857 1.1 bsh * why.
858 1.1 bsh * Initialisation of the vectors will just panic on a data abort.
859 1.9 abs * This just fills in a slightly better one.
860 1.1 bsh */
861 1.1 bsh #ifdef VERBOSE_INIT_ARM
862 1.1 bsh printf("vectors ");
863 1.1 bsh #endif
864 1.1 bsh data_abort_handler_address = (u_int)data_abort_handler;
865 1.1 bsh prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
866 1.1 bsh undefined_handler_address = (u_int)undefinedinstruction_bounce;
867 1.1 bsh
868 1.1 bsh /* Initialise the undefined instruction handlers */
869 1.3 bsh #ifdef VERBOSE_INIT_ARM
870 1.1 bsh printf("undefined ");
871 1.3 bsh #endif
872 1.1 bsh undefined_init();
873 1.1 bsh
874 1.1 bsh LEDSTEP();
875 1.1 bsh
876 1.1 bsh /* Load memory into UVM. */
877 1.1 bsh #ifdef VERBOSE_INIT_ARM
878 1.1 bsh printf("page ");
879 1.1 bsh #endif
880 1.1 bsh uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
881 1.1 bsh uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
882 1.1 bsh atop(physical_freestart), atop(physical_freeend),
883 1.1 bsh VM_FREELIST_DEFAULT);
884 1.1 bsh
885 1.1 bsh LEDSTEP();
886 1.1 bsh /* Boot strap pmap telling it where the kernel page table is */
887 1.1 bsh #ifdef VERBOSE_INIT_ARM
888 1.1 bsh printf("pmap ");
889 1.1 bsh #endif
890 1.1 bsh pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
891 1.1 bsh KERNEL_VM_BASE + KERNEL_VM_SIZE);
892 1.1 bsh
893 1.1 bsh LEDSTEP();
894 1.1 bsh
895 1.1 bsh /* Setup the IRQ system */
896 1.1 bsh #ifdef VERBOSE_INIT_ARM
897 1.1 bsh printf("irq ");
898 1.1 bsh #endif
899 1.1 bsh /* XXX irq_init(); */
900 1.1 bsh
901 1.3 bsh #ifdef VERBOSE_INIT_ARM
902 1.1 bsh printf("done.\n");
903 1.3 bsh #endif
904 1.1 bsh
905 1.1 bsh #ifdef BOOTHOWTO
906 1.1 bsh boothowto |= BOOTHOWTO;
907 1.1 bsh #endif
908 1.1 bsh {
909 1.1 bsh uint8_t gpio = ~gpio_read8(GPIO_PFDAT);
910 1.1 bsh
911 1.1 bsh if (gpio & (1<<0)) /* SW1 (EINT0) */
912 1.1 bsh boothowto ^= RB_SINGLE;
913 1.1 bsh if (gpio & (1<<2)) /* SW2 (EINT2) */
914 1.1 bsh boothowto ^= RB_KDB;
915 1.1 bsh #ifdef VERBOSE_INIT_ARM
916 1.1 bsh printf( "sw: %x boothowto: %x\n", gpio, boothowto );
917 1.1 bsh #endif
918 1.1 bsh }
919 1.1 bsh
920 1.1 bsh #ifdef IPKDB
921 1.1 bsh /* Initialise ipkdb */
922 1.1 bsh ipkdb_init();
923 1.1 bsh if (boothowto & RB_KDB)
924 1.1 bsh ipkdb_connect(0);
925 1.1 bsh #endif
926 1.1 bsh
927 1.1 bsh #ifdef KGDB
928 1.1 bsh if (boothowto & RB_KDB) {
929 1.1 bsh kgdb_debug_init = 1;
930 1.1 bsh kgdb_connect(1);
931 1.1 bsh }
932 1.1 bsh #endif
933 1.1 bsh
934 1.1 bsh #if NKSYMS || defined(DDB) || defined(LKM)
935 1.1 bsh /* Firmware doesn't load symbols. */
936 1.1 bsh ksyms_init(0, NULL, NULL);
937 1.1 bsh #endif
938 1.1 bsh
939 1.1 bsh #ifdef DDB
940 1.1 bsh db_machine_init();
941 1.1 bsh if (boothowto & RB_KDB)
942 1.1 bsh Debugger();
943 1.1 bsh #endif
944 1.1 bsh
945 1.1 bsh /* We return the new stack pointer address */
946 1.1 bsh return (kernelstack.pv_va + USPACE_SVC_STACK_TOP);
947 1.1 bsh }
948 1.1 bsh
949 1.1 bsh void
950 1.1 bsh consinit(void)
951 1.1 bsh {
952 1.1 bsh static int consinit_done = 0;
953 1.12 bsh bus_space_tag_t iot = &s3c2xx0_bs_tag;
954 1.12 bsh int pclk;
955 1.1 bsh
956 1.1 bsh if (consinit_done != 0)
957 1.1 bsh return;
958 1.1 bsh
959 1.1 bsh consinit_done = 1;
960 1.1 bsh
961 1.12 bsh s3c24x0_clock_freq2(CLKMAN_VBASE, NULL, NULL, &pclk);
962 1.12 bsh
963 1.1 bsh #if NSSCOM > 0
964 1.1 bsh #ifdef SSCOM0CONSOLE
965 1.1 bsh if (0 == s3c2410_sscom_cnattach(iot, 0, comcnspeed,
966 1.1 bsh pclk, comcnmode))
967 1.1 bsh return;
968 1.1 bsh #endif
969 1.1 bsh #ifdef SSCOM1CONSOLE
970 1.1 bsh if (0 == s3c2410_sscom_cnattach(iot, 1, comcnspeed,
971 1.1 bsh pclk, comcnmode))
972 1.1 bsh return;
973 1.1 bsh #endif
974 1.1 bsh #endif /* NSSCOM */
975 1.1 bsh #if NCOM>0 && defined(CONCOMADDR)
976 1.1 bsh if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed,
977 1.1 bsh COM_FREQ, COM_TYPE_NORMAL, comcnmode))
978 1.1 bsh panic("can't init serial console @%x", CONCOMADDR);
979 1.1 bsh return;
980 1.1 bsh #endif
981 1.1 bsh
982 1.1 bsh consinit_done = 0;
983 1.1 bsh }
984 1.1 bsh
985 1.1 bsh
986 1.1 bsh #ifdef KGDB
987 1.1 bsh
988 1.1 bsh #if (NSSCOM > 0)
989 1.1 bsh
990 1.1 bsh #ifdef KGDB_DEVNAME
991 1.1 bsh const char kgdb_devname[] = KGDB_DEVNAME;
992 1.1 bsh #else
993 1.1 bsh const char kgdb_devname[] = "";
994 1.1 bsh #endif
995 1.1 bsh
996 1.1 bsh #ifndef KGDB_DEVMODE
997 1.1 bsh #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */
998 1.1 bsh #endif
999 1.1 bsh int kgdb_sscom_mode = KGDB_DEVMODE;
1000 1.1 bsh
1001 1.1 bsh #endif /* NSSCOM */
1002 1.1 bsh
1003 1.1 bsh void
1004 1.1 bsh kgdb_port_init(void)
1005 1.1 bsh {
1006 1.1 bsh #if (NSSCOM > 0)
1007 1.1 bsh int unit = -1;
1008 1.12 bsh int pclk;
1009 1.1 bsh
1010 1.1 bsh if (strcmp(kgdb_devname, "sscom0") == 0)
1011 1.1 bsh unit = 0;
1012 1.1 bsh else if (strcmp(kgdb_devname, "sscom1") == 0)
1013 1.1 bsh unit = 1;
1014 1.1 bsh
1015 1.1 bsh if (unit >= 0) {
1016 1.12 bsh s3c24x0_clock_freq2(CLKMAN_VBASE, NULL, NULL, &pclk);
1017 1.12 bsh
1018 1.12 bsh s3c2410_sscom_kgdb_attach(&s3c2xx0_bs_tag,
1019 1.1 bsh unit, kgdb_rate, pclk, kgdb_sscom_mode);
1020 1.1 bsh }
1021 1.1 bsh #endif
1022 1.1 bsh }
1023 1.1 bsh #endif
1024 1.1 bsh
1025 1.14 perry static inline void
1026 1.1 bsh writeback_dcache_line(vaddr_t va)
1027 1.1 bsh {
1028 1.1 bsh /* writeback Dcache line */
1029 1.1 bsh /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9
1030 1.1 bsh * assume write-through cache, and always flush Dcache instead of
1031 1.1 bsh * cleaning it. Since Boot loader maps page table with write-back
1032 1.1 bsh * cached, we really need to clean Dcache. */
1033 1.1 bsh asm("mcr p15, 0, %0, c7, c10, 1"
1034 1.1 bsh : : "r"(va));
1035 1.1 bsh }
1036 1.1 bsh
1037 1.14 perry static inline void
1038 1.1 bsh clean_dcache_line(vaddr_t va)
1039 1.1 bsh {
1040 1.1 bsh /* writeback and invalidate Dcache line */
1041 1.1 bsh asm("mcr p15, 0, %0, c7, c14, 1"
1042 1.1 bsh : : "r"(va));
1043 1.1 bsh }
1044 1.1 bsh
1045 1.4 bsh static struct arm32_dma_range smdk2410_dma_ranges[1];
1046 1.4 bsh
1047 1.4 bsh bus_dma_tag_t
1048 1.4 bsh s3c2xx0_bus_dma_init(struct arm32_bus_dma_tag *dma_tag_template)
1049 1.4 bsh {
1050 1.4 bsh extern paddr_t physical_start, physical_end;
1051 1.4 bsh struct arm32_bus_dma_tag *dmat;
1052 1.4 bsh
1053 1.4 bsh smdk2410_dma_ranges[0].dr_sysbase = physical_start;
1054 1.4 bsh smdk2410_dma_ranges[0].dr_busbase = physical_start;
1055 1.4 bsh smdk2410_dma_ranges[0].dr_len = physical_end - physical_start;
1056 1.4 bsh
1057 1.4 bsh #if 1
1058 1.4 bsh dmat = dma_tag_template;
1059 1.4 bsh #else
1060 1.4 bsh dmat = malloc(sizeof *dmat, M_DEVBUF, M_NOWAIT);
1061 1.4 bsh if (dmat == NULL)
1062 1.4 bsh return NULL;
1063 1.4 bsh *dmat = *dma_tag_template;
1064 1.4 bsh #endif
1065 1.4 bsh
1066 1.4 bsh dmat->_ranges = smdk2410_dma_ranges;
1067 1.4 bsh dmat->_nranges = 1;
1068 1.4 bsh
1069 1.4 bsh return dmat;
1070 1.4 bsh }
1071