smdk2410_machdep.c revision 1.8.4.6 1 1.8.4.6 skrll /* $NetBSD: smdk2410_machdep.c,v 1.8.4.6 2005/04/01 14:27:09 skrll Exp $ */
2 1.8.4.2 skrll
3 1.8.4.2 skrll /*
4 1.8.4.2 skrll * Copyright (c) 2002, 2003 Fujitsu Component Limited
5 1.8.4.6 skrll * Copyright (c) 2002, 2003, 2005 Genetec Corporation
6 1.8.4.2 skrll * All rights reserved.
7 1.8.4.2 skrll *
8 1.8.4.2 skrll * Redistribution and use in source and binary forms, with or without
9 1.8.4.2 skrll * modification, are permitted provided that the following conditions
10 1.8.4.2 skrll * are met:
11 1.8.4.2 skrll * 1. Redistributions of source code must retain the above copyright
12 1.8.4.2 skrll * notice, this list of conditions and the following disclaimer.
13 1.8.4.2 skrll * 2. Redistributions in binary form must reproduce the above copyright
14 1.8.4.2 skrll * notice, this list of conditions and the following disclaimer in the
15 1.8.4.2 skrll * documentation and/or other materials provided with the distribution.
16 1.8.4.2 skrll * 3. Neither the name of The Fujitsu Component Limited nor the name of
17 1.8.4.2 skrll * Genetec corporation may not be used to endorse or promote products
18 1.8.4.2 skrll * derived from this software without specific prior written permission.
19 1.8.4.2 skrll *
20 1.8.4.2 skrll * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
21 1.8.4.2 skrll * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 1.8.4.2 skrll * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 1.8.4.2 skrll * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 1.8.4.2 skrll * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
25 1.8.4.2 skrll * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 1.8.4.2 skrll * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 1.8.4.2 skrll * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 1.8.4.2 skrll * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29 1.8.4.2 skrll * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 1.8.4.2 skrll * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 1.8.4.2 skrll * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 1.8.4.2 skrll * SUCH DAMAGE.
33 1.8.4.2 skrll */
34 1.8.4.2 skrll /*
35 1.8.4.2 skrll * Copyright (c) 2001,2002 ARM Ltd
36 1.8.4.2 skrll * All rights reserved.
37 1.8.4.2 skrll *
38 1.8.4.2 skrll * Redistribution and use in source and binary forms, with or without
39 1.8.4.2 skrll * modification, are permitted provided that the following conditions
40 1.8.4.2 skrll * are met:
41 1.8.4.2 skrll * 1. Redistributions of source code must retain the above copyright
42 1.8.4.2 skrll * notice, this list of conditions and the following disclaimer.
43 1.8.4.2 skrll * 2. Redistributions in binary form must reproduce the above copyright
44 1.8.4.2 skrll * notice, this list of conditions and the following disclaimer in the
45 1.8.4.2 skrll * documentation and/or other materials provided with the distribution.
46 1.8.4.2 skrll * 3. The name of the company may not be used to endorse or promote
47 1.8.4.2 skrll * products derived from this software without specific prior written
48 1.8.4.2 skrll * permission.
49 1.8.4.2 skrll *
50 1.8.4.2 skrll * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND
51 1.8.4.2 skrll * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
52 1.8.4.2 skrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
53 1.8.4.2 skrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD
54 1.8.4.2 skrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 1.8.4.2 skrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 1.8.4.2 skrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 1.8.4.2 skrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 1.8.4.2 skrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 1.8.4.2 skrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
60 1.8.4.2 skrll * POSSIBILITY OF SUCH DAMAGE.
61 1.8.4.2 skrll *
62 1.8.4.2 skrll */
63 1.8.4.2 skrll
64 1.8.4.2 skrll /*
65 1.8.4.2 skrll * Copyright (c) 1997,1998 Mark Brinicombe.
66 1.8.4.2 skrll * Copyright (c) 1997,1998 Causality Limited.
67 1.8.4.2 skrll * All rights reserved.
68 1.8.4.2 skrll *
69 1.8.4.2 skrll * Redistribution and use in source and binary forms, with or without
70 1.8.4.2 skrll * modification, are permitted provided that the following conditions
71 1.8.4.2 skrll * are met:
72 1.8.4.2 skrll * 1. Redistributions of source code must retain the above copyright
73 1.8.4.2 skrll * notice, this list of conditions and the following disclaimer.
74 1.8.4.2 skrll * 2. Redistributions in binary form must reproduce the above copyright
75 1.8.4.2 skrll * notice, this list of conditions and the following disclaimer in the
76 1.8.4.2 skrll * documentation and/or other materials provided with the distribution.
77 1.8.4.2 skrll * 3. All advertising materials mentioning features or use of this software
78 1.8.4.2 skrll * must display the following acknowledgement:
79 1.8.4.2 skrll * This product includes software developed by Mark Brinicombe
80 1.8.4.2 skrll * for the NetBSD Project.
81 1.8.4.2 skrll * 4. The name of the company nor the name of the author may be used to
82 1.8.4.2 skrll * endorse or promote products derived from this software without specific
83 1.8.4.2 skrll * prior written permission.
84 1.8.4.2 skrll *
85 1.8.4.2 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
86 1.8.4.2 skrll * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
87 1.8.4.2 skrll * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
88 1.8.4.2 skrll * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
89 1.8.4.2 skrll * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
90 1.8.4.2 skrll * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
91 1.8.4.2 skrll * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 1.8.4.2 skrll * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 1.8.4.2 skrll * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 1.8.4.2 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
95 1.8.4.2 skrll * SUCH DAMAGE.
96 1.8.4.2 skrll *
97 1.8.4.2 skrll * Machine dependant functions for kernel setup for integrator board
98 1.8.4.2 skrll *
99 1.8.4.2 skrll * Created : 24/11/97
100 1.8.4.2 skrll */
101 1.8.4.2 skrll
102 1.8.4.2 skrll /*
103 1.8.4.2 skrll * Machine dependant functions for kernel setup for Samsung SMDK2410
104 1.8.4.2 skrll * derived from integrator_machdep.c
105 1.8.4.2 skrll */
106 1.8.4.2 skrll
107 1.8.4.2 skrll #include <sys/cdefs.h>
108 1.8.4.6 skrll __KERNEL_RCSID(0, "$NetBSD: smdk2410_machdep.c,v 1.8.4.6 2005/04/01 14:27:09 skrll Exp $");
109 1.8.4.2 skrll
110 1.8.4.2 skrll #include "opt_ddb.h"
111 1.8.4.2 skrll #include "opt_kgdb.h"
112 1.8.4.2 skrll #include "opt_ipkdb.h"
113 1.8.4.2 skrll #include "opt_pmap_debug.h"
114 1.8.4.2 skrll #include "opt_md.h"
115 1.8.4.2 skrll
116 1.8.4.2 skrll #include <sys/param.h>
117 1.8.4.2 skrll #include <sys/device.h>
118 1.8.4.2 skrll #include <sys/systm.h>
119 1.8.4.2 skrll #include <sys/kernel.h>
120 1.8.4.2 skrll #include <sys/exec.h>
121 1.8.4.2 skrll #include <sys/proc.h>
122 1.8.4.2 skrll #include <sys/msgbuf.h>
123 1.8.4.2 skrll #include <sys/reboot.h>
124 1.8.4.2 skrll #include <sys/termios.h>
125 1.8.4.2 skrll #include <sys/ksyms.h>
126 1.8.4.2 skrll
127 1.8.4.2 skrll #include <uvm/uvm_extern.h>
128 1.8.4.2 skrll
129 1.8.4.2 skrll #include <dev/cons.h>
130 1.8.4.2 skrll #include <dev/md.h>
131 1.8.4.2 skrll
132 1.8.4.2 skrll #include <machine/db_machdep.h>
133 1.8.4.2 skrll #include <ddb/db_sym.h>
134 1.8.4.2 skrll #include <ddb/db_extern.h>
135 1.8.4.2 skrll #ifdef KGDB
136 1.8.4.2 skrll #include <sys/kgdb.h>
137 1.8.4.2 skrll #endif
138 1.8.4.2 skrll
139 1.8.4.2 skrll #include <machine/bootconfig.h>
140 1.8.4.2 skrll #include <machine/bus.h>
141 1.8.4.2 skrll #include <machine/cpu.h>
142 1.8.4.2 skrll #include <machine/frame.h>
143 1.8.4.2 skrll #include <machine/intr.h>
144 1.8.4.2 skrll #include <arm/undefined.h>
145 1.8.4.2 skrll
146 1.8.4.2 skrll #include <arm/arm32/machdep.h>
147 1.8.4.2 skrll
148 1.8.4.2 skrll #include <arm/s3c2xx0/s3c2410reg.h>
149 1.8.4.2 skrll #include <arm/s3c2xx0/s3c2410var.h>
150 1.8.4.2 skrll
151 1.8.4.2 skrll #include "ksyms.h"
152 1.8.4.2 skrll
153 1.8.4.2 skrll #ifndef SDRAM_START
154 1.8.4.2 skrll #define SDRAM_START S3C2410_SDRAM_START
155 1.8.4.2 skrll #endif
156 1.8.4.2 skrll #ifndef SDRAM_SIZE
157 1.8.4.2 skrll #define SDRAM_SIZE (32*1024*1024)
158 1.8.4.2 skrll #endif
159 1.8.4.2 skrll
160 1.8.4.2 skrll /*
161 1.8.4.2 skrll * Address to map I/O registers in early initialize stage.
162 1.8.4.2 skrll */
163 1.8.4.6 skrll #define SMDK2410_IO_VBASE 0xfd000000
164 1.8.4.2 skrll
165 1.8.4.2 skrll /* Kernel text starts 2MB in from the bottom of the kernel address space. */
166 1.8.4.2 skrll #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
167 1.8.4.2 skrll #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
168 1.8.4.2 skrll
169 1.8.4.2 skrll /*
170 1.8.4.2 skrll * The range 0xc1000000 - 0xccffffff is available for kernel VM space
171 1.8.4.2 skrll * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
172 1.8.4.2 skrll */
173 1.8.4.2 skrll #define KERNEL_VM_SIZE 0x0C000000
174 1.8.4.2 skrll
175 1.8.4.2 skrll /* Memory disk support */
176 1.8.4.2 skrll #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR)
177 1.8.4.2 skrll #define DO_MEMORY_DISK
178 1.8.4.2 skrll /* We have memory disk image outside of the kernel on ROM. */
179 1.8.4.2 skrll #ifdef MEMORY_DISK_ROOT_ROM
180 1.8.4.2 skrll /* map the image directory and use read-only */
181 1.8.4.2 skrll #else
182 1.8.4.2 skrll /* copy the image to RAM */
183 1.8.4.2 skrll #endif
184 1.8.4.2 skrll #endif
185 1.8.4.2 skrll
186 1.8.4.2 skrll
187 1.8.4.2 skrll /*
188 1.8.4.2 skrll * Address to call from cpu_reset() to reset the machine.
189 1.8.4.2 skrll * This is machine architecture dependant as it varies depending
190 1.8.4.2 skrll * on where the ROM appears when you turn the MMU off.
191 1.8.4.2 skrll */
192 1.8.4.2 skrll u_int cpu_reset_address = (u_int)0;
193 1.8.4.2 skrll
194 1.8.4.2 skrll /* Define various stack sizes in pages */
195 1.8.4.2 skrll #define IRQ_STACK_SIZE 1
196 1.8.4.2 skrll #define ABT_STACK_SIZE 1
197 1.8.4.2 skrll #ifdef IPKDB
198 1.8.4.2 skrll #define UND_STACK_SIZE 2
199 1.8.4.2 skrll #else
200 1.8.4.2 skrll #define UND_STACK_SIZE 1
201 1.8.4.2 skrll #endif
202 1.8.4.2 skrll
203 1.8.4.2 skrll BootConfig bootconfig; /* Boot config storage */
204 1.8.4.2 skrll char *boot_args = NULL;
205 1.8.4.2 skrll char *boot_file = NULL;
206 1.8.4.2 skrll
207 1.8.4.2 skrll vm_offset_t physical_start;
208 1.8.4.2 skrll vm_offset_t physical_freestart;
209 1.8.4.2 skrll vm_offset_t physical_freeend;
210 1.8.4.2 skrll vm_offset_t physical_end;
211 1.8.4.2 skrll u_int free_pages;
212 1.8.4.2 skrll vm_offset_t pagetables_start;
213 1.8.4.2 skrll int physmem = 0;
214 1.8.4.2 skrll
215 1.8.4.2 skrll /*int debug_flags;*/
216 1.8.4.2 skrll #ifndef PMAP_STATIC_L1S
217 1.8.4.2 skrll int max_processes = 64; /* Default number */
218 1.8.4.2 skrll #endif /* !PMAP_STATIC_L1S */
219 1.8.4.2 skrll
220 1.8.4.2 skrll /* Physical and virtual addresses for some global pages */
221 1.8.4.2 skrll pv_addr_t systempage;
222 1.8.4.2 skrll pv_addr_t irqstack;
223 1.8.4.2 skrll pv_addr_t undstack;
224 1.8.4.2 skrll pv_addr_t abtstack;
225 1.8.4.2 skrll pv_addr_t kernelstack;
226 1.8.4.2 skrll
227 1.8.4.2 skrll vm_offset_t msgbufphys;
228 1.8.4.2 skrll
229 1.8.4.2 skrll extern u_int data_abort_handler_address;
230 1.8.4.2 skrll extern u_int prefetch_abort_handler_address;
231 1.8.4.2 skrll extern u_int undefined_handler_address;
232 1.8.4.2 skrll
233 1.8.4.2 skrll #ifdef PMAP_DEBUG
234 1.8.4.2 skrll extern int pmap_debug_level;
235 1.8.4.2 skrll #endif
236 1.8.4.2 skrll
237 1.8.4.2 skrll #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
238 1.8.4.2 skrll #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
239 1.8.4.2 skrll #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */
240 1.8.4.2 skrll
241 1.8.4.2 skrll #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
242 1.8.4.2 skrll
243 1.8.4.2 skrll #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
244 1.8.4.2 skrll #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
245 1.8.4.2 skrll
246 1.8.4.2 skrll pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
247 1.8.4.2 skrll
248 1.8.4.2 skrll struct user *proc0paddr;
249 1.8.4.2 skrll
250 1.8.4.2 skrll /* Prototypes */
251 1.8.4.2 skrll
252 1.8.4.2 skrll void consinit(void);
253 1.8.4.2 skrll void kgdb_port_init(void);
254 1.8.4.2 skrll
255 1.8.4.2 skrll
256 1.8.4.2 skrll #include "com.h"
257 1.8.4.2 skrll #if NCOM > 0
258 1.8.4.2 skrll #include <dev/ic/comreg.h>
259 1.8.4.2 skrll #include <dev/ic/comvar.h>
260 1.8.4.2 skrll #endif
261 1.8.4.2 skrll
262 1.8.4.2 skrll #include "sscom.h"
263 1.8.4.2 skrll #if NSSCOM > 0
264 1.8.4.2 skrll #include "opt_sscom.h"
265 1.8.4.2 skrll #include <arm/s3c2xx0/sscom_var.h>
266 1.8.4.2 skrll #endif
267 1.8.4.2 skrll
268 1.8.4.2 skrll /*
269 1.8.4.2 skrll * Define the default console speed for the board. This is generally
270 1.8.4.2 skrll * what the firmware provided with the board defaults to.
271 1.8.4.2 skrll */
272 1.8.4.2 skrll #ifndef CONSPEED
273 1.8.4.2 skrll #define CONSPEED B115200 /* TTYDEF_SPEED */
274 1.8.4.2 skrll #endif
275 1.8.4.2 skrll #ifndef CONMODE
276 1.8.4.2 skrll #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
277 1.8.4.2 skrll #endif
278 1.8.4.2 skrll
279 1.8.4.2 skrll int comcnspeed = CONSPEED;
280 1.8.4.2 skrll int comcnmode = CONMODE;
281 1.8.4.2 skrll
282 1.8.4.2 skrll
283 1.8.4.2 skrll /*
284 1.8.4.2 skrll * void cpu_reboot(int howto, char *bootstr)
285 1.8.4.2 skrll *
286 1.8.4.2 skrll * Reboots the system
287 1.8.4.2 skrll *
288 1.8.4.2 skrll * Deal with any syncing, unmounting, dumping and shutdown hooks,
289 1.8.4.2 skrll * then reset the CPU.
290 1.8.4.2 skrll */
291 1.8.4.2 skrll void
292 1.8.4.2 skrll cpu_reboot(int howto, char *bootstr)
293 1.8.4.2 skrll {
294 1.8.4.2 skrll #ifdef DIAGNOSTIC
295 1.8.4.2 skrll /* info */
296 1.8.4.2 skrll printf("boot: howto=%08x curproc=%p\n", howto, curproc);
297 1.8.4.2 skrll #endif
298 1.8.4.2 skrll
299 1.8.4.2 skrll cpu_reset_address = vtophys((u_int)s3c2410_softreset);
300 1.8.4.2 skrll
301 1.8.4.2 skrll /*
302 1.8.4.2 skrll * If we are still cold then hit the air brakes
303 1.8.4.2 skrll * and crash to earth fast
304 1.8.4.2 skrll */
305 1.8.4.2 skrll if (cold) {
306 1.8.4.2 skrll doshutdownhooks();
307 1.8.4.2 skrll printf("The operating system has halted.\n");
308 1.8.4.2 skrll printf("Please press any key to reboot.\n\n");
309 1.8.4.2 skrll cngetc();
310 1.8.4.2 skrll printf("rebooting...\n");
311 1.8.4.2 skrll cpu_reset();
312 1.8.4.2 skrll /* NOTREACHED */
313 1.8.4.2 skrll }
314 1.8.4.2 skrll /* Disable console buffering */
315 1.8.4.2 skrll
316 1.8.4.2 skrll /*
317 1.8.4.2 skrll * If RB_NOSYNC was not specified sync the discs.
318 1.8.4.2 skrll * Note: Unless cold is set to 1 here, syslogd will die during the
319 1.8.4.2 skrll * unmount. It looks like syslogd is getting woken up only to find
320 1.8.4.2 skrll * that it cannot page part of the binary in as the filesystem has
321 1.8.4.2 skrll * been unmounted.
322 1.8.4.2 skrll */
323 1.8.4.2 skrll if (!(howto & RB_NOSYNC))
324 1.8.4.2 skrll bootsync();
325 1.8.4.2 skrll
326 1.8.4.2 skrll /* Say NO to interrupts */
327 1.8.4.2 skrll splhigh();
328 1.8.4.2 skrll
329 1.8.4.2 skrll /* Do a dump if requested. */
330 1.8.4.2 skrll if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
331 1.8.4.2 skrll dumpsys();
332 1.8.4.2 skrll
333 1.8.4.2 skrll /* Run any shutdown hooks */
334 1.8.4.2 skrll doshutdownhooks();
335 1.8.4.2 skrll
336 1.8.4.2 skrll /* Make sure IRQ's are disabled */
337 1.8.4.2 skrll IRQdisable;
338 1.8.4.2 skrll
339 1.8.4.2 skrll if (howto & RB_HALT) {
340 1.8.4.2 skrll printf("The operating system has halted.\n");
341 1.8.4.2 skrll printf("Please press any key to reboot.\n\n");
342 1.8.4.2 skrll cngetc();
343 1.8.4.2 skrll }
344 1.8.4.2 skrll printf("rebooting...\n");
345 1.8.4.2 skrll cpu_reset();
346 1.8.4.2 skrll /* NOTREACHED */
347 1.8.4.2 skrll }
348 1.8.4.2 skrll
349 1.8.4.6 skrll /*
350 1.8.4.6 skrll * Static device mappings. These peripheral registers are mapped at
351 1.8.4.6 skrll * fixed virtual addresses very early in initarm() so that we can use
352 1.8.4.6 skrll * them while booting the kernel , and stay at the same address
353 1.8.4.6 skrll * throughout whole kernel's life time.
354 1.8.4.6 skrll *
355 1.8.4.6 skrll * We use this table twice; once with bootstrap page table, and once
356 1.8.4.6 skrll * with kernel's page table which we build up in initarm().
357 1.8.4.6 skrll *
358 1.8.4.6 skrll * Since we map these registers into the bootstrap page table using
359 1.8.4.6 skrll * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
360 1.8.4.6 skrll * registers segment-aligned and segment-rounded in order to avoid
361 1.8.4.6 skrll * using the 2nd page tables.
362 1.8.4.6 skrll */
363 1.8.4.6 skrll
364 1.8.4.6 skrll #define _A(a) ((a) & ~L1_S_OFFSET)
365 1.8.4.6 skrll #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
366 1.8.4.6 skrll
367 1.8.4.6 skrll #define _V(n) (SMDK2410_IO_VBASE + (n) * L1_S_SIZE)
368 1.8.4.6 skrll
369 1.8.4.6 skrll #define GPIO_VBASE _V(0)
370 1.8.4.6 skrll #define INTCTL_VBASE _V(1)
371 1.8.4.6 skrll #define CLKMAN_VBASE _V(2)
372 1.8.4.6 skrll #define UART_VBASE _V(3)
373 1.8.4.6 skrll #ifdef MEMORY_DISK_DYNAMIC
374 1.8.4.6 skrll #define MEMORY_DISK_VADDR _V(4)
375 1.8.4.6 skrll #endif
376 1.8.4.6 skrll
377 1.8.4.6 skrll static const struct pmap_devmap smdk2410_devmap[] = {
378 1.8.4.6 skrll /* GPIO registers */
379 1.8.4.6 skrll {
380 1.8.4.6 skrll GPIO_VBASE,
381 1.8.4.6 skrll _A(S3C2410_GPIO_BASE),
382 1.8.4.6 skrll _S(S3C2410_GPIO_SIZE),
383 1.8.4.6 skrll VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
384 1.8.4.6 skrll },
385 1.8.4.6 skrll {
386 1.8.4.6 skrll INTCTL_VBASE,
387 1.8.4.6 skrll _A(S3C2410_INTCTL_BASE),
388 1.8.4.6 skrll _S(S3C2410_INTCTL_SIZE),
389 1.8.4.6 skrll VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
390 1.8.4.6 skrll },
391 1.8.4.6 skrll {
392 1.8.4.6 skrll CLKMAN_VBASE,
393 1.8.4.6 skrll _A(S3C2410_CLKMAN_BASE),
394 1.8.4.6 skrll _S(S3C24X0_CLKMAN_SIZE),
395 1.8.4.6 skrll VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
396 1.8.4.6 skrll },
397 1.8.4.6 skrll { /* UART registers for UART0, 1, 2. */
398 1.8.4.6 skrll UART_VBASE,
399 1.8.4.6 skrll _A(S3C2410_UART0_BASE),
400 1.8.4.6 skrll _S(S3C2410_UART_BASE(3) - S3C2410_UART0_BASE),
401 1.8.4.6 skrll VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
402 1.8.4.6 skrll },
403 1.8.4.6 skrll
404 1.8.4.6 skrll { 0, 0, 0, 0 }
405 1.8.4.6 skrll };
406 1.8.4.6 skrll
407 1.8.4.6 skrll #undef _A
408 1.8.4.6 skrll #undef _S
409 1.8.4.6 skrll
410 1.8.4.6 skrll static __inline pd_entry_t *
411 1.8.4.6 skrll read_ttb(void)
412 1.8.4.6 skrll {
413 1.8.4.6 skrll long ttb;
414 1.8.4.6 skrll
415 1.8.4.6 skrll __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb));
416 1.8.4.6 skrll
417 1.8.4.6 skrll
418 1.8.4.6 skrll return (pd_entry_t *)(ttb & ~((1 << 14) - 1));
419 1.8.4.6 skrll }
420 1.8.4.6 skrll
421 1.8.4.6 skrll
422 1.8.4.6 skrll #define ioreg_read8(a) (*(volatile uint8_t *)(a))
423 1.8.4.6 skrll #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v))
424 1.8.4.2 skrll #define ioreg_read32(a) (*(volatile uint32_t *)(a))
425 1.8.4.2 skrll #define ioreg_write32(a,v) (*(volatile uint32_t *)(a)=(v))
426 1.8.4.2 skrll
427 1.8.4.2 skrll /*
428 1.8.4.2 skrll * u_int initarm(...)
429 1.8.4.2 skrll *
430 1.8.4.2 skrll * Initial entry point on startup. This gets called before main() is
431 1.8.4.2 skrll * entered.
432 1.8.4.2 skrll * It should be responsible for setting up everything that must be
433 1.8.4.2 skrll * in place when main is called.
434 1.8.4.2 skrll * This includes
435 1.8.4.2 skrll * Taking a copy of the boot configuration structure.
436 1.8.4.2 skrll * Initialising the physical console so characters can be printed.
437 1.8.4.2 skrll * Setting up page tables for the kernel
438 1.8.4.2 skrll * Relocating the kernel to the bottom of physical memory
439 1.8.4.2 skrll */
440 1.8.4.2 skrll
441 1.8.4.2 skrll u_int
442 1.8.4.2 skrll initarm(void *arg)
443 1.8.4.2 skrll {
444 1.8.4.2 skrll int loop;
445 1.8.4.2 skrll int loop1;
446 1.8.4.2 skrll u_int l1pagetable;
447 1.8.4.2 skrll extern int etext asm("_etext");
448 1.8.4.2 skrll extern int end asm("_end");
449 1.8.4.2 skrll pv_addr_t kernel_l1pt;
450 1.8.4.2 skrll int progress_counter = 0;
451 1.8.4.2 skrll
452 1.8.4.2 skrll #ifdef DO_MEMORY_DISK
453 1.8.4.2 skrll vm_offset_t md_root_start;
454 1.8.4.2 skrll #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE)
455 1.8.4.2 skrll #endif
456 1.8.4.2 skrll
457 1.8.4.6 skrll #define gpio_read8(reg) ioreg_read8(GPIO_VBASE + (reg))
458 1.8.4.2 skrll
459 1.8.4.2 skrll #define LEDSTEP() __LED(progress_counter++)
460 1.8.4.2 skrll
461 1.8.4.2 skrll #define pdatf (*(volatile uint8_t *)(S3C2410_GPIO_BASE+GPIO_PFDAT))
462 1.8.4.2 skrll #define __LED(x) (pdatf = (pdatf & ~0xf0) | (~(x) & 0xf0))
463 1.8.4.2 skrll
464 1.8.4.2 skrll LEDSTEP();
465 1.8.4.2 skrll
466 1.8.4.2 skrll /* CS8900A on CS3 and CL-PD7610 need nBE1 signal. make sure
467 1.8.4.2 skrll * memory controller is set correctly. (USB download firmware
468 1.8.4.2 skrll * doesn't do this right) Also, we use WAIT signal for them.
469 1.8.4.2 skrll */
470 1.8.4.2 skrll ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON,
471 1.8.4.2 skrll (BWSCON_ST|BWSCON_WS) << BWSCON_BANK_SHIFT(2) |
472 1.8.4.2 skrll (BWSCON_ST|BWSCON_WS) << BWSCON_BANK_SHIFT(3) |
473 1.8.4.2 skrll ioreg_read32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON));
474 1.8.4.2 skrll /* tweak access timing for CS8900A */
475 1.8.4.2 skrll ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BANKCON(3),
476 1.8.4.2 skrll (0<<BANKCON_TACS_SHIFT)|(1<<BANKCON_TCOS_SHIFT)|
477 1.8.4.2 skrll (7<<BANKCON_TACC_SHIFT)|(0<<BANKCON_TOCH_SHIFT)|
478 1.8.4.2 skrll (0<<BANKCON_TCAH_SHIFT));
479 1.8.4.2 skrll
480 1.8.4.2 skrll /*
481 1.8.4.2 skrll * Heads up ... Setup the CPU / MMU / TLB functions
482 1.8.4.2 skrll */
483 1.8.4.2 skrll if (set_cpufuncs())
484 1.8.4.2 skrll panic("cpu not recognized!");
485 1.8.4.2 skrll
486 1.8.4.2 skrll LEDSTEP();
487 1.8.4.2 skrll
488 1.8.4.2 skrll /*
489 1.8.4.6 skrll * Map I/O registers that are used in startup. Now we are
490 1.8.4.6 skrll * still using page table prepared by bootloader. Later we'll
491 1.8.4.6 skrll * map those registers at the same address in the kernel page
492 1.8.4.6 skrll * table.
493 1.8.4.2 skrll */
494 1.8.4.6 skrll pmap_devmap_bootstrap((vaddr_t)read_ttb(), smdk2410_devmap);
495 1.8.4.6 skrll
496 1.8.4.6 skrll #undef pdatf
497 1.8.4.6 skrll #define pdatf (*(volatile uint8_t *)(GPIO_VBASE+GPIO_PFDAT))
498 1.8.4.6 skrll
499 1.8.4.2 skrll
500 1.8.4.2 skrll LEDSTEP();
501 1.8.4.2 skrll
502 1.8.4.2 skrll /* Disable all peripheral interrupts */
503 1.8.4.6 skrll ioreg_write32(INTCTL_VBASE + INTCTL_INTMSK, ~0);
504 1.8.4.6 skrll
505 1.8.4.2 skrll /* initialize some variables so that splfoo() doesn't
506 1.8.4.2 skrll touch illegal address. */
507 1.8.4.6 skrll s3c2xx0_intr_bootstrap(INTCTL_VBASE);
508 1.8.4.2 skrll
509 1.8.4.2 skrll consinit();
510 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
511 1.8.4.2 skrll printf("consinit done\n");
512 1.8.4.2 skrll #endif
513 1.8.4.2 skrll
514 1.8.4.2 skrll #ifdef KGDB
515 1.8.4.2 skrll LEDSTEP();
516 1.8.4.2 skrll kgdb_port_init();
517 1.8.4.2 skrll #endif
518 1.8.4.2 skrll LEDSTEP();
519 1.8.4.2 skrll
520 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
521 1.8.4.2 skrll /* Talk to the user */
522 1.8.4.2 skrll printf("\nNetBSD/evbarm (SMDK2410) booting ...\n");
523 1.8.4.2 skrll #endif
524 1.8.4.2 skrll /*
525 1.8.4.2 skrll * Ok we have the following memory map
526 1.8.4.2 skrll *
527 1.8.4.2 skrll * Physical Address Range Description
528 1.8.4.2 skrll * ----------------------- ----------------------------------
529 1.8.4.2 skrll * 0x00000000 - 0x00ffffff Intel flash Memory (16MB)
530 1.8.4.2 skrll * 0x02000000 - 0x020fffff AMD flash Memory (1MB)
531 1.8.4.2 skrll * or (depend on DIPSW setting)
532 1.8.4.2 skrll * 0x00000000 - 0x000fffff AMD flash Memory (1MB)
533 1.8.4.2 skrll * 0x02000000 - 0x02ffffff Intel flash Memory (16MB)
534 1.8.4.2 skrll *
535 1.8.4.2 skrll * 0x30000000 - 0x31ffffff SDRAM (32MB)
536 1.8.4.2 skrll *
537 1.8.4.2 skrll * The initarm() has the responsibility for creating the kernel
538 1.8.4.2 skrll * page tables.
539 1.8.4.2 skrll * It must also set up various memory pointers that are used
540 1.8.4.2 skrll * by pmap etc.
541 1.8.4.2 skrll */
542 1.8.4.2 skrll
543 1.8.4.2 skrll /* Fake bootconfig structure for the benefit of pmap.c */
544 1.8.4.2 skrll /* XXX must make the memory description h/w independent */
545 1.8.4.2 skrll bootconfig.dramblocks = 1;
546 1.8.4.2 skrll bootconfig.dram[0].address = SDRAM_START;
547 1.8.4.2 skrll bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE;
548 1.8.4.2 skrll
549 1.8.4.2 skrll /*
550 1.8.4.2 skrll * Set up the variables that define the availablilty of
551 1.8.4.2 skrll * physical memory. For now, we're going to set
552 1.8.4.2 skrll * physical_freestart to 0x08200000 (where the kernel
553 1.8.4.2 skrll * was loaded), and allocate the memory we need downwards.
554 1.8.4.2 skrll * If we get too close to the bottom of SDRAM, we
555 1.8.4.2 skrll * will panic. We will update physical_freestart and
556 1.8.4.2 skrll * physical_freeend later to reflect what pmap_bootstrap()
557 1.8.4.2 skrll * wants to see.
558 1.8.4.2 skrll *
559 1.8.4.2 skrll * XXX pmap_bootstrap() needs an enema.
560 1.8.4.2 skrll */
561 1.8.4.2 skrll physical_start = bootconfig.dram[0].address;
562 1.8.4.2 skrll physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
563 1.8.4.2 skrll
564 1.8.4.2 skrll #ifdef DO_MEMORY_DISK
565 1.8.4.2 skrll #ifdef MEMORY_DISK_ROOT_ROM
566 1.8.4.2 skrll md_root_start = MEMORY_DISK_ROOT_ADDR;
567 1.8.4.2 skrll boothowto |= RB_RDONLY;
568 1.8.4.2 skrll #else
569 1.8.4.2 skrll /* Reserve physmem for ram disk */
570 1.8.4.2 skrll md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1));
571 1.8.4.2 skrll printf("Reserve %ld bytes for memory disk\n",
572 1.8.4.2 skrll physical_end - md_root_start);
573 1.8.4.2 skrll /* copy fs contents */
574 1.8.4.2 skrll memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR,
575 1.8.4.2 skrll MD_ROOT_SIZE);
576 1.8.4.2 skrll physical_end = md_root_start;
577 1.8.4.2 skrll #endif
578 1.8.4.2 skrll #endif
579 1.8.4.2 skrll
580 1.8.4.2 skrll physical_freestart = SDRAM_START; /* XXX */
581 1.8.4.2 skrll physical_freeend = SDRAM_START + 0x00200000;
582 1.8.4.2 skrll
583 1.8.4.2 skrll physmem = (physical_end - physical_start) / PAGE_SIZE;
584 1.8.4.2 skrll
585 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
586 1.8.4.2 skrll /* Tell the user about the memory */
587 1.8.4.2 skrll printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
588 1.8.4.2 skrll physical_start, physical_end - 1);
589 1.8.4.2 skrll #endif
590 1.8.4.2 skrll
591 1.8.4.2 skrll /*
592 1.8.4.2 skrll * XXX
593 1.8.4.2 skrll * Okay, the kernel starts 2MB in from the bottom of physical
594 1.8.4.2 skrll * memory. We are going to allocate our bootstrap pages downwards
595 1.8.4.2 skrll * from there.
596 1.8.4.2 skrll *
597 1.8.4.2 skrll * We need to allocate some fixed page tables to get the kernel
598 1.8.4.2 skrll * going. We allocate one page directory and a number of page
599 1.8.4.2 skrll * tables and store the physical addresses in the kernel_pt_table
600 1.8.4.2 skrll * array.
601 1.8.4.2 skrll *
602 1.8.4.2 skrll * The kernel page directory must be on a 16K boundary. The page
603 1.8.4.5 skrll * tables must be on 4K boundaries. What we do is allocate the
604 1.8.4.2 skrll * page directory on the first 16K boundary that we encounter, and
605 1.8.4.2 skrll * the page tables on 4K boundaries otherwise. Since we allocate
606 1.8.4.2 skrll * at least 3 L2 page tables, we are guaranteed to encounter at
607 1.8.4.2 skrll * least one 16K aligned region.
608 1.8.4.2 skrll */
609 1.8.4.2 skrll
610 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
611 1.8.4.2 skrll printf("Allocating page tables\n");
612 1.8.4.2 skrll #endif
613 1.8.4.2 skrll
614 1.8.4.2 skrll free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
615 1.8.4.2 skrll
616 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
617 1.8.4.2 skrll printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
618 1.8.4.2 skrll physical_freestart, free_pages, free_pages);
619 1.8.4.2 skrll #endif
620 1.8.4.2 skrll
621 1.8.4.2 skrll /* Define a macro to simplify memory allocation */
622 1.8.4.2 skrll #define valloc_pages(var, np) \
623 1.8.4.2 skrll alloc_pages((var).pv_pa, (np)); \
624 1.8.4.2 skrll (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
625 1.8.4.2 skrll
626 1.8.4.2 skrll #define alloc_pages(var, np) \
627 1.8.4.2 skrll physical_freeend -= ((np) * PAGE_SIZE); \
628 1.8.4.2 skrll if (physical_freeend < physical_freestart) \
629 1.8.4.2 skrll panic("initarm: out of memory"); \
630 1.8.4.2 skrll (var) = physical_freeend; \
631 1.8.4.2 skrll free_pages -= (np); \
632 1.8.4.2 skrll memset((char *)(var), 0, ((np) * PAGE_SIZE));
633 1.8.4.2 skrll
634 1.8.4.2 skrll loop1 = 0;
635 1.8.4.2 skrll kernel_l1pt.pv_pa = 0;
636 1.8.4.2 skrll for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
637 1.8.4.2 skrll /* Are we 16KB aligned for an L1 ? */
638 1.8.4.2 skrll if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
639 1.8.4.2 skrll && kernel_l1pt.pv_pa == 0) {
640 1.8.4.2 skrll valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
641 1.8.4.2 skrll } else {
642 1.8.4.2 skrll valloc_pages(kernel_pt_table[loop1],
643 1.8.4.2 skrll L2_TABLE_SIZE / PAGE_SIZE);
644 1.8.4.2 skrll ++loop1;
645 1.8.4.2 skrll }
646 1.8.4.2 skrll }
647 1.8.4.2 skrll
648 1.8.4.2 skrll /* This should never be able to happen but better confirm that. */
649 1.8.4.2 skrll if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0)
650 1.8.4.2 skrll panic("initarm: Failed to align the kernel page directory\n");
651 1.8.4.2 skrll
652 1.8.4.2 skrll /*
653 1.8.4.2 skrll * Allocate a page for the system page mapped to V0x00000000
654 1.8.4.2 skrll * This page will just contain the system vectors and can be
655 1.8.4.2 skrll * shared by all processes.
656 1.8.4.2 skrll */
657 1.8.4.2 skrll alloc_pages(systempage.pv_pa, 1);
658 1.8.4.2 skrll
659 1.8.4.2 skrll /* Allocate stacks for all modes */
660 1.8.4.2 skrll valloc_pages(irqstack, IRQ_STACK_SIZE);
661 1.8.4.2 skrll valloc_pages(abtstack, ABT_STACK_SIZE);
662 1.8.4.2 skrll valloc_pages(undstack, UND_STACK_SIZE);
663 1.8.4.2 skrll valloc_pages(kernelstack, UPAGES);
664 1.8.4.2 skrll
665 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
666 1.8.4.2 skrll printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
667 1.8.4.2 skrll irqstack.pv_va);
668 1.8.4.2 skrll printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
669 1.8.4.2 skrll abtstack.pv_va);
670 1.8.4.2 skrll printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
671 1.8.4.2 skrll undstack.pv_va);
672 1.8.4.2 skrll printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
673 1.8.4.2 skrll kernelstack.pv_va);
674 1.8.4.2 skrll #endif
675 1.8.4.2 skrll
676 1.8.4.2 skrll alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
677 1.8.4.2 skrll
678 1.8.4.2 skrll LEDSTEP();
679 1.8.4.2 skrll
680 1.8.4.2 skrll /*
681 1.8.4.2 skrll * Ok we have allocated physical pages for the primary kernel
682 1.8.4.2 skrll * page tables
683 1.8.4.2 skrll */
684 1.8.4.2 skrll
685 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
686 1.8.4.2 skrll printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
687 1.8.4.2 skrll #endif
688 1.8.4.2 skrll
689 1.8.4.2 skrll /*
690 1.8.4.2 skrll * Now we start construction of the L1 page table
691 1.8.4.2 skrll * We start by mapping the L2 page tables into the L1.
692 1.8.4.2 skrll * This means that we can replace L1 mappings later on if necessary
693 1.8.4.2 skrll */
694 1.8.4.2 skrll l1pagetable = kernel_l1pt.pv_pa;
695 1.8.4.2 skrll
696 1.8.4.2 skrll /* Map the L2 pages tables in the L1 page table */
697 1.8.4.2 skrll pmap_link_l2pt(l1pagetable, 0x00000000,
698 1.8.4.2 skrll &kernel_pt_table[KERNEL_PT_SYS]);
699 1.8.4.2 skrll for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
700 1.8.4.2 skrll pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
701 1.8.4.2 skrll &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
702 1.8.4.2 skrll for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
703 1.8.4.2 skrll pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
704 1.8.4.2 skrll &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
705 1.8.4.2 skrll
706 1.8.4.2 skrll /* update the top of the kernel VM */
707 1.8.4.2 skrll pmap_curmaxkvaddr =
708 1.8.4.2 skrll KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
709 1.8.4.2 skrll
710 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
711 1.8.4.2 skrll printf("Mapping kernel\n");
712 1.8.4.2 skrll #endif
713 1.8.4.2 skrll
714 1.8.4.2 skrll /* Now we fill in the L2 pagetable for the kernel static code/data */
715 1.8.4.2 skrll {
716 1.8.4.2 skrll size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE;
717 1.8.4.2 skrll size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE;
718 1.8.4.2 skrll u_int logical;
719 1.8.4.2 skrll
720 1.8.4.2 skrll textsize = (textsize + PGOFSET) & ~PGOFSET;
721 1.8.4.2 skrll totalsize = (totalsize + PGOFSET) & ~PGOFSET;
722 1.8.4.2 skrll
723 1.8.4.2 skrll logical = 0x00200000; /* offset of kernel in RAM */
724 1.8.4.2 skrll
725 1.8.4.2 skrll logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
726 1.8.4.2 skrll physical_start + logical, textsize,
727 1.8.4.2 skrll VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
728 1.8.4.2 skrll logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
729 1.8.4.2 skrll physical_start + logical, totalsize - textsize,
730 1.8.4.2 skrll VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
731 1.8.4.2 skrll }
732 1.8.4.2 skrll
733 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
734 1.8.4.2 skrll printf("Constructing L2 page tables\n");
735 1.8.4.2 skrll #endif
736 1.8.4.2 skrll
737 1.8.4.2 skrll /* Map the stack pages */
738 1.8.4.2 skrll pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
739 1.8.4.2 skrll IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
740 1.8.4.2 skrll PTE_CACHE);
741 1.8.4.2 skrll pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
742 1.8.4.2 skrll ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
743 1.8.4.2 skrll PTE_CACHE);
744 1.8.4.2 skrll pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
745 1.8.4.2 skrll UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
746 1.8.4.2 skrll PTE_CACHE);
747 1.8.4.2 skrll pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
748 1.8.4.2 skrll UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
749 1.8.4.2 skrll
750 1.8.4.2 skrll pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
751 1.8.4.2 skrll L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
752 1.8.4.2 skrll
753 1.8.4.2 skrll for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
754 1.8.4.2 skrll pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
755 1.8.4.2 skrll kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
756 1.8.4.2 skrll VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
757 1.8.4.2 skrll }
758 1.8.4.2 skrll
759 1.8.4.2 skrll /* Map the vector page. */
760 1.8.4.2 skrll #if 1
761 1.8.4.2 skrll /* MULTI-ICE requires that page 0 is NC/NB so that it can download the
762 1.8.4.2 skrll * cache-clean code there. */
763 1.8.4.2 skrll pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
764 1.8.4.2 skrll VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
765 1.8.4.2 skrll #else
766 1.8.4.2 skrll pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
767 1.8.4.2 skrll VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
768 1.8.4.2 skrll #endif
769 1.8.4.2 skrll
770 1.8.4.2 skrll #ifdef MEMORY_DISK_DYNAMIC
771 1.8.4.2 skrll /* map MD root image */
772 1.8.4.6 skrll pmap_map_chunk(l1pagetable, MEMORY_DISK_VADDR, md_root_start,
773 1.8.4.6 skrll MD_ROOT_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
774 1.8.4.2 skrll
775 1.8.4.2 skrll md_root_setconf((void *)md_root_start, MD_ROOT_SIZE);
776 1.8.4.2 skrll #endif /* MEMORY_DISK_DYNAMIC */
777 1.8.4.2 skrll /*
778 1.8.4.2 skrll * map integrated peripherals at same address in l1pagetable
779 1.8.4.2 skrll * so that we can continue to use console.
780 1.8.4.2 skrll */
781 1.8.4.6 skrll pmap_devmap_bootstrap(l1pagetable, smdk2410_devmap);
782 1.8.4.2 skrll
783 1.8.4.2 skrll /*
784 1.8.4.2 skrll * Now we have the real page tables in place so we can switch to them.
785 1.8.4.2 skrll * Once this is done we will be running with the REAL kernel page
786 1.8.4.2 skrll * tables.
787 1.8.4.2 skrll */
788 1.8.4.2 skrll
789 1.8.4.2 skrll /*
790 1.8.4.2 skrll * Update the physical_freestart/physical_freeend/free_pages
791 1.8.4.2 skrll * variables.
792 1.8.4.2 skrll */
793 1.8.4.2 skrll {
794 1.8.4.2 skrll physical_freestart = physical_start +
795 1.8.4.2 skrll (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE);
796 1.8.4.2 skrll physical_freeend = physical_end;
797 1.8.4.2 skrll free_pages =
798 1.8.4.2 skrll (physical_freeend - physical_freestart) / PAGE_SIZE;
799 1.8.4.2 skrll }
800 1.8.4.2 skrll
801 1.8.4.2 skrll /* Switch tables */
802 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
803 1.8.4.2 skrll printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
804 1.8.4.2 skrll physical_freestart, free_pages, free_pages);
805 1.8.4.2 skrll printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
806 1.8.4.2 skrll #endif
807 1.8.4.2 skrll LEDSTEP();
808 1.8.4.2 skrll cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
809 1.8.4.2 skrll setttb(kernel_l1pt.pv_pa);
810 1.8.4.2 skrll cpu_tlb_flushID();
811 1.8.4.2 skrll cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
812 1.8.4.2 skrll
813 1.8.4.2 skrll /*
814 1.8.4.2 skrll * Moved from cpu_startup() as data_abort_handler() references
815 1.8.4.2 skrll * this during uvm init
816 1.8.4.2 skrll */
817 1.8.4.2 skrll proc0paddr = (struct user *)kernelstack.pv_va;
818 1.8.4.2 skrll lwp0.l_addr = proc0paddr;
819 1.8.4.2 skrll
820 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
821 1.8.4.2 skrll printf("done!\n");
822 1.8.4.2 skrll #endif
823 1.8.4.2 skrll
824 1.8.4.2 skrll LEDSTEP();
825 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
826 1.8.4.2 skrll printf("bootstrap done.\n");
827 1.8.4.2 skrll #endif
828 1.8.4.2 skrll
829 1.8.4.2 skrll arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
830 1.8.4.2 skrll
831 1.8.4.2 skrll /*
832 1.8.4.2 skrll * Pages were allocated during the secondary bootstrap for the
833 1.8.4.2 skrll * stacks for different CPU modes.
834 1.8.4.2 skrll * We must now set the r13 registers in the different CPU modes to
835 1.8.4.2 skrll * point to these stacks.
836 1.8.4.2 skrll * Since the ARM stacks use STMFD etc. we must set r13 to the top end
837 1.8.4.2 skrll * of the stack memory.
838 1.8.4.2 skrll */
839 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
840 1.8.4.2 skrll printf("init subsystems: stacks ");
841 1.8.4.2 skrll #endif
842 1.8.4.2 skrll
843 1.8.4.2 skrll set_stackptr(PSR_IRQ32_MODE,
844 1.8.4.2 skrll irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
845 1.8.4.2 skrll set_stackptr(PSR_ABT32_MODE,
846 1.8.4.2 skrll abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
847 1.8.4.2 skrll set_stackptr(PSR_UND32_MODE,
848 1.8.4.2 skrll undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
849 1.8.4.2 skrll
850 1.8.4.2 skrll LEDSTEP();
851 1.8.4.2 skrll
852 1.8.4.2 skrll /*
853 1.8.4.2 skrll * Well we should set a data abort handler.
854 1.8.4.2 skrll * Once things get going this will change as we will need a proper
855 1.8.4.2 skrll * handler.
856 1.8.4.2 skrll * Until then we will use a handler that just panics but tells us
857 1.8.4.2 skrll * why.
858 1.8.4.2 skrll * Initialisation of the vectors will just panic on a data abort.
859 1.8.4.5 skrll * This just fills in a slightly better one.
860 1.8.4.2 skrll */
861 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
862 1.8.4.2 skrll printf("vectors ");
863 1.8.4.2 skrll #endif
864 1.8.4.2 skrll data_abort_handler_address = (u_int)data_abort_handler;
865 1.8.4.2 skrll prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
866 1.8.4.2 skrll undefined_handler_address = (u_int)undefinedinstruction_bounce;
867 1.8.4.2 skrll
868 1.8.4.2 skrll /* Initialise the undefined instruction handlers */
869 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
870 1.8.4.2 skrll printf("undefined ");
871 1.8.4.2 skrll #endif
872 1.8.4.2 skrll undefined_init();
873 1.8.4.2 skrll
874 1.8.4.2 skrll LEDSTEP();
875 1.8.4.2 skrll
876 1.8.4.2 skrll /* Load memory into UVM. */
877 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
878 1.8.4.2 skrll printf("page ");
879 1.8.4.2 skrll #endif
880 1.8.4.2 skrll uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
881 1.8.4.2 skrll uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
882 1.8.4.2 skrll atop(physical_freestart), atop(physical_freeend),
883 1.8.4.2 skrll VM_FREELIST_DEFAULT);
884 1.8.4.2 skrll
885 1.8.4.2 skrll LEDSTEP();
886 1.8.4.2 skrll /* Boot strap pmap telling it where the kernel page table is */
887 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
888 1.8.4.2 skrll printf("pmap ");
889 1.8.4.2 skrll #endif
890 1.8.4.2 skrll pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
891 1.8.4.2 skrll KERNEL_VM_BASE + KERNEL_VM_SIZE);
892 1.8.4.2 skrll
893 1.8.4.2 skrll LEDSTEP();
894 1.8.4.2 skrll
895 1.8.4.2 skrll /* Setup the IRQ system */
896 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
897 1.8.4.2 skrll printf("irq ");
898 1.8.4.2 skrll #endif
899 1.8.4.2 skrll /* XXX irq_init(); */
900 1.8.4.2 skrll
901 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
902 1.8.4.2 skrll printf("done.\n");
903 1.8.4.2 skrll #endif
904 1.8.4.2 skrll
905 1.8.4.2 skrll #ifdef BOOTHOWTO
906 1.8.4.2 skrll boothowto |= BOOTHOWTO;
907 1.8.4.2 skrll #endif
908 1.8.4.2 skrll {
909 1.8.4.2 skrll uint8_t gpio = ~gpio_read8(GPIO_PFDAT);
910 1.8.4.2 skrll
911 1.8.4.2 skrll if (gpio & (1<<0)) /* SW1 (EINT0) */
912 1.8.4.2 skrll boothowto ^= RB_SINGLE;
913 1.8.4.2 skrll if (gpio & (1<<2)) /* SW2 (EINT2) */
914 1.8.4.2 skrll boothowto ^= RB_KDB;
915 1.8.4.2 skrll #ifdef VERBOSE_INIT_ARM
916 1.8.4.2 skrll printf( "sw: %x boothowto: %x\n", gpio, boothowto );
917 1.8.4.2 skrll #endif
918 1.8.4.2 skrll }
919 1.8.4.2 skrll
920 1.8.4.2 skrll #ifdef IPKDB
921 1.8.4.2 skrll /* Initialise ipkdb */
922 1.8.4.2 skrll ipkdb_init();
923 1.8.4.2 skrll if (boothowto & RB_KDB)
924 1.8.4.2 skrll ipkdb_connect(0);
925 1.8.4.2 skrll #endif
926 1.8.4.2 skrll
927 1.8.4.2 skrll #ifdef KGDB
928 1.8.4.2 skrll if (boothowto & RB_KDB) {
929 1.8.4.2 skrll kgdb_debug_init = 1;
930 1.8.4.2 skrll kgdb_connect(1);
931 1.8.4.2 skrll }
932 1.8.4.2 skrll #endif
933 1.8.4.2 skrll
934 1.8.4.2 skrll #if NKSYMS || defined(DDB) || defined(LKM)
935 1.8.4.2 skrll /* Firmware doesn't load symbols. */
936 1.8.4.2 skrll ksyms_init(0, NULL, NULL);
937 1.8.4.2 skrll #endif
938 1.8.4.2 skrll
939 1.8.4.2 skrll #ifdef DDB
940 1.8.4.2 skrll db_machine_init();
941 1.8.4.2 skrll if (boothowto & RB_KDB)
942 1.8.4.2 skrll Debugger();
943 1.8.4.2 skrll #endif
944 1.8.4.2 skrll
945 1.8.4.2 skrll /* We return the new stack pointer address */
946 1.8.4.2 skrll return (kernelstack.pv_va + USPACE_SVC_STACK_TOP);
947 1.8.4.2 skrll }
948 1.8.4.2 skrll
949 1.8.4.2 skrll void
950 1.8.4.2 skrll consinit(void)
951 1.8.4.2 skrll {
952 1.8.4.2 skrll static int consinit_done = 0;
953 1.8.4.6 skrll bus_space_tag_t iot = &s3c2xx0_bs_tag;
954 1.8.4.6 skrll int pclk;
955 1.8.4.2 skrll
956 1.8.4.2 skrll if (consinit_done != 0)
957 1.8.4.2 skrll return;
958 1.8.4.2 skrll
959 1.8.4.2 skrll consinit_done = 1;
960 1.8.4.2 skrll
961 1.8.4.6 skrll s3c24x0_clock_freq2(CLKMAN_VBASE, NULL, NULL, &pclk);
962 1.8.4.6 skrll
963 1.8.4.2 skrll #if NSSCOM > 0
964 1.8.4.2 skrll #ifdef SSCOM0CONSOLE
965 1.8.4.2 skrll if (0 == s3c2410_sscom_cnattach(iot, 0, comcnspeed,
966 1.8.4.2 skrll pclk, comcnmode))
967 1.8.4.2 skrll return;
968 1.8.4.2 skrll #endif
969 1.8.4.2 skrll #ifdef SSCOM1CONSOLE
970 1.8.4.2 skrll if (0 == s3c2410_sscom_cnattach(iot, 1, comcnspeed,
971 1.8.4.2 skrll pclk, comcnmode))
972 1.8.4.2 skrll return;
973 1.8.4.2 skrll #endif
974 1.8.4.2 skrll #endif /* NSSCOM */
975 1.8.4.2 skrll #if NCOM>0 && defined(CONCOMADDR)
976 1.8.4.2 skrll if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed,
977 1.8.4.2 skrll COM_FREQ, COM_TYPE_NORMAL, comcnmode))
978 1.8.4.2 skrll panic("can't init serial console @%x", CONCOMADDR);
979 1.8.4.2 skrll return;
980 1.8.4.2 skrll #endif
981 1.8.4.2 skrll
982 1.8.4.2 skrll consinit_done = 0;
983 1.8.4.2 skrll }
984 1.8.4.2 skrll
985 1.8.4.2 skrll
986 1.8.4.2 skrll #ifdef KGDB
987 1.8.4.2 skrll
988 1.8.4.2 skrll #if (NSSCOM > 0)
989 1.8.4.2 skrll
990 1.8.4.2 skrll #ifdef KGDB_DEVNAME
991 1.8.4.2 skrll const char kgdb_devname[] = KGDB_DEVNAME;
992 1.8.4.2 skrll #else
993 1.8.4.2 skrll const char kgdb_devname[] = "";
994 1.8.4.2 skrll #endif
995 1.8.4.2 skrll
996 1.8.4.2 skrll #ifndef KGDB_DEVMODE
997 1.8.4.2 skrll #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */
998 1.8.4.2 skrll #endif
999 1.8.4.2 skrll int kgdb_sscom_mode = KGDB_DEVMODE;
1000 1.8.4.2 skrll
1001 1.8.4.2 skrll #endif /* NSSCOM */
1002 1.8.4.2 skrll
1003 1.8.4.2 skrll void
1004 1.8.4.2 skrll kgdb_port_init(void)
1005 1.8.4.2 skrll {
1006 1.8.4.2 skrll #if (NSSCOM > 0)
1007 1.8.4.2 skrll int unit = -1;
1008 1.8.4.6 skrll int pclk;
1009 1.8.4.2 skrll
1010 1.8.4.2 skrll if (strcmp(kgdb_devname, "sscom0") == 0)
1011 1.8.4.2 skrll unit = 0;
1012 1.8.4.2 skrll else if (strcmp(kgdb_devname, "sscom1") == 0)
1013 1.8.4.2 skrll unit = 1;
1014 1.8.4.2 skrll
1015 1.8.4.2 skrll if (unit >= 0) {
1016 1.8.4.6 skrll s3c24x0_clock_freq2(CLKMAN_VBASE, NULL, NULL, &pclk);
1017 1.8.4.6 skrll
1018 1.8.4.6 skrll s3c2410_sscom_kgdb_attach(&s3c2xx0_bs_tag,
1019 1.8.4.2 skrll unit, kgdb_rate, pclk, kgdb_sscom_mode);
1020 1.8.4.2 skrll }
1021 1.8.4.2 skrll #endif
1022 1.8.4.2 skrll }
1023 1.8.4.2 skrll #endif
1024 1.8.4.2 skrll
1025 1.8.4.2 skrll static __inline void
1026 1.8.4.2 skrll writeback_dcache_line(vaddr_t va)
1027 1.8.4.2 skrll {
1028 1.8.4.2 skrll /* writeback Dcache line */
1029 1.8.4.2 skrll /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9
1030 1.8.4.2 skrll * assume write-through cache, and always flush Dcache instead of
1031 1.8.4.2 skrll * cleaning it. Since Boot loader maps page table with write-back
1032 1.8.4.2 skrll * cached, we really need to clean Dcache. */
1033 1.8.4.2 skrll asm("mcr p15, 0, %0, c7, c10, 1"
1034 1.8.4.2 skrll : : "r"(va));
1035 1.8.4.2 skrll }
1036 1.8.4.2 skrll
1037 1.8.4.2 skrll static __inline void
1038 1.8.4.2 skrll clean_dcache_line(vaddr_t va)
1039 1.8.4.2 skrll {
1040 1.8.4.2 skrll /* writeback and invalidate Dcache line */
1041 1.8.4.2 skrll asm("mcr p15, 0, %0, c7, c14, 1"
1042 1.8.4.2 skrll : : "r"(va));
1043 1.8.4.2 skrll }
1044 1.8.4.2 skrll
1045 1.8.4.2 skrll static struct arm32_dma_range smdk2410_dma_ranges[1];
1046 1.8.4.2 skrll
1047 1.8.4.2 skrll bus_dma_tag_t
1048 1.8.4.2 skrll s3c2xx0_bus_dma_init(struct arm32_bus_dma_tag *dma_tag_template)
1049 1.8.4.2 skrll {
1050 1.8.4.2 skrll extern paddr_t physical_start, physical_end;
1051 1.8.4.2 skrll struct arm32_bus_dma_tag *dmat;
1052 1.8.4.2 skrll
1053 1.8.4.2 skrll smdk2410_dma_ranges[0].dr_sysbase = physical_start;
1054 1.8.4.2 skrll smdk2410_dma_ranges[0].dr_busbase = physical_start;
1055 1.8.4.2 skrll smdk2410_dma_ranges[0].dr_len = physical_end - physical_start;
1056 1.8.4.2 skrll
1057 1.8.4.2 skrll #if 1
1058 1.8.4.2 skrll dmat = dma_tag_template;
1059 1.8.4.2 skrll #else
1060 1.8.4.2 skrll dmat = malloc(sizeof *dmat, M_DEVBUF, M_NOWAIT);
1061 1.8.4.2 skrll if (dmat == NULL)
1062 1.8.4.2 skrll return NULL;
1063 1.8.4.2 skrll *dmat = *dma_tag_template;
1064 1.8.4.2 skrll #endif
1065 1.8.4.2 skrll
1066 1.8.4.2 skrll dmat->_ranges = smdk2410_dma_ranges;
1067 1.8.4.2 skrll dmat->_nranges = 1;
1068 1.8.4.2 skrll
1069 1.8.4.2 skrll return dmat;
1070 1.8.4.2 skrll }
1071