smdk2410_machdep.c revision 1.11
1 /* $NetBSD: smdk2410_machdep.c,v 1.11 2005/03/08 16:51:44 bsh Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003 Fujitsu Component Limited 5 * Copyright (c) 2002, 2003 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 /* 35 * Copyright (c) 2001,2002 ARM Ltd 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. The name of the company may not be used to endorse or promote 47 * products derived from this software without specific prior written 48 * permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND 51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 52 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 53 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD 54 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 60 * POSSIBILITY OF SUCH DAMAGE. 61 * 62 */ 63 64 /* 65 * Copyright (c) 1997,1998 Mark Brinicombe. 66 * Copyright (c) 1997,1998 Causality Limited. 67 * All rights reserved. 68 * 69 * Redistribution and use in source and binary forms, with or without 70 * modification, are permitted provided that the following conditions 71 * are met: 72 * 1. Redistributions of source code must retain the above copyright 73 * notice, this list of conditions and the following disclaimer. 74 * 2. Redistributions in binary form must reproduce the above copyright 75 * notice, this list of conditions and the following disclaimer in the 76 * documentation and/or other materials provided with the distribution. 77 * 3. All advertising materials mentioning features or use of this software 78 * must display the following acknowledgement: 79 * This product includes software developed by Mark Brinicombe 80 * for the NetBSD Project. 81 * 4. The name of the company nor the name of the author may be used to 82 * endorse or promote products derived from this software without specific 83 * prior written permission. 84 * 85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 86 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 87 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 88 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 89 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 90 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 91 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 95 * SUCH DAMAGE. 96 * 97 * Machine dependant functions for kernel setup for integrator board 98 * 99 * Created : 24/11/97 100 */ 101 102 /* 103 * Machine dependant functions for kernel setup for Samsung SMDK2410 104 * derived from integrator_machdep.c 105 */ 106 107 #include <sys/cdefs.h> 108 __KERNEL_RCSID(0, "$NetBSD: smdk2410_machdep.c,v 1.11 2005/03/08 16:51:44 bsh Exp $"); 109 110 #include "opt_ddb.h" 111 #include "opt_kgdb.h" 112 #include "opt_ipkdb.h" 113 #include "opt_pmap_debug.h" 114 #include "opt_md.h" 115 116 #include <sys/param.h> 117 #include <sys/device.h> 118 #include <sys/systm.h> 119 #include <sys/kernel.h> 120 #include <sys/exec.h> 121 #include <sys/proc.h> 122 #include <sys/msgbuf.h> 123 #include <sys/reboot.h> 124 #include <sys/termios.h> 125 #include <sys/ksyms.h> 126 127 #include <uvm/uvm_extern.h> 128 129 #include <dev/cons.h> 130 #include <dev/md.h> 131 132 #include <machine/db_machdep.h> 133 #include <ddb/db_sym.h> 134 #include <ddb/db_extern.h> 135 #ifdef KGDB 136 #include <sys/kgdb.h> 137 #endif 138 139 #include <machine/bootconfig.h> 140 #include <machine/bus.h> 141 #include <machine/cpu.h> 142 #include <machine/frame.h> 143 #include <machine/intr.h> 144 #include <arm/undefined.h> 145 146 #include <arm/arm32/machdep.h> 147 148 #include <arm/s3c2xx0/s3c2410reg.h> 149 #include <arm/s3c2xx0/s3c2410var.h> 150 151 #include "ksyms.h" 152 153 #ifndef SDRAM_START 154 #define SDRAM_START S3C2410_SDRAM_START 155 #endif 156 #ifndef SDRAM_SIZE 157 #define SDRAM_SIZE (32*1024*1024) 158 #endif 159 160 /* 161 * Address to map I/O registers in early initialize stage. 162 */ 163 #define SMDK2410_VBASE_FREE 0xfd000000 164 165 /* Kernel text starts 2MB in from the bottom of the kernel address space. */ 166 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000) 167 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000) 168 169 /* 170 * The range 0xc1000000 - 0xccffffff is available for kernel VM space 171 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff 172 */ 173 #define KERNEL_VM_SIZE 0x0C000000 174 175 /* Memory disk support */ 176 #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR) 177 #define DO_MEMORY_DISK 178 /* We have memory disk image outside of the kernel on ROM. */ 179 #ifdef MEMORY_DISK_ROOT_ROM 180 /* map the image directory and use read-only */ 181 #else 182 /* copy the image to RAM */ 183 #endif 184 #endif 185 186 187 /* 188 * Address to call from cpu_reset() to reset the machine. 189 * This is machine architecture dependant as it varies depending 190 * on where the ROM appears when you turn the MMU off. 191 */ 192 u_int cpu_reset_address = (u_int)0; 193 194 /* Define various stack sizes in pages */ 195 #define IRQ_STACK_SIZE 1 196 #define ABT_STACK_SIZE 1 197 #ifdef IPKDB 198 #define UND_STACK_SIZE 2 199 #else 200 #define UND_STACK_SIZE 1 201 #endif 202 203 BootConfig bootconfig; /* Boot config storage */ 204 char *boot_args = NULL; 205 char *boot_file = NULL; 206 207 vm_offset_t physical_start; 208 vm_offset_t physical_freestart; 209 vm_offset_t physical_freeend; 210 vm_offset_t physical_end; 211 u_int free_pages; 212 vm_offset_t pagetables_start; 213 int physmem = 0; 214 215 /*int debug_flags;*/ 216 #ifndef PMAP_STATIC_L1S 217 int max_processes = 64; /* Default number */ 218 #endif /* !PMAP_STATIC_L1S */ 219 220 /* Physical and virtual addresses for some global pages */ 221 pv_addr_t systempage; 222 pv_addr_t irqstack; 223 pv_addr_t undstack; 224 pv_addr_t abtstack; 225 pv_addr_t kernelstack; 226 227 vm_offset_t msgbufphys; 228 229 extern u_int data_abort_handler_address; 230 extern u_int prefetch_abort_handler_address; 231 extern u_int undefined_handler_address; 232 233 #ifdef PMAP_DEBUG 234 extern int pmap_debug_level; 235 #endif 236 237 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */ 238 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */ 239 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */ 240 241 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 242 243 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 244 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 245 246 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 247 248 struct user *proc0paddr; 249 250 /* Prototypes */ 251 252 void consinit(void); 253 void kgdb_port_init(void); 254 255 static int 256 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 257 int cacheable, bus_space_handle_t * bshp); 258 static void copy_io_area_map(pd_entry_t * new_pd); 259 260 #include "com.h" 261 #if NCOM > 0 262 #include <dev/ic/comreg.h> 263 #include <dev/ic/comvar.h> 264 #endif 265 266 #include "sscom.h" 267 #if NSSCOM > 0 268 #include "opt_sscom.h" 269 #include <arm/s3c2xx0/sscom_var.h> 270 #endif 271 272 /* 273 * Define the default console speed for the board. This is generally 274 * what the firmware provided with the board defaults to. 275 */ 276 #ifndef CONSPEED 277 #define CONSPEED B115200 /* TTYDEF_SPEED */ 278 #endif 279 #ifndef CONMODE 280 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 281 #endif 282 283 int comcnspeed = CONSPEED; 284 int comcnmode = CONMODE; 285 286 struct bus_space bootstrap_bs_tag; 287 288 /* 289 * void cpu_reboot(int howto, char *bootstr) 290 * 291 * Reboots the system 292 * 293 * Deal with any syncing, unmounting, dumping and shutdown hooks, 294 * then reset the CPU. 295 */ 296 void 297 cpu_reboot(int howto, char *bootstr) 298 { 299 #ifdef DIAGNOSTIC 300 /* info */ 301 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 302 #endif 303 304 cpu_reset_address = vtophys((u_int)s3c2410_softreset); 305 306 /* 307 * If we are still cold then hit the air brakes 308 * and crash to earth fast 309 */ 310 if (cold) { 311 doshutdownhooks(); 312 printf("The operating system has halted.\n"); 313 printf("Please press any key to reboot.\n\n"); 314 cngetc(); 315 printf("rebooting...\n"); 316 cpu_reset(); 317 /* NOTREACHED */ 318 } 319 /* Disable console buffering */ 320 321 /* 322 * If RB_NOSYNC was not specified sync the discs. 323 * Note: Unless cold is set to 1 here, syslogd will die during the 324 * unmount. It looks like syslogd is getting woken up only to find 325 * that it cannot page part of the binary in as the filesystem has 326 * been unmounted. 327 */ 328 if (!(howto & RB_NOSYNC)) 329 bootsync(); 330 331 /* Say NO to interrupts */ 332 splhigh(); 333 334 /* Do a dump if requested. */ 335 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 336 dumpsys(); 337 338 /* Run any shutdown hooks */ 339 doshutdownhooks(); 340 341 /* Make sure IRQ's are disabled */ 342 IRQdisable; 343 344 if (howto & RB_HALT) { 345 printf("The operating system has halted.\n"); 346 printf("Please press any key to reboot.\n\n"); 347 cngetc(); 348 } 349 printf("rebooting...\n"); 350 cpu_reset(); 351 /* NOTREACHED */ 352 } 353 354 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v)) 355 #define ioreg_read32(a) (*(volatile uint32_t *)(a)) 356 #define ioreg_write32(a,v) (*(volatile uint32_t *)(a)=(v)) 357 358 /* 359 * u_int initarm(...) 360 * 361 * Initial entry point on startup. This gets called before main() is 362 * entered. 363 * It should be responsible for setting up everything that must be 364 * in place when main is called. 365 * This includes 366 * Taking a copy of the boot configuration structure. 367 * Initialising the physical console so characters can be printed. 368 * Setting up page tables for the kernel 369 * Relocating the kernel to the bottom of physical memory 370 */ 371 372 u_int 373 initarm(void *arg) 374 { 375 int loop; 376 int loop1; 377 u_int l1pagetable; 378 extern int etext asm("_etext"); 379 extern int end asm("_end"); 380 pv_addr_t kernel_l1pt; 381 struct s3c24x0_softc temp_softc; /* used to initialize IO regs */ 382 int progress_counter = 0; 383 384 #ifdef DO_MEMORY_DISK 385 vm_offset_t md_root_start; 386 #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE) 387 #endif 388 389 #define gpio_read8(reg) bus_space_read_1(temp_softc.sc_sx.sc_iot, \ 390 temp_softc.sc_sx.sc_gpio_ioh, (reg)) 391 392 #define LEDSTEP() __LED(progress_counter++) 393 394 #define pdatf (*(volatile uint8_t *)(S3C2410_GPIO_BASE+GPIO_PFDAT)) 395 #define __LED(x) (pdatf = (pdatf & ~0xf0) | (~(x) & 0xf0)) 396 397 LEDSTEP(); 398 399 /* CS8900A on CS3 and CL-PD7610 need nBE1 signal. make sure 400 * memory controller is set correctly. (USB download firmware 401 * doesn't do this right) Also, we use WAIT signal for them. 402 */ 403 ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON, 404 (BWSCON_ST|BWSCON_WS) << BWSCON_BANK_SHIFT(2) | 405 (BWSCON_ST|BWSCON_WS) << BWSCON_BANK_SHIFT(3) | 406 ioreg_read32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON)); 407 /* tweak access timing for CS8900A */ 408 ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BANKCON(3), 409 (0<<BANKCON_TACS_SHIFT)|(1<<BANKCON_TCOS_SHIFT)| 410 (7<<BANKCON_TACC_SHIFT)|(0<<BANKCON_TOCH_SHIFT)| 411 (0<<BANKCON_TCAH_SHIFT)); 412 413 /* 414 * Heads up ... Setup the CPU / MMU / TLB functions 415 */ 416 if (set_cpufuncs()) 417 panic("cpu not recognized!"); 418 419 LEDSTEP(); 420 421 /* 422 * prepare fake bus space tag 423 */ 424 bootstrap_bs_tag = s3c2xx0_bs_tag; 425 bootstrap_bs_tag.bs_map = bootstrap_bs_map; 426 s3c2xx0_softc = &temp_softc.sc_sx; 427 s3c2xx0_softc->sc_iot = &bootstrap_bs_tag; 428 429 bootstrap_bs_map(&bootstrap_bs_tag, S3C2410_GPIO_BASE, 430 S3C2410_GPIO_SIZE, 0, &temp_softc.sc_sx.sc_gpio_ioh); 431 bootstrap_bs_map(&bootstrap_bs_tag, S3C2410_INTCTL_BASE, 432 S3C2410_INTCTL_SIZE, 0, &temp_softc.sc_sx.sc_intctl_ioh); 433 bootstrap_bs_map(&bootstrap_bs_tag, S3C2410_CLKMAN_BASE, 434 S3C24X0_CLKMAN_SIZE, 0, &temp_softc.sc_sx.sc_clkman_ioh); 435 436 #undef __LED 437 #define __LED(x) \ 438 bus_space_write_1(&bootstrap_bs_tag, temp_softc.sc_sx.sc_gpio_ioh, \ 439 GPIO_PFDAT, (~((x)<<4) & 0xf0) | \ 440 (gpio_read8(GPIO_PFDAT) & ~0xf0)) 441 442 LEDSTEP(); 443 444 /* Disable all peripheral interrupts */ 445 bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_sx.sc_intctl_ioh, 446 INTCTL_INTMSK, ~0); 447 /* initialize some variables so that splfoo() doesn't 448 touch illegal address. */ 449 s3c2xx0_intr_bootstrap((vaddr_t)bus_space_vaddr(&bootstrap_bs_tag, 450 temp_softc.sc_sx.sc_intctl_ioh)); 451 452 s3c24x0_clock_freq(s3c2xx0_softc); 453 454 consinit(); 455 #ifdef VERBOSE_INIT_ARM 456 printf("consinit done\n"); 457 #endif 458 459 #ifdef KGDB 460 LEDSTEP(); 461 kgdb_port_init(); 462 #endif 463 LEDSTEP(); 464 465 #ifdef VERBOSE_INIT_ARM 466 /* Talk to the user */ 467 printf("\nNetBSD/evbarm (SMDK2410) booting ...\n"); 468 #endif 469 /* 470 * Ok we have the following memory map 471 * 472 * Physical Address Range Description 473 * ----------------------- ---------------------------------- 474 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB) 475 * 0x02000000 - 0x020fffff AMD flash Memory (1MB) 476 * or (depend on DIPSW setting) 477 * 0x00000000 - 0x000fffff AMD flash Memory (1MB) 478 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB) 479 * 480 * 0x30000000 - 0x31ffffff SDRAM (32MB) 481 * 482 * The initarm() has the responsibility for creating the kernel 483 * page tables. 484 * It must also set up various memory pointers that are used 485 * by pmap etc. 486 */ 487 488 /* Fake bootconfig structure for the benefit of pmap.c */ 489 /* XXX must make the memory description h/w independent */ 490 bootconfig.dramblocks = 1; 491 bootconfig.dram[0].address = SDRAM_START; 492 bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE; 493 494 /* 495 * Set up the variables that define the availablilty of 496 * physical memory. For now, we're going to set 497 * physical_freestart to 0x08200000 (where the kernel 498 * was loaded), and allocate the memory we need downwards. 499 * If we get too close to the bottom of SDRAM, we 500 * will panic. We will update physical_freestart and 501 * physical_freeend later to reflect what pmap_bootstrap() 502 * wants to see. 503 * 504 * XXX pmap_bootstrap() needs an enema. 505 */ 506 physical_start = bootconfig.dram[0].address; 507 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 508 509 #ifdef DO_MEMORY_DISK 510 #ifdef MEMORY_DISK_ROOT_ROM 511 md_root_start = MEMORY_DISK_ROOT_ADDR; 512 boothowto |= RB_RDONLY; 513 #else 514 /* Reserve physmem for ram disk */ 515 md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1)); 516 printf("Reserve %ld bytes for memory disk\n", 517 physical_end - md_root_start); 518 /* copy fs contents */ 519 memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR, 520 MD_ROOT_SIZE); 521 physical_end = md_root_start; 522 #endif 523 #endif 524 525 physical_freestart = SDRAM_START; /* XXX */ 526 physical_freeend = SDRAM_START + 0x00200000; 527 528 physmem = (physical_end - physical_start) / PAGE_SIZE; 529 530 #ifdef VERBOSE_INIT_ARM 531 /* Tell the user about the memory */ 532 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 533 physical_start, physical_end - 1); 534 #endif 535 536 /* 537 * XXX 538 * Okay, the kernel starts 2MB in from the bottom of physical 539 * memory. We are going to allocate our bootstrap pages downwards 540 * from there. 541 * 542 * We need to allocate some fixed page tables to get the kernel 543 * going. We allocate one page directory and a number of page 544 * tables and store the physical addresses in the kernel_pt_table 545 * array. 546 * 547 * The kernel page directory must be on a 16K boundary. The page 548 * tables must be on 4K boundaries. What we do is allocate the 549 * page directory on the first 16K boundary that we encounter, and 550 * the page tables on 4K boundaries otherwise. Since we allocate 551 * at least 3 L2 page tables, we are guaranteed to encounter at 552 * least one 16K aligned region. 553 */ 554 555 #ifdef VERBOSE_INIT_ARM 556 printf("Allocating page tables\n"); 557 #endif 558 559 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 560 561 #ifdef VERBOSE_INIT_ARM 562 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 563 physical_freestart, free_pages, free_pages); 564 #endif 565 566 /* Define a macro to simplify memory allocation */ 567 #define valloc_pages(var, np) \ 568 alloc_pages((var).pv_pa, (np)); \ 569 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 570 571 #define alloc_pages(var, np) \ 572 physical_freeend -= ((np) * PAGE_SIZE); \ 573 if (physical_freeend < physical_freestart) \ 574 panic("initarm: out of memory"); \ 575 (var) = physical_freeend; \ 576 free_pages -= (np); \ 577 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 578 579 loop1 = 0; 580 kernel_l1pt.pv_pa = 0; 581 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 582 /* Are we 16KB aligned for an L1 ? */ 583 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 584 && kernel_l1pt.pv_pa == 0) { 585 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 586 } else { 587 valloc_pages(kernel_pt_table[loop1], 588 L2_TABLE_SIZE / PAGE_SIZE); 589 ++loop1; 590 } 591 } 592 593 /* This should never be able to happen but better confirm that. */ 594 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0) 595 panic("initarm: Failed to align the kernel page directory\n"); 596 597 /* 598 * Allocate a page for the system page mapped to V0x00000000 599 * This page will just contain the system vectors and can be 600 * shared by all processes. 601 */ 602 alloc_pages(systempage.pv_pa, 1); 603 604 /* Allocate stacks for all modes */ 605 valloc_pages(irqstack, IRQ_STACK_SIZE); 606 valloc_pages(abtstack, ABT_STACK_SIZE); 607 valloc_pages(undstack, UND_STACK_SIZE); 608 valloc_pages(kernelstack, UPAGES); 609 610 #ifdef VERBOSE_INIT_ARM 611 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 612 irqstack.pv_va); 613 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 614 abtstack.pv_va); 615 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 616 undstack.pv_va); 617 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 618 kernelstack.pv_va); 619 #endif 620 621 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 622 623 LEDSTEP(); 624 625 /* 626 * Ok we have allocated physical pages for the primary kernel 627 * page tables 628 */ 629 630 #ifdef VERBOSE_INIT_ARM 631 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 632 #endif 633 634 /* 635 * Now we start construction of the L1 page table 636 * We start by mapping the L2 page tables into the L1. 637 * This means that we can replace L1 mappings later on if necessary 638 */ 639 l1pagetable = kernel_l1pt.pv_pa; 640 641 /* Map the L2 pages tables in the L1 page table */ 642 pmap_link_l2pt(l1pagetable, 0x00000000, 643 &kernel_pt_table[KERNEL_PT_SYS]); 644 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 645 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 646 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 647 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 648 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 649 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 650 651 /* update the top of the kernel VM */ 652 pmap_curmaxkvaddr = 653 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 654 655 #ifdef VERBOSE_INIT_ARM 656 printf("Mapping kernel\n"); 657 #endif 658 659 /* Now we fill in the L2 pagetable for the kernel static code/data */ 660 { 661 size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE; 662 size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE; 663 u_int logical; 664 665 textsize = (textsize + PGOFSET) & ~PGOFSET; 666 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 667 668 logical = 0x00200000; /* offset of kernel in RAM */ 669 670 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 671 physical_start + logical, textsize, 672 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 673 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 674 physical_start + logical, totalsize - textsize, 675 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 676 } 677 678 #ifdef VERBOSE_INIT_ARM 679 printf("Constructing L2 page tables\n"); 680 #endif 681 682 /* Map the stack pages */ 683 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 684 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 685 PTE_CACHE); 686 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 687 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 688 PTE_CACHE); 689 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 690 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 691 PTE_CACHE); 692 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 693 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 694 695 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 696 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 697 698 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 699 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 700 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 701 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 702 } 703 704 /* Map the vector page. */ 705 #if 1 706 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 707 * cache-clean code there. */ 708 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 709 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 710 #else 711 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 712 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 713 #endif 714 715 #ifdef MEMORY_DISK_DYNAMIC 716 /* map MD root image */ 717 bootstrap_bs_map(&bootstrap_bs_tag, md_root_start, MD_ROOT_SIZE, 718 BUS_SPACE_MAP_CACHEABLE | BUS_SPACE_MAP_LINEAR, 719 (bus_space_handle_t *)&md_root_start); 720 721 md_root_setconf((void *)md_root_start, MD_ROOT_SIZE); 722 #endif /* MEMORY_DISK_DYNAMIC */ 723 /* 724 * map integrated peripherals at same address in l1pagetable 725 * so that we can continue to use console. 726 */ 727 copy_io_area_map((pd_entry_t *)l1pagetable); 728 729 /* 730 * Now we have the real page tables in place so we can switch to them. 731 * Once this is done we will be running with the REAL kernel page 732 * tables. 733 */ 734 735 /* 736 * Update the physical_freestart/physical_freeend/free_pages 737 * variables. 738 */ 739 { 740 physical_freestart = physical_start + 741 (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE); 742 physical_freeend = physical_end; 743 free_pages = 744 (physical_freeend - physical_freestart) / PAGE_SIZE; 745 } 746 747 /* Switch tables */ 748 #ifdef VERBOSE_INIT_ARM 749 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 750 physical_freestart, free_pages, free_pages); 751 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 752 #endif 753 LEDSTEP(); 754 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 755 setttb(kernel_l1pt.pv_pa); 756 cpu_tlb_flushID(); 757 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 758 759 /* 760 * Moved from cpu_startup() as data_abort_handler() references 761 * this during uvm init 762 */ 763 proc0paddr = (struct user *)kernelstack.pv_va; 764 lwp0.l_addr = proc0paddr; 765 766 #ifdef VERBOSE_INIT_ARM 767 printf("done!\n"); 768 #endif 769 770 LEDSTEP(); 771 #ifdef VERBOSE_INIT_ARM 772 printf("bootstrap done.\n"); 773 #endif 774 775 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 776 777 /* 778 * Pages were allocated during the secondary bootstrap for the 779 * stacks for different CPU modes. 780 * We must now set the r13 registers in the different CPU modes to 781 * point to these stacks. 782 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 783 * of the stack memory. 784 */ 785 #ifdef VERBOSE_INIT_ARM 786 printf("init subsystems: stacks "); 787 #endif 788 789 set_stackptr(PSR_IRQ32_MODE, 790 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 791 set_stackptr(PSR_ABT32_MODE, 792 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 793 set_stackptr(PSR_UND32_MODE, 794 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 795 796 LEDSTEP(); 797 798 /* 799 * Well we should set a data abort handler. 800 * Once things get going this will change as we will need a proper 801 * handler. 802 * Until then we will use a handler that just panics but tells us 803 * why. 804 * Initialisation of the vectors will just panic on a data abort. 805 * This just fills in a slightly better one. 806 */ 807 #ifdef VERBOSE_INIT_ARM 808 printf("vectors "); 809 #endif 810 data_abort_handler_address = (u_int)data_abort_handler; 811 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 812 undefined_handler_address = (u_int)undefinedinstruction_bounce; 813 814 /* Initialise the undefined instruction handlers */ 815 #ifdef VERBOSE_INIT_ARM 816 printf("undefined "); 817 #endif 818 undefined_init(); 819 820 LEDSTEP(); 821 822 /* Load memory into UVM. */ 823 #ifdef VERBOSE_INIT_ARM 824 printf("page "); 825 #endif 826 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 827 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 828 atop(physical_freestart), atop(physical_freeend), 829 VM_FREELIST_DEFAULT); 830 831 LEDSTEP(); 832 /* Boot strap pmap telling it where the kernel page table is */ 833 #ifdef VERBOSE_INIT_ARM 834 printf("pmap "); 835 #endif 836 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE, 837 KERNEL_VM_BASE + KERNEL_VM_SIZE); 838 839 LEDSTEP(); 840 841 /* Setup the IRQ system */ 842 #ifdef VERBOSE_INIT_ARM 843 printf("irq "); 844 #endif 845 /* XXX irq_init(); */ 846 847 #ifdef VERBOSE_INIT_ARM 848 printf("done.\n"); 849 #endif 850 851 #ifdef BOOTHOWTO 852 boothowto |= BOOTHOWTO; 853 #endif 854 { 855 uint8_t gpio = ~gpio_read8(GPIO_PFDAT); 856 857 if (gpio & (1<<0)) /* SW1 (EINT0) */ 858 boothowto ^= RB_SINGLE; 859 if (gpio & (1<<2)) /* SW2 (EINT2) */ 860 boothowto ^= RB_KDB; 861 #ifdef VERBOSE_INIT_ARM 862 printf( "sw: %x boothowto: %x\n", gpio, boothowto ); 863 #endif 864 } 865 866 #ifdef IPKDB 867 /* Initialise ipkdb */ 868 ipkdb_init(); 869 if (boothowto & RB_KDB) 870 ipkdb_connect(0); 871 #endif 872 873 #ifdef KGDB 874 if (boothowto & RB_KDB) { 875 kgdb_debug_init = 1; 876 kgdb_connect(1); 877 } 878 #endif 879 880 #if NKSYMS || defined(DDB) || defined(LKM) 881 /* Firmware doesn't load symbols. */ 882 ksyms_init(0, NULL, NULL); 883 #endif 884 885 #ifdef DDB 886 db_machine_init(); 887 if (boothowto & RB_KDB) 888 Debugger(); 889 #endif 890 891 /* We return the new stack pointer address */ 892 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP); 893 } 894 895 void 896 consinit(void) 897 { 898 static int consinit_done = 0; 899 bus_space_tag_t iot = s3c2xx0_softc->sc_iot; 900 int pclk = s3c2xx0_softc->sc_pclk; 901 902 if (consinit_done != 0) 903 return; 904 905 consinit_done = 1; 906 907 #if NSSCOM > 0 908 #ifdef SSCOM0CONSOLE 909 if (0 == s3c2410_sscom_cnattach(iot, 0, comcnspeed, 910 pclk, comcnmode)) 911 return; 912 #endif 913 #ifdef SSCOM1CONSOLE 914 if (0 == s3c2410_sscom_cnattach(iot, 1, comcnspeed, 915 pclk, comcnmode)) 916 return; 917 #endif 918 #endif /* NSSCOM */ 919 #if NCOM>0 && defined(CONCOMADDR) 920 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed, 921 COM_FREQ, COM_TYPE_NORMAL, comcnmode)) 922 panic("can't init serial console @%x", CONCOMADDR); 923 return; 924 #endif 925 926 consinit_done = 0; 927 } 928 929 930 #ifdef KGDB 931 932 #if (NSSCOM > 0) 933 934 #ifdef KGDB_DEVNAME 935 const char kgdb_devname[] = KGDB_DEVNAME; 936 #else 937 const char kgdb_devname[] = ""; 938 #endif 939 940 #ifndef KGDB_DEVMODE 941 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */ 942 #endif 943 int kgdb_sscom_mode = KGDB_DEVMODE; 944 945 #endif /* NSSCOM */ 946 947 void 948 kgdb_port_init(void) 949 { 950 #if (NSSCOM > 0) 951 int unit = -1; 952 int pclk = s3c2xx0_softc->sc_pclk; 953 954 if (strcmp(kgdb_devname, "sscom0") == 0) 955 unit = 0; 956 else if (strcmp(kgdb_devname, "sscom1") == 0) 957 unit = 1; 958 959 if (unit >= 0) { 960 s3c2410_sscom_kgdb_attach(s3c2xx0_softc->sc_iot, 961 unit, kgdb_rate, pclk, kgdb_sscom_mode); 962 } 963 #endif 964 } 965 #endif 966 967 static __inline 968 pd_entry_t * 969 read_ttb(void) 970 { 971 long ttb; 972 973 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb)); 974 975 976 return (pd_entry_t *)(ttb & ~((1 << 14) - 1)); 977 } 978 979 980 static __inline void 981 writeback_dcache_line(vaddr_t va) 982 { 983 /* writeback Dcache line */ 984 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9 985 * assume write-through cache, and always flush Dcache instead of 986 * cleaning it. Since Boot loader maps page table with write-back 987 * cached, we really need to clean Dcache. */ 988 asm("mcr p15, 0, %0, c7, c10, 1" 989 : : "r"(va)); 990 } 991 992 static __inline void 993 clean_dcache_line(vaddr_t va) 994 { 995 /* writeback and invalidate Dcache line */ 996 asm("mcr p15, 0, %0, c7, c14, 1" 997 : : "r"(va)); 998 } 999 1000 static vaddr_t section_free = SMDK2410_VBASE_FREE; 1001 1002 /* 1003 * simple memory mapping function used in early bootstrap stage 1004 * before pmap is initialized. 1005 * This assumes only peripheral registers to map. they are mapped to 1006 * fixed address with section mapping. 1007 */ 1008 static int 1009 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 1010 int flag, bus_space_handle_t * bshp) 1011 { 1012 long offset; 1013 int modified = 0; 1014 pd_entry_t *pagedir = read_ttb(); 1015 /* This assumes PA==VA for page directory */ 1016 1017 if (0) { 1018 } else { 1019 vaddr_t va; 1020 bus_addr_t pa; 1021 int cacheable = flag & BUS_SPACE_MAP_CACHEABLE; 1022 1023 1024 size = (size + L1_S_OFFSET) & ~L1_S_OFFSET; 1025 pa = bpa & ~L1_S_OFFSET; 1026 offset = bpa - pa; 1027 1028 va = section_free; 1029 while (size) { 1030 pmap_map_section((vaddr_t)pagedir, va, 1031 pa, VM_PROT_READ | VM_PROT_WRITE, 1032 cacheable ? PTE_CACHE : PTE_NOCACHE); 1033 writeback_dcache_line((vaddr_t)& pagedir[va >> L1_S_SHIFT]); 1034 va += L1_S_SIZE; 1035 pa += L1_S_SIZE; 1036 size -= L1_S_SIZE; 1037 } 1038 1039 *bshp = (bus_space_handle_t)(section_free + offset); 1040 section_free = va; 1041 } 1042 1043 1044 if (modified) { 1045 1046 cpu_drain_writebuf(); 1047 cpu_tlb_flushD(); 1048 } 1049 return (0); 1050 } 1051 1052 static void 1053 copy_io_area_map(pd_entry_t * new_pd) 1054 { 1055 pd_entry_t *cur_pd = read_ttb(); 1056 int sec; 1057 1058 for (sec = SMDK2410_VBASE_FREE >> L1_S_SHIFT; 1059 sec < (section_free >> L1_S_SHIFT); ++sec) { 1060 new_pd[sec] = cur_pd[sec]; 1061 writeback_dcache_line((vaddr_t)&new_pd[sec]); 1062 } 1063 cpu_drain_writebuf(); 1064 } 1065 1066 1067 static struct arm32_dma_range smdk2410_dma_ranges[1]; 1068 1069 bus_dma_tag_t 1070 s3c2xx0_bus_dma_init(struct arm32_bus_dma_tag *dma_tag_template) 1071 { 1072 extern paddr_t physical_start, physical_end; 1073 struct arm32_bus_dma_tag *dmat; 1074 1075 smdk2410_dma_ranges[0].dr_sysbase = physical_start; 1076 smdk2410_dma_ranges[0].dr_busbase = physical_start; 1077 smdk2410_dma_ranges[0].dr_len = physical_end - physical_start; 1078 1079 #if 1 1080 dmat = dma_tag_template; 1081 #else 1082 dmat = malloc(sizeof *dmat, M_DEVBUF, M_NOWAIT); 1083 if (dmat == NULL) 1084 return NULL; 1085 *dmat = *dma_tag_template; 1086 #endif 1087 1088 dmat->_ranges = smdk2410_dma_ranges; 1089 dmat->_nranges = 1; 1090 1091 return dmat; 1092 } 1093
Indexes created Mon Oct 20 20:10:13 GMT 2025