smdk2410_machdep.c revision 1.12.4.2
1 /* $NetBSD: smdk2410_machdep.c,v 1.12.4.2 2008/01/21 09:36:15 yamt Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003 Fujitsu Component Limited 5 * Copyright (c) 2002, 2003, 2005 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 /* 35 * Copyright (c) 2001,2002 ARM Ltd 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. The name of the company may not be used to endorse or promote 47 * products derived from this software without specific prior written 48 * permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND 51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 52 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 53 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD 54 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 60 * POSSIBILITY OF SUCH DAMAGE. 61 * 62 */ 63 64 /* 65 * Copyright (c) 1997,1998 Mark Brinicombe. 66 * Copyright (c) 1997,1998 Causality Limited. 67 * All rights reserved. 68 * 69 * Redistribution and use in source and binary forms, with or without 70 * modification, are permitted provided that the following conditions 71 * are met: 72 * 1. Redistributions of source code must retain the above copyright 73 * notice, this list of conditions and the following disclaimer. 74 * 2. Redistributions in binary form must reproduce the above copyright 75 * notice, this list of conditions and the following disclaimer in the 76 * documentation and/or other materials provided with the distribution. 77 * 3. All advertising materials mentioning features or use of this software 78 * must display the following acknowledgement: 79 * This product includes software developed by Mark Brinicombe 80 * for the NetBSD Project. 81 * 4. The name of the company nor the name of the author may be used to 82 * endorse or promote products derived from this software without specific 83 * prior written permission. 84 * 85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 86 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 87 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 88 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 89 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 90 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 91 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 95 * SUCH DAMAGE. 96 * 97 * Machine dependant functions for kernel setup for integrator board 98 * 99 * Created : 24/11/97 100 */ 101 102 /* 103 * Machine dependant functions for kernel setup for Samsung SMDK2410 104 * derived from integrator_machdep.c 105 */ 106 107 #include <sys/cdefs.h> 108 __KERNEL_RCSID(0, "$NetBSD: smdk2410_machdep.c,v 1.12.4.2 2008/01/21 09:36:15 yamt Exp $"); 109 110 #include "opt_ddb.h" 111 #include "opt_kgdb.h" 112 #include "opt_pmap_debug.h" 113 #include "opt_md.h" 114 115 #include <sys/param.h> 116 #include <sys/device.h> 117 #include <sys/systm.h> 118 #include <sys/kernel.h> 119 #include <sys/exec.h> 120 #include <sys/proc.h> 121 #include <sys/msgbuf.h> 122 #include <sys/reboot.h> 123 #include <sys/termios.h> 124 #include <sys/ksyms.h> 125 126 #include <uvm/uvm_extern.h> 127 128 #include <dev/cons.h> 129 #include <dev/md.h> 130 131 #include <machine/db_machdep.h> 132 #include <ddb/db_sym.h> 133 #include <ddb/db_extern.h> 134 #ifdef KGDB 135 #include <sys/kgdb.h> 136 #endif 137 138 #include <machine/bootconfig.h> 139 #include <machine/bus.h> 140 #include <machine/cpu.h> 141 #include <machine/frame.h> 142 #include <machine/intr.h> 143 #include <arm/undefined.h> 144 145 #include <arm/arm32/machdep.h> 146 147 #include <arm/s3c2xx0/s3c2410reg.h> 148 #include <arm/s3c2xx0/s3c2410var.h> 149 150 #include "ksyms.h" 151 152 #ifndef SDRAM_START 153 #define SDRAM_START S3C2410_SDRAM_START 154 #endif 155 #ifndef SDRAM_SIZE 156 #define SDRAM_SIZE (32*1024*1024) 157 #endif 158 159 /* 160 * Address to map I/O registers in early initialize stage. 161 */ 162 #define SMDK2410_IO_VBASE 0xfd000000 163 164 /* Kernel text starts 2MB in from the bottom of the kernel address space. */ 165 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000) 166 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000) 167 168 /* 169 * The range 0xc1000000 - 0xccffffff is available for kernel VM space 170 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff 171 */ 172 #define KERNEL_VM_SIZE 0x0C000000 173 174 /* Memory disk support */ 175 #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR) 176 #define DO_MEMORY_DISK 177 /* We have memory disk image outside of the kernel on ROM. */ 178 #ifdef MEMORY_DISK_ROOT_ROM 179 /* map the image directory and use read-only */ 180 #else 181 /* copy the image to RAM */ 182 #endif 183 #endif 184 185 186 /* 187 * Address to call from cpu_reset() to reset the machine. 188 * This is machine architecture dependant as it varies depending 189 * on where the ROM appears when you turn the MMU off. 190 */ 191 u_int cpu_reset_address = (u_int)0; 192 193 /* Define various stack sizes in pages */ 194 #define IRQ_STACK_SIZE 1 195 #define ABT_STACK_SIZE 1 196 #define UND_STACK_SIZE 1 197 198 BootConfig bootconfig; /* Boot config storage */ 199 char *boot_args = NULL; 200 char *boot_file = NULL; 201 202 vm_offset_t physical_start; 203 vm_offset_t physical_freestart; 204 vm_offset_t physical_freeend; 205 vm_offset_t physical_end; 206 u_int free_pages; 207 vm_offset_t pagetables_start; 208 int physmem = 0; 209 210 /*int debug_flags;*/ 211 #ifndef PMAP_STATIC_L1S 212 int max_processes = 64; /* Default number */ 213 #endif /* !PMAP_STATIC_L1S */ 214 215 /* Physical and virtual addresses for some global pages */ 216 pv_addr_t systempage; 217 pv_addr_t irqstack; 218 pv_addr_t undstack; 219 pv_addr_t abtstack; 220 pv_addr_t kernelstack; 221 222 vm_offset_t msgbufphys; 223 224 extern u_int data_abort_handler_address; 225 extern u_int prefetch_abort_handler_address; 226 extern u_int undefined_handler_address; 227 228 #ifdef PMAP_DEBUG 229 extern int pmap_debug_level; 230 #endif 231 232 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */ 233 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */ 234 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */ 235 236 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 237 238 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 239 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 240 241 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 242 243 struct user *proc0paddr; 244 245 /* Prototypes */ 246 247 void consinit(void); 248 void kgdb_port_init(void); 249 250 251 #include "com.h" 252 #if NCOM > 0 253 #include <dev/ic/comreg.h> 254 #include <dev/ic/comvar.h> 255 #endif 256 257 #include "sscom.h" 258 #if NSSCOM > 0 259 #include "opt_sscom.h" 260 #include <arm/s3c2xx0/sscom_var.h> 261 #endif 262 263 /* 264 * Define the default console speed for the board. This is generally 265 * what the firmware provided with the board defaults to. 266 */ 267 #ifndef CONSPEED 268 #define CONSPEED B115200 /* TTYDEF_SPEED */ 269 #endif 270 #ifndef CONMODE 271 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 272 #endif 273 274 int comcnspeed = CONSPEED; 275 int comcnmode = CONMODE; 276 277 278 /* 279 * void cpu_reboot(int howto, char *bootstr) 280 * 281 * Reboots the system 282 * 283 * Deal with any syncing, unmounting, dumping and shutdown hooks, 284 * then reset the CPU. 285 */ 286 void 287 cpu_reboot(int howto, char *bootstr) 288 { 289 #ifdef DIAGNOSTIC 290 /* info */ 291 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 292 #endif 293 294 cpu_reset_address = vtophys((u_int)s3c2410_softreset); 295 296 /* 297 * If we are still cold then hit the air brakes 298 * and crash to earth fast 299 */ 300 if (cold) { 301 doshutdownhooks(); 302 printf("The operating system has halted.\n"); 303 printf("Please press any key to reboot.\n\n"); 304 cngetc(); 305 printf("rebooting...\n"); 306 cpu_reset(); 307 /* NOTREACHED */ 308 } 309 /* Disable console buffering */ 310 311 /* 312 * If RB_NOSYNC was not specified sync the discs. 313 * Note: Unless cold is set to 1 here, syslogd will die during the 314 * unmount. It looks like syslogd is getting woken up only to find 315 * that it cannot page part of the binary in as the filesystem has 316 * been unmounted. 317 */ 318 if (!(howto & RB_NOSYNC)) 319 bootsync(); 320 321 /* Say NO to interrupts */ 322 splhigh(); 323 324 /* Do a dump if requested. */ 325 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 326 dumpsys(); 327 328 /* Run any shutdown hooks */ 329 doshutdownhooks(); 330 331 /* Make sure IRQ's are disabled */ 332 IRQdisable; 333 334 if (howto & RB_HALT) { 335 printf("The operating system has halted.\n"); 336 printf("Please press any key to reboot.\n\n"); 337 cngetc(); 338 } 339 printf("rebooting...\n"); 340 cpu_reset(); 341 /* NOTREACHED */ 342 } 343 344 /* 345 * Static device mappings. These peripheral registers are mapped at 346 * fixed virtual addresses very early in initarm() so that we can use 347 * them while booting the kernel , and stay at the same address 348 * throughout whole kernel's life time. 349 * 350 * We use this table twice; once with bootstrap page table, and once 351 * with kernel's page table which we build up in initarm(). 352 * 353 * Since we map these registers into the bootstrap page table using 354 * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map 355 * registers segment-aligned and segment-rounded in order to avoid 356 * using the 2nd page tables. 357 */ 358 359 #define _A(a) ((a) & ~L1_S_OFFSET) 360 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 361 362 #define _V(n) (SMDK2410_IO_VBASE + (n) * L1_S_SIZE) 363 364 #define GPIO_VBASE _V(0) 365 #define INTCTL_VBASE _V(1) 366 #define CLKMAN_VBASE _V(2) 367 #define UART_VBASE _V(3) 368 #ifdef MEMORY_DISK_DYNAMIC 369 #define MEMORY_DISK_VADDR _V(4) 370 #endif 371 372 static const struct pmap_devmap smdk2410_devmap[] = { 373 /* GPIO registers */ 374 { 375 GPIO_VBASE, 376 _A(S3C2410_GPIO_BASE), 377 _S(S3C2410_GPIO_SIZE), 378 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 379 }, 380 { 381 INTCTL_VBASE, 382 _A(S3C2410_INTCTL_BASE), 383 _S(S3C2410_INTCTL_SIZE), 384 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 385 }, 386 { 387 CLKMAN_VBASE, 388 _A(S3C2410_CLKMAN_BASE), 389 _S(S3C24X0_CLKMAN_SIZE), 390 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 391 }, 392 { /* UART registers for UART0, 1, 2. */ 393 UART_VBASE, 394 _A(S3C2410_UART0_BASE), 395 _S(S3C2410_UART_BASE(3) - S3C2410_UART0_BASE), 396 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 397 }, 398 399 { 0, 0, 0, 0 } 400 }; 401 402 #undef _A 403 #undef _S 404 405 static inline pd_entry_t * 406 read_ttb(void) 407 { 408 long ttb; 409 410 __asm volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb)); 411 412 413 return (pd_entry_t *)(ttb & ~((1 << 14) - 1)); 414 } 415 416 417 #define ioreg_read8(a) (*(volatile uint8_t *)(a)) 418 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v)) 419 #define ioreg_read32(a) (*(volatile uint32_t *)(a)) 420 #define ioreg_write32(a,v) (*(volatile uint32_t *)(a)=(v)) 421 422 /* 423 * u_int initarm(...) 424 * 425 * Initial entry point on startup. This gets called before main() is 426 * entered. 427 * It should be responsible for setting up everything that must be 428 * in place when main is called. 429 * This includes 430 * Taking a copy of the boot configuration structure. 431 * Initialising the physical console so characters can be printed. 432 * Setting up page tables for the kernel 433 * Relocating the kernel to the bottom of physical memory 434 */ 435 436 u_int 437 initarm(void *arg) 438 { 439 int loop; 440 int loop1; 441 u_int l1pagetable; 442 extern int etext __asm("_etext"); 443 extern int end __asm("_end"); 444 pv_addr_t kernel_l1pt; 445 int progress_counter = 0; 446 447 #ifdef DO_MEMORY_DISK 448 vm_offset_t md_root_start; 449 #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE) 450 #endif 451 452 #define gpio_read8(reg) ioreg_read8(GPIO_VBASE + (reg)) 453 454 #define LEDSTEP() __LED(progress_counter++) 455 456 #define pdatf (*(volatile uint8_t *)(S3C2410_GPIO_BASE+GPIO_PFDAT)) 457 #define __LED(x) (pdatf = (pdatf & ~0xf0) | (~(x) & 0xf0)) 458 459 LEDSTEP(); 460 461 /* CS8900A on CS3 and CL-PD7610 need nBE1 signal. make sure 462 * memory controller is set correctly. (USB download firmware 463 * doesn't do this right) Also, we use WAIT signal for them. 464 */ 465 ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON, 466 (BWSCON_ST|BWSCON_WS) << BWSCON_BANK_SHIFT(2) | 467 (BWSCON_ST|BWSCON_WS) << BWSCON_BANK_SHIFT(3) | 468 ioreg_read32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON)); 469 /* tweak access timing for CS8900A */ 470 ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BANKCON(3), 471 (0<<BANKCON_TACS_SHIFT)|(1<<BANKCON_TCOS_SHIFT)| 472 (7<<BANKCON_TACC_SHIFT)|(0<<BANKCON_TOCH_SHIFT)| 473 (0<<BANKCON_TCAH_SHIFT)); 474 475 /* 476 * Heads up ... Setup the CPU / MMU / TLB functions 477 */ 478 if (set_cpufuncs()) 479 panic("cpu not recognized!"); 480 481 LEDSTEP(); 482 483 /* 484 * Map I/O registers that are used in startup. Now we are 485 * still using page table prepared by bootloader. Later we'll 486 * map those registers at the same address in the kernel page 487 * table. 488 */ 489 pmap_devmap_bootstrap((vaddr_t)read_ttb(), smdk2410_devmap); 490 491 #undef pdatf 492 #define pdatf (*(volatile uint8_t *)(GPIO_VBASE+GPIO_PFDAT)) 493 494 495 LEDSTEP(); 496 497 /* Disable all peripheral interrupts */ 498 ioreg_write32(INTCTL_VBASE + INTCTL_INTMSK, ~0); 499 500 /* initialize some variables so that splfoo() doesn't 501 touch illegal address. */ 502 s3c2xx0_intr_bootstrap(INTCTL_VBASE); 503 504 consinit(); 505 #ifdef VERBOSE_INIT_ARM 506 printf("consinit done\n"); 507 #endif 508 509 #ifdef KGDB 510 LEDSTEP(); 511 kgdb_port_init(); 512 #endif 513 LEDSTEP(); 514 515 #ifdef VERBOSE_INIT_ARM 516 /* Talk to the user */ 517 printf("\nNetBSD/evbarm (SMDK2410) booting ...\n"); 518 #endif 519 /* 520 * Ok we have the following memory map 521 * 522 * Physical Address Range Description 523 * ----------------------- ---------------------------------- 524 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB) 525 * 0x02000000 - 0x020fffff AMD flash Memory (1MB) 526 * or (depend on DIPSW setting) 527 * 0x00000000 - 0x000fffff AMD flash Memory (1MB) 528 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB) 529 * 530 * 0x30000000 - 0x31ffffff SDRAM (32MB) 531 * 532 * The initarm() has the responsibility for creating the kernel 533 * page tables. 534 * It must also set up various memory pointers that are used 535 * by pmap etc. 536 */ 537 538 /* Fake bootconfig structure for the benefit of pmap.c */ 539 /* XXX must make the memory description h/w independent */ 540 bootconfig.dramblocks = 1; 541 bootconfig.dram[0].address = SDRAM_START; 542 bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE; 543 544 /* 545 * Set up the variables that define the availablilty of 546 * physical memory. For now, we're going to set 547 * physical_freestart to 0x08200000 (where the kernel 548 * was loaded), and allocate the memory we need downwards. 549 * If we get too close to the bottom of SDRAM, we 550 * will panic. We will update physical_freestart and 551 * physical_freeend later to reflect what pmap_bootstrap() 552 * wants to see. 553 * 554 * XXX pmap_bootstrap() needs an enema. 555 */ 556 physical_start = bootconfig.dram[0].address; 557 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 558 559 #ifdef DO_MEMORY_DISK 560 #ifdef MEMORY_DISK_ROOT_ROM 561 md_root_start = MEMORY_DISK_ROOT_ADDR; 562 boothowto |= RB_RDONLY; 563 #else 564 /* Reserve physmem for ram disk */ 565 md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1)); 566 printf("Reserve %ld bytes for memory disk\n", 567 physical_end - md_root_start); 568 /* copy fs contents */ 569 memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR, 570 MD_ROOT_SIZE); 571 physical_end = md_root_start; 572 #endif 573 #endif 574 575 physical_freestart = SDRAM_START; /* XXX */ 576 physical_freeend = SDRAM_START + 0x00200000; 577 578 physmem = (physical_end - physical_start) / PAGE_SIZE; 579 580 #ifdef VERBOSE_INIT_ARM 581 /* Tell the user about the memory */ 582 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 583 physical_start, physical_end - 1); 584 #endif 585 586 /* 587 * XXX 588 * Okay, the kernel starts 2MB in from the bottom of physical 589 * memory. We are going to allocate our bootstrap pages downwards 590 * from there. 591 * 592 * We need to allocate some fixed page tables to get the kernel 593 * going. We allocate one page directory and a number of page 594 * tables and store the physical addresses in the kernel_pt_table 595 * array. 596 * 597 * The kernel page directory must be on a 16K boundary. The page 598 * tables must be on 4K boundaries. What we do is allocate the 599 * page directory on the first 16K boundary that we encounter, and 600 * the page tables on 4K boundaries otherwise. Since we allocate 601 * at least 3 L2 page tables, we are guaranteed to encounter at 602 * least one 16K aligned region. 603 */ 604 605 #ifdef VERBOSE_INIT_ARM 606 printf("Allocating page tables\n"); 607 #endif 608 609 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 610 611 #ifdef VERBOSE_INIT_ARM 612 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 613 physical_freestart, free_pages, free_pages); 614 #endif 615 616 /* Define a macro to simplify memory allocation */ 617 #define valloc_pages(var, np) \ 618 alloc_pages((var).pv_pa, (np)); \ 619 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 620 621 #define alloc_pages(var, np) \ 622 physical_freeend -= ((np) * PAGE_SIZE); \ 623 if (physical_freeend < physical_freestart) \ 624 panic("initarm: out of memory"); \ 625 (var) = physical_freeend; \ 626 free_pages -= (np); \ 627 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 628 629 loop1 = 0; 630 kernel_l1pt.pv_pa = 0; 631 kernel_l1pt.pv_va = 0; 632 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 633 /* Are we 16KB aligned for an L1 ? */ 634 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 635 && kernel_l1pt.pv_pa == 0) { 636 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 637 } else { 638 valloc_pages(kernel_pt_table[loop1], 639 L2_TABLE_SIZE / PAGE_SIZE); 640 ++loop1; 641 } 642 } 643 644 /* This should never be able to happen but better confirm that. */ 645 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0) 646 panic("initarm: Failed to align the kernel page directory\n"); 647 648 /* 649 * Allocate a page for the system page mapped to V0x00000000 650 * This page will just contain the system vectors and can be 651 * shared by all processes. 652 */ 653 alloc_pages(systempage.pv_pa, 1); 654 655 /* Allocate stacks for all modes */ 656 valloc_pages(irqstack, IRQ_STACK_SIZE); 657 valloc_pages(abtstack, ABT_STACK_SIZE); 658 valloc_pages(undstack, UND_STACK_SIZE); 659 valloc_pages(kernelstack, UPAGES); 660 661 #ifdef VERBOSE_INIT_ARM 662 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 663 irqstack.pv_va); 664 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 665 abtstack.pv_va); 666 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 667 undstack.pv_va); 668 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 669 kernelstack.pv_va); 670 #endif 671 672 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 673 674 LEDSTEP(); 675 676 /* 677 * Ok we have allocated physical pages for the primary kernel 678 * page tables 679 */ 680 681 #ifdef VERBOSE_INIT_ARM 682 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 683 #endif 684 685 /* 686 * Now we start construction of the L1 page table 687 * We start by mapping the L2 page tables into the L1. 688 * This means that we can replace L1 mappings later on if necessary 689 */ 690 l1pagetable = kernel_l1pt.pv_pa; 691 692 /* Map the L2 pages tables in the L1 page table */ 693 pmap_link_l2pt(l1pagetable, 0x00000000, 694 &kernel_pt_table[KERNEL_PT_SYS]); 695 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 696 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 697 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 698 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 699 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 700 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 701 702 /* update the top of the kernel VM */ 703 pmap_curmaxkvaddr = 704 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 705 706 #ifdef VERBOSE_INIT_ARM 707 printf("Mapping kernel\n"); 708 #endif 709 710 /* Now we fill in the L2 pagetable for the kernel static code/data */ 711 { 712 size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE; 713 size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE; 714 u_int logical; 715 716 textsize = (textsize + PGOFSET) & ~PGOFSET; 717 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 718 719 logical = 0x00200000; /* offset of kernel in RAM */ 720 721 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 722 physical_start + logical, textsize, 723 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 724 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 725 physical_start + logical, totalsize - textsize, 726 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 727 } 728 729 #ifdef VERBOSE_INIT_ARM 730 printf("Constructing L2 page tables\n"); 731 #endif 732 733 /* Map the stack pages */ 734 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 735 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 736 PTE_CACHE); 737 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 738 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 739 PTE_CACHE); 740 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 741 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 742 PTE_CACHE); 743 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 744 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 745 746 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 747 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 748 749 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 750 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 751 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 752 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 753 } 754 755 /* Map the vector page. */ 756 #if 1 757 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 758 * cache-clean code there. */ 759 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 760 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 761 #else 762 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 763 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 764 #endif 765 766 #ifdef MEMORY_DISK_DYNAMIC 767 /* map MD root image */ 768 pmap_map_chunk(l1pagetable, MEMORY_DISK_VADDR, md_root_start, 769 MD_ROOT_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 770 771 md_root_setconf((void *)md_root_start, MD_ROOT_SIZE); 772 #endif /* MEMORY_DISK_DYNAMIC */ 773 /* 774 * map integrated peripherals at same address in l1pagetable 775 * so that we can continue to use console. 776 */ 777 pmap_devmap_bootstrap(l1pagetable, smdk2410_devmap); 778 779 /* 780 * Now we have the real page tables in place so we can switch to them. 781 * Once this is done we will be running with the REAL kernel page 782 * tables. 783 */ 784 785 /* 786 * Update the physical_freestart/physical_freeend/free_pages 787 * variables. 788 */ 789 { 790 physical_freestart = physical_start + 791 (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE); 792 physical_freeend = physical_end; 793 free_pages = 794 (physical_freeend - physical_freestart) / PAGE_SIZE; 795 } 796 797 /* Switch tables */ 798 #ifdef VERBOSE_INIT_ARM 799 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 800 physical_freestart, free_pages, free_pages); 801 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 802 #endif 803 LEDSTEP(); 804 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 805 setttb(kernel_l1pt.pv_pa); 806 cpu_tlb_flushID(); 807 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 808 809 /* 810 * Moved from cpu_startup() as data_abort_handler() references 811 * this during uvm init 812 */ 813 proc0paddr = (struct user *)kernelstack.pv_va; 814 lwp0.l_addr = proc0paddr; 815 816 #ifdef VERBOSE_INIT_ARM 817 printf("done!\n"); 818 #endif 819 820 LEDSTEP(); 821 #ifdef VERBOSE_INIT_ARM 822 printf("bootstrap done.\n"); 823 #endif 824 825 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 826 827 /* 828 * Pages were allocated during the secondary bootstrap for the 829 * stacks for different CPU modes. 830 * We must now set the r13 registers in the different CPU modes to 831 * point to these stacks. 832 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 833 * of the stack memory. 834 */ 835 #ifdef VERBOSE_INIT_ARM 836 printf("init subsystems: stacks "); 837 #endif 838 839 set_stackptr(PSR_IRQ32_MODE, 840 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 841 set_stackptr(PSR_ABT32_MODE, 842 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 843 set_stackptr(PSR_UND32_MODE, 844 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 845 846 LEDSTEP(); 847 848 /* 849 * Well we should set a data abort handler. 850 * Once things get going this will change as we will need a proper 851 * handler. 852 * Until then we will use a handler that just panics but tells us 853 * why. 854 * Initialisation of the vectors will just panic on a data abort. 855 * This just fills in a slightly better one. 856 */ 857 #ifdef VERBOSE_INIT_ARM 858 printf("vectors "); 859 #endif 860 data_abort_handler_address = (u_int)data_abort_handler; 861 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 862 undefined_handler_address = (u_int)undefinedinstruction_bounce; 863 864 /* Initialise the undefined instruction handlers */ 865 #ifdef VERBOSE_INIT_ARM 866 printf("undefined "); 867 #endif 868 undefined_init(); 869 870 LEDSTEP(); 871 872 /* Load memory into UVM. */ 873 #ifdef VERBOSE_INIT_ARM 874 printf("page "); 875 #endif 876 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 877 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 878 atop(physical_freestart), atop(physical_freeend), 879 VM_FREELIST_DEFAULT); 880 881 LEDSTEP(); 882 /* Boot strap pmap telling it where the kernel page table is */ 883 #ifdef VERBOSE_INIT_ARM 884 printf("pmap "); 885 #endif 886 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE, 887 KERNEL_VM_BASE + KERNEL_VM_SIZE); 888 889 LEDSTEP(); 890 891 /* Setup the IRQ system */ 892 #ifdef VERBOSE_INIT_ARM 893 printf("irq "); 894 #endif 895 /* XXX irq_init(); */ 896 897 #ifdef VERBOSE_INIT_ARM 898 printf("done.\n"); 899 #endif 900 901 #ifdef BOOTHOWTO 902 boothowto |= BOOTHOWTO; 903 #endif 904 { 905 uint8_t gpio = ~gpio_read8(GPIO_PFDAT); 906 907 if (gpio & (1<<0)) /* SW1 (EINT0) */ 908 boothowto ^= RB_SINGLE; 909 if (gpio & (1<<2)) /* SW2 (EINT2) */ 910 boothowto ^= RB_KDB; 911 #ifdef VERBOSE_INIT_ARM 912 printf( "sw: %x boothowto: %x\n", gpio, boothowto ); 913 #endif 914 } 915 916 #ifdef KGDB 917 if (boothowto & RB_KDB) { 918 kgdb_debug_init = 1; 919 kgdb_connect(1); 920 } 921 #endif 922 923 #if NKSYMS || defined(DDB) || defined(LKM) 924 /* Firmware doesn't load symbols. */ 925 ksyms_init(0, NULL, NULL); 926 #endif 927 928 #ifdef DDB 929 db_machine_init(); 930 if (boothowto & RB_KDB) 931 Debugger(); 932 #endif 933 934 /* We return the new stack pointer address */ 935 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP); 936 } 937 938 void 939 consinit(void) 940 { 941 static int consinit_done = 0; 942 bus_space_tag_t iot = &s3c2xx0_bs_tag; 943 int pclk; 944 945 if (consinit_done != 0) 946 return; 947 948 consinit_done = 1; 949 950 s3c24x0_clock_freq2(CLKMAN_VBASE, NULL, NULL, &pclk); 951 952 #if NSSCOM > 0 953 #ifdef SSCOM0CONSOLE 954 if (0 == s3c2410_sscom_cnattach(iot, 0, comcnspeed, 955 pclk, comcnmode)) 956 return; 957 #endif 958 #ifdef SSCOM1CONSOLE 959 if (0 == s3c2410_sscom_cnattach(iot, 1, comcnspeed, 960 pclk, comcnmode)) 961 return; 962 #endif 963 #endif /* NSSCOM */ 964 #if NCOM>0 && defined(CONCOMADDR) 965 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed, 966 COM_FREQ, COM_TYPE_NORMAL, comcnmode)) 967 panic("can't init serial console @%x", CONCOMADDR); 968 return; 969 #endif 970 971 consinit_done = 0; 972 } 973 974 975 #ifdef KGDB 976 977 #if (NSSCOM > 0) 978 979 #ifdef KGDB_DEVNAME 980 const char kgdb_devname[] = KGDB_DEVNAME; 981 #else 982 const char kgdb_devname[] = ""; 983 #endif 984 985 #ifndef KGDB_DEVMODE 986 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */ 987 #endif 988 int kgdb_sscom_mode = KGDB_DEVMODE; 989 990 #endif /* NSSCOM */ 991 992 void 993 kgdb_port_init(void) 994 { 995 #if (NSSCOM > 0) 996 int unit = -1; 997 int pclk; 998 999 if (strcmp(kgdb_devname, "sscom0") == 0) 1000 unit = 0; 1001 else if (strcmp(kgdb_devname, "sscom1") == 0) 1002 unit = 1; 1003 1004 if (unit >= 0) { 1005 s3c24x0_clock_freq2(CLKMAN_VBASE, NULL, NULL, &pclk); 1006 1007 s3c2410_sscom_kgdb_attach(&s3c2xx0_bs_tag, 1008 unit, kgdb_rate, pclk, kgdb_sscom_mode); 1009 } 1010 #endif 1011 } 1012 #endif 1013 1014 static inline void 1015 writeback_dcache_line(vaddr_t va) 1016 { 1017 /* writeback Dcache line */ 1018 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9 1019 * assume write-through cache, and always flush Dcache instead of 1020 * cleaning it. Since Boot loader maps page table with write-back 1021 * cached, we really need to clean Dcache. */ 1022 __asm("mcr p15, 0, %0, c7, c10, 1" 1023 : : "r"(va)); 1024 } 1025 1026 static inline void 1027 clean_dcache_line(vaddr_t va) 1028 { 1029 /* writeback and invalidate Dcache line */ 1030 __asm("mcr p15, 0, %0, c7, c14, 1" 1031 : : "r"(va)); 1032 } 1033 1034 static struct arm32_dma_range smdk2410_dma_ranges[1]; 1035 1036 bus_dma_tag_t 1037 s3c2xx0_bus_dma_init(struct arm32_bus_dma_tag *dma_tag_template) 1038 { 1039 extern paddr_t physical_start, physical_end; 1040 struct arm32_bus_dma_tag *dmat; 1041 1042 smdk2410_dma_ranges[0].dr_sysbase = physical_start; 1043 smdk2410_dma_ranges[0].dr_busbase = physical_start; 1044 smdk2410_dma_ranges[0].dr_len = physical_end - physical_start; 1045 1046 #if 1 1047 dmat = dma_tag_template; 1048 #else 1049 dmat = malloc(sizeof *dmat, M_DEVBUF, M_NOWAIT); 1050 if (dmat == NULL) 1051 return NULL; 1052 *dmat = *dma_tag_template; 1053 #endif 1054 1055 dmat->_ranges = smdk2410_dma_ranges; 1056 dmat->_nranges = 1; 1057 1058 return dmat; 1059 } 1060
Indexes created Mon Oct 20 20:10:13 GMT 2025