smdk2410_machdep.c revision 1.16
1 /* $NetBSD: smdk2410_machdep.c,v 1.16 2006/05/17 04:22:46 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003 Fujitsu Component Limited 5 * Copyright (c) 2002, 2003, 2005 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 /* 35 * Copyright (c) 2001,2002 ARM Ltd 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. The name of the company may not be used to endorse or promote 47 * products derived from this software without specific prior written 48 * permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND 51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 52 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 53 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD 54 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 60 * POSSIBILITY OF SUCH DAMAGE. 61 * 62 */ 63 64 /* 65 * Copyright (c) 1997,1998 Mark Brinicombe. 66 * Copyright (c) 1997,1998 Causality Limited. 67 * All rights reserved. 68 * 69 * Redistribution and use in source and binary forms, with or without 70 * modification, are permitted provided that the following conditions 71 * are met: 72 * 1. Redistributions of source code must retain the above copyright 73 * notice, this list of conditions and the following disclaimer. 74 * 2. Redistributions in binary form must reproduce the above copyright 75 * notice, this list of conditions and the following disclaimer in the 76 * documentation and/or other materials provided with the distribution. 77 * 3. All advertising materials mentioning features or use of this software 78 * must display the following acknowledgement: 79 * This product includes software developed by Mark Brinicombe 80 * for the NetBSD Project. 81 * 4. The name of the company nor the name of the author may be used to 82 * endorse or promote products derived from this software without specific 83 * prior written permission. 84 * 85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 86 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 87 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 88 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 89 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 90 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 91 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 95 * SUCH DAMAGE. 96 * 97 * Machine dependant functions for kernel setup for integrator board 98 * 99 * Created : 24/11/97 100 */ 101 102 /* 103 * Machine dependant functions for kernel setup for Samsung SMDK2410 104 * derived from integrator_machdep.c 105 */ 106 107 #include <sys/cdefs.h> 108 __KERNEL_RCSID(0, "$NetBSD: smdk2410_machdep.c,v 1.16 2006/05/17 04:22:46 mrg Exp $"); 109 110 #include "opt_ddb.h" 111 #include "opt_kgdb.h" 112 #include "opt_ipkdb.h" 113 #include "opt_pmap_debug.h" 114 #include "opt_md.h" 115 116 #include <sys/param.h> 117 #include <sys/device.h> 118 #include <sys/systm.h> 119 #include <sys/kernel.h> 120 #include <sys/exec.h> 121 #include <sys/proc.h> 122 #include <sys/msgbuf.h> 123 #include <sys/reboot.h> 124 #include <sys/termios.h> 125 #include <sys/ksyms.h> 126 127 #include <uvm/uvm_extern.h> 128 129 #include <dev/cons.h> 130 #include <dev/md.h> 131 132 #include <machine/db_machdep.h> 133 #include <ddb/db_sym.h> 134 #include <ddb/db_extern.h> 135 #ifdef KGDB 136 #include <sys/kgdb.h> 137 #endif 138 139 #include <machine/bootconfig.h> 140 #include <machine/bus.h> 141 #include <machine/cpu.h> 142 #include <machine/frame.h> 143 #include <machine/intr.h> 144 #include <arm/undefined.h> 145 146 #include <arm/arm32/machdep.h> 147 148 #include <arm/s3c2xx0/s3c2410reg.h> 149 #include <arm/s3c2xx0/s3c2410var.h> 150 151 #include "ksyms.h" 152 153 #ifndef SDRAM_START 154 #define SDRAM_START S3C2410_SDRAM_START 155 #endif 156 #ifndef SDRAM_SIZE 157 #define SDRAM_SIZE (32*1024*1024) 158 #endif 159 160 /* 161 * Address to map I/O registers in early initialize stage. 162 */ 163 #define SMDK2410_IO_VBASE 0xfd000000 164 165 /* Kernel text starts 2MB in from the bottom of the kernel address space. */ 166 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000) 167 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000) 168 169 /* 170 * The range 0xc1000000 - 0xccffffff is available for kernel VM space 171 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff 172 */ 173 #define KERNEL_VM_SIZE 0x0C000000 174 175 /* Memory disk support */ 176 #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR) 177 #define DO_MEMORY_DISK 178 /* We have memory disk image outside of the kernel on ROM. */ 179 #ifdef MEMORY_DISK_ROOT_ROM 180 /* map the image directory and use read-only */ 181 #else 182 /* copy the image to RAM */ 183 #endif 184 #endif 185 186 187 /* 188 * Address to call from cpu_reset() to reset the machine. 189 * This is machine architecture dependant as it varies depending 190 * on where the ROM appears when you turn the MMU off. 191 */ 192 u_int cpu_reset_address = (u_int)0; 193 194 /* Define various stack sizes in pages */ 195 #define IRQ_STACK_SIZE 1 196 #define ABT_STACK_SIZE 1 197 #ifdef IPKDB 198 #define UND_STACK_SIZE 2 199 #else 200 #define UND_STACK_SIZE 1 201 #endif 202 203 BootConfig bootconfig; /* Boot config storage */ 204 char *boot_args = NULL; 205 char *boot_file = NULL; 206 207 vm_offset_t physical_start; 208 vm_offset_t physical_freestart; 209 vm_offset_t physical_freeend; 210 vm_offset_t physical_end; 211 u_int free_pages; 212 vm_offset_t pagetables_start; 213 int physmem = 0; 214 215 /*int debug_flags;*/ 216 #ifndef PMAP_STATIC_L1S 217 int max_processes = 64; /* Default number */ 218 #endif /* !PMAP_STATIC_L1S */ 219 220 /* Physical and virtual addresses for some global pages */ 221 pv_addr_t systempage; 222 pv_addr_t irqstack; 223 pv_addr_t undstack; 224 pv_addr_t abtstack; 225 pv_addr_t kernelstack; 226 227 vm_offset_t msgbufphys; 228 229 extern u_int data_abort_handler_address; 230 extern u_int prefetch_abort_handler_address; 231 extern u_int undefined_handler_address; 232 233 #ifdef PMAP_DEBUG 234 extern int pmap_debug_level; 235 #endif 236 237 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */ 238 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */ 239 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */ 240 241 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 242 243 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 244 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 245 246 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 247 248 struct user *proc0paddr; 249 250 /* Prototypes */ 251 252 void consinit(void); 253 void kgdb_port_init(void); 254 255 256 #include "com.h" 257 #if NCOM > 0 258 #include <dev/ic/comreg.h> 259 #include <dev/ic/comvar.h> 260 #endif 261 262 #include "sscom.h" 263 #if NSSCOM > 0 264 #include "opt_sscom.h" 265 #include <arm/s3c2xx0/sscom_var.h> 266 #endif 267 268 /* 269 * Define the default console speed for the board. This is generally 270 * what the firmware provided with the board defaults to. 271 */ 272 #ifndef CONSPEED 273 #define CONSPEED B115200 /* TTYDEF_SPEED */ 274 #endif 275 #ifndef CONMODE 276 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 277 #endif 278 279 int comcnspeed = CONSPEED; 280 int comcnmode = CONMODE; 281 282 283 /* 284 * void cpu_reboot(int howto, char *bootstr) 285 * 286 * Reboots the system 287 * 288 * Deal with any syncing, unmounting, dumping and shutdown hooks, 289 * then reset the CPU. 290 */ 291 void 292 cpu_reboot(int howto, char *bootstr) 293 { 294 #ifdef DIAGNOSTIC 295 /* info */ 296 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 297 #endif 298 299 cpu_reset_address = vtophys((u_int)s3c2410_softreset); 300 301 /* 302 * If we are still cold then hit the air brakes 303 * and crash to earth fast 304 */ 305 if (cold) { 306 doshutdownhooks(); 307 printf("The operating system has halted.\n"); 308 printf("Please press any key to reboot.\n\n"); 309 cngetc(); 310 printf("rebooting...\n"); 311 cpu_reset(); 312 /* NOTREACHED */ 313 } 314 /* Disable console buffering */ 315 316 /* 317 * If RB_NOSYNC was not specified sync the discs. 318 * Note: Unless cold is set to 1 here, syslogd will die during the 319 * unmount. It looks like syslogd is getting woken up only to find 320 * that it cannot page part of the binary in as the filesystem has 321 * been unmounted. 322 */ 323 if (!(howto & RB_NOSYNC)) 324 bootsync(); 325 326 /* Say NO to interrupts */ 327 splhigh(); 328 329 /* Do a dump if requested. */ 330 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 331 dumpsys(); 332 333 /* Run any shutdown hooks */ 334 doshutdownhooks(); 335 336 /* Make sure IRQ's are disabled */ 337 IRQdisable; 338 339 if (howto & RB_HALT) { 340 printf("The operating system has halted.\n"); 341 printf("Please press any key to reboot.\n\n"); 342 cngetc(); 343 } 344 printf("rebooting...\n"); 345 cpu_reset(); 346 /* NOTREACHED */ 347 } 348 349 /* 350 * Static device mappings. These peripheral registers are mapped at 351 * fixed virtual addresses very early in initarm() so that we can use 352 * them while booting the kernel , and stay at the same address 353 * throughout whole kernel's life time. 354 * 355 * We use this table twice; once with bootstrap page table, and once 356 * with kernel's page table which we build up in initarm(). 357 * 358 * Since we map these registers into the bootstrap page table using 359 * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map 360 * registers segment-aligned and segment-rounded in order to avoid 361 * using the 2nd page tables. 362 */ 363 364 #define _A(a) ((a) & ~L1_S_OFFSET) 365 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 366 367 #define _V(n) (SMDK2410_IO_VBASE + (n) * L1_S_SIZE) 368 369 #define GPIO_VBASE _V(0) 370 #define INTCTL_VBASE _V(1) 371 #define CLKMAN_VBASE _V(2) 372 #define UART_VBASE _V(3) 373 #ifdef MEMORY_DISK_DYNAMIC 374 #define MEMORY_DISK_VADDR _V(4) 375 #endif 376 377 static const struct pmap_devmap smdk2410_devmap[] = { 378 /* GPIO registers */ 379 { 380 GPIO_VBASE, 381 _A(S3C2410_GPIO_BASE), 382 _S(S3C2410_GPIO_SIZE), 383 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 384 }, 385 { 386 INTCTL_VBASE, 387 _A(S3C2410_INTCTL_BASE), 388 _S(S3C2410_INTCTL_SIZE), 389 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 390 }, 391 { 392 CLKMAN_VBASE, 393 _A(S3C2410_CLKMAN_BASE), 394 _S(S3C24X0_CLKMAN_SIZE), 395 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 396 }, 397 { /* UART registers for UART0, 1, 2. */ 398 UART_VBASE, 399 _A(S3C2410_UART0_BASE), 400 _S(S3C2410_UART_BASE(3) - S3C2410_UART0_BASE), 401 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 402 }, 403 404 { 0, 0, 0, 0 } 405 }; 406 407 #undef _A 408 #undef _S 409 410 static inline pd_entry_t * 411 read_ttb(void) 412 { 413 long ttb; 414 415 __asm volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb)); 416 417 418 return (pd_entry_t *)(ttb & ~((1 << 14) - 1)); 419 } 420 421 422 #define ioreg_read8(a) (*(volatile uint8_t *)(a)) 423 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v)) 424 #define ioreg_read32(a) (*(volatile uint32_t *)(a)) 425 #define ioreg_write32(a,v) (*(volatile uint32_t *)(a)=(v)) 426 427 /* 428 * u_int initarm(...) 429 * 430 * Initial entry point on startup. This gets called before main() is 431 * entered. 432 * It should be responsible for setting up everything that must be 433 * in place when main is called. 434 * This includes 435 * Taking a copy of the boot configuration structure. 436 * Initialising the physical console so characters can be printed. 437 * Setting up page tables for the kernel 438 * Relocating the kernel to the bottom of physical memory 439 */ 440 441 u_int 442 initarm(void *arg) 443 { 444 int loop; 445 int loop1; 446 u_int l1pagetable; 447 extern int etext __asm("_etext"); 448 extern int end __asm("_end"); 449 pv_addr_t kernel_l1pt; 450 int progress_counter = 0; 451 452 #ifdef DO_MEMORY_DISK 453 vm_offset_t md_root_start; 454 #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE) 455 #endif 456 457 #define gpio_read8(reg) ioreg_read8(GPIO_VBASE + (reg)) 458 459 #define LEDSTEP() __LED(progress_counter++) 460 461 #define pdatf (*(volatile uint8_t *)(S3C2410_GPIO_BASE+GPIO_PFDAT)) 462 #define __LED(x) (pdatf = (pdatf & ~0xf0) | (~(x) & 0xf0)) 463 464 LEDSTEP(); 465 466 /* CS8900A on CS3 and CL-PD7610 need nBE1 signal. make sure 467 * memory controller is set correctly. (USB download firmware 468 * doesn't do this right) Also, we use WAIT signal for them. 469 */ 470 ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON, 471 (BWSCON_ST|BWSCON_WS) << BWSCON_BANK_SHIFT(2) | 472 (BWSCON_ST|BWSCON_WS) << BWSCON_BANK_SHIFT(3) | 473 ioreg_read32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON)); 474 /* tweak access timing for CS8900A */ 475 ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BANKCON(3), 476 (0<<BANKCON_TACS_SHIFT)|(1<<BANKCON_TCOS_SHIFT)| 477 (7<<BANKCON_TACC_SHIFT)|(0<<BANKCON_TOCH_SHIFT)| 478 (0<<BANKCON_TCAH_SHIFT)); 479 480 /* 481 * Heads up ... Setup the CPU / MMU / TLB functions 482 */ 483 if (set_cpufuncs()) 484 panic("cpu not recognized!"); 485 486 LEDSTEP(); 487 488 /* 489 * Map I/O registers that are used in startup. Now we are 490 * still using page table prepared by bootloader. Later we'll 491 * map those registers at the same address in the kernel page 492 * table. 493 */ 494 pmap_devmap_bootstrap((vaddr_t)read_ttb(), smdk2410_devmap); 495 496 #undef pdatf 497 #define pdatf (*(volatile uint8_t *)(GPIO_VBASE+GPIO_PFDAT)) 498 499 500 LEDSTEP(); 501 502 /* Disable all peripheral interrupts */ 503 ioreg_write32(INTCTL_VBASE + INTCTL_INTMSK, ~0); 504 505 /* initialize some variables so that splfoo() doesn't 506 touch illegal address. */ 507 s3c2xx0_intr_bootstrap(INTCTL_VBASE); 508 509 consinit(); 510 #ifdef VERBOSE_INIT_ARM 511 printf("consinit done\n"); 512 #endif 513 514 #ifdef KGDB 515 LEDSTEP(); 516 kgdb_port_init(); 517 #endif 518 LEDSTEP(); 519 520 #ifdef VERBOSE_INIT_ARM 521 /* Talk to the user */ 522 printf("\nNetBSD/evbarm (SMDK2410) booting ...\n"); 523 #endif 524 /* 525 * Ok we have the following memory map 526 * 527 * Physical Address Range Description 528 * ----------------------- ---------------------------------- 529 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB) 530 * 0x02000000 - 0x020fffff AMD flash Memory (1MB) 531 * or (depend on DIPSW setting) 532 * 0x00000000 - 0x000fffff AMD flash Memory (1MB) 533 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB) 534 * 535 * 0x30000000 - 0x31ffffff SDRAM (32MB) 536 * 537 * The initarm() has the responsibility for creating the kernel 538 * page tables. 539 * It must also set up various memory pointers that are used 540 * by pmap etc. 541 */ 542 543 /* Fake bootconfig structure for the benefit of pmap.c */ 544 /* XXX must make the memory description h/w independent */ 545 bootconfig.dramblocks = 1; 546 bootconfig.dram[0].address = SDRAM_START; 547 bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE; 548 549 /* 550 * Set up the variables that define the availablilty of 551 * physical memory. For now, we're going to set 552 * physical_freestart to 0x08200000 (where the kernel 553 * was loaded), and allocate the memory we need downwards. 554 * If we get too close to the bottom of SDRAM, we 555 * will panic. We will update physical_freestart and 556 * physical_freeend later to reflect what pmap_bootstrap() 557 * wants to see. 558 * 559 * XXX pmap_bootstrap() needs an enema. 560 */ 561 physical_start = bootconfig.dram[0].address; 562 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 563 564 #ifdef DO_MEMORY_DISK 565 #ifdef MEMORY_DISK_ROOT_ROM 566 md_root_start = MEMORY_DISK_ROOT_ADDR; 567 boothowto |= RB_RDONLY; 568 #else 569 /* Reserve physmem for ram disk */ 570 md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1)); 571 printf("Reserve %ld bytes for memory disk\n", 572 physical_end - md_root_start); 573 /* copy fs contents */ 574 memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR, 575 MD_ROOT_SIZE); 576 physical_end = md_root_start; 577 #endif 578 #endif 579 580 physical_freestart = SDRAM_START; /* XXX */ 581 physical_freeend = SDRAM_START + 0x00200000; 582 583 physmem = (physical_end - physical_start) / PAGE_SIZE; 584 585 #ifdef VERBOSE_INIT_ARM 586 /* Tell the user about the memory */ 587 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 588 physical_start, physical_end - 1); 589 #endif 590 591 /* 592 * XXX 593 * Okay, the kernel starts 2MB in from the bottom of physical 594 * memory. We are going to allocate our bootstrap pages downwards 595 * from there. 596 * 597 * We need to allocate some fixed page tables to get the kernel 598 * going. We allocate one page directory and a number of page 599 * tables and store the physical addresses in the kernel_pt_table 600 * array. 601 * 602 * The kernel page directory must be on a 16K boundary. The page 603 * tables must be on 4K boundaries. What we do is allocate the 604 * page directory on the first 16K boundary that we encounter, and 605 * the page tables on 4K boundaries otherwise. Since we allocate 606 * at least 3 L2 page tables, we are guaranteed to encounter at 607 * least one 16K aligned region. 608 */ 609 610 #ifdef VERBOSE_INIT_ARM 611 printf("Allocating page tables\n"); 612 #endif 613 614 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 615 616 #ifdef VERBOSE_INIT_ARM 617 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 618 physical_freestart, free_pages, free_pages); 619 #endif 620 621 /* Define a macro to simplify memory allocation */ 622 #define valloc_pages(var, np) \ 623 alloc_pages((var).pv_pa, (np)); \ 624 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 625 626 #define alloc_pages(var, np) \ 627 physical_freeend -= ((np) * PAGE_SIZE); \ 628 if (physical_freeend < physical_freestart) \ 629 panic("initarm: out of memory"); \ 630 (var) = physical_freeend; \ 631 free_pages -= (np); \ 632 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 633 634 loop1 = 0; 635 kernel_l1pt.pv_pa = 0; 636 kernel_l1pt.pv_va = 0; 637 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 638 /* Are we 16KB aligned for an L1 ? */ 639 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 640 && kernel_l1pt.pv_pa == 0) { 641 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 642 } else { 643 valloc_pages(kernel_pt_table[loop1], 644 L2_TABLE_SIZE / PAGE_SIZE); 645 ++loop1; 646 } 647 } 648 649 /* This should never be able to happen but better confirm that. */ 650 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0) 651 panic("initarm: Failed to align the kernel page directory\n"); 652 653 /* 654 * Allocate a page for the system page mapped to V0x00000000 655 * This page will just contain the system vectors and can be 656 * shared by all processes. 657 */ 658 alloc_pages(systempage.pv_pa, 1); 659 660 /* Allocate stacks for all modes */ 661 valloc_pages(irqstack, IRQ_STACK_SIZE); 662 valloc_pages(abtstack, ABT_STACK_SIZE); 663 valloc_pages(undstack, UND_STACK_SIZE); 664 valloc_pages(kernelstack, UPAGES); 665 666 #ifdef VERBOSE_INIT_ARM 667 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 668 irqstack.pv_va); 669 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 670 abtstack.pv_va); 671 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 672 undstack.pv_va); 673 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 674 kernelstack.pv_va); 675 #endif 676 677 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 678 679 LEDSTEP(); 680 681 /* 682 * Ok we have allocated physical pages for the primary kernel 683 * page tables 684 */ 685 686 #ifdef VERBOSE_INIT_ARM 687 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 688 #endif 689 690 /* 691 * Now we start construction of the L1 page table 692 * We start by mapping the L2 page tables into the L1. 693 * This means that we can replace L1 mappings later on if necessary 694 */ 695 l1pagetable = kernel_l1pt.pv_pa; 696 697 /* Map the L2 pages tables in the L1 page table */ 698 pmap_link_l2pt(l1pagetable, 0x00000000, 699 &kernel_pt_table[KERNEL_PT_SYS]); 700 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 701 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 702 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 703 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 704 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 705 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 706 707 /* update the top of the kernel VM */ 708 pmap_curmaxkvaddr = 709 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 710 711 #ifdef VERBOSE_INIT_ARM 712 printf("Mapping kernel\n"); 713 #endif 714 715 /* Now we fill in the L2 pagetable for the kernel static code/data */ 716 { 717 size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE; 718 size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE; 719 u_int logical; 720 721 textsize = (textsize + PGOFSET) & ~PGOFSET; 722 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 723 724 logical = 0x00200000; /* offset of kernel in RAM */ 725 726 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 727 physical_start + logical, textsize, 728 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 729 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 730 physical_start + logical, totalsize - textsize, 731 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 732 } 733 734 #ifdef VERBOSE_INIT_ARM 735 printf("Constructing L2 page tables\n"); 736 #endif 737 738 /* Map the stack pages */ 739 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 740 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 741 PTE_CACHE); 742 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 743 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 744 PTE_CACHE); 745 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 746 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 747 PTE_CACHE); 748 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 749 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 750 751 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 752 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 753 754 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 755 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 756 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 757 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 758 } 759 760 /* Map the vector page. */ 761 #if 1 762 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 763 * cache-clean code there. */ 764 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 765 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 766 #else 767 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 768 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 769 #endif 770 771 #ifdef MEMORY_DISK_DYNAMIC 772 /* map MD root image */ 773 pmap_map_chunk(l1pagetable, MEMORY_DISK_VADDR, md_root_start, 774 MD_ROOT_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 775 776 md_root_setconf((void *)md_root_start, MD_ROOT_SIZE); 777 #endif /* MEMORY_DISK_DYNAMIC */ 778 /* 779 * map integrated peripherals at same address in l1pagetable 780 * so that we can continue to use console. 781 */ 782 pmap_devmap_bootstrap(l1pagetable, smdk2410_devmap); 783 784 /* 785 * Now we have the real page tables in place so we can switch to them. 786 * Once this is done we will be running with the REAL kernel page 787 * tables. 788 */ 789 790 /* 791 * Update the physical_freestart/physical_freeend/free_pages 792 * variables. 793 */ 794 { 795 physical_freestart = physical_start + 796 (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE); 797 physical_freeend = physical_end; 798 free_pages = 799 (physical_freeend - physical_freestart) / PAGE_SIZE; 800 } 801 802 /* Switch tables */ 803 #ifdef VERBOSE_INIT_ARM 804 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 805 physical_freestart, free_pages, free_pages); 806 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 807 #endif 808 LEDSTEP(); 809 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 810 setttb(kernel_l1pt.pv_pa); 811 cpu_tlb_flushID(); 812 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 813 814 /* 815 * Moved from cpu_startup() as data_abort_handler() references 816 * this during uvm init 817 */ 818 proc0paddr = (struct user *)kernelstack.pv_va; 819 lwp0.l_addr = proc0paddr; 820 821 #ifdef VERBOSE_INIT_ARM 822 printf("done!\n"); 823 #endif 824 825 LEDSTEP(); 826 #ifdef VERBOSE_INIT_ARM 827 printf("bootstrap done.\n"); 828 #endif 829 830 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 831 832 /* 833 * Pages were allocated during the secondary bootstrap for the 834 * stacks for different CPU modes. 835 * We must now set the r13 registers in the different CPU modes to 836 * point to these stacks. 837 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 838 * of the stack memory. 839 */ 840 #ifdef VERBOSE_INIT_ARM 841 printf("init subsystems: stacks "); 842 #endif 843 844 set_stackptr(PSR_IRQ32_MODE, 845 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 846 set_stackptr(PSR_ABT32_MODE, 847 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 848 set_stackptr(PSR_UND32_MODE, 849 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 850 851 LEDSTEP(); 852 853 /* 854 * Well we should set a data abort handler. 855 * Once things get going this will change as we will need a proper 856 * handler. 857 * Until then we will use a handler that just panics but tells us 858 * why. 859 * Initialisation of the vectors will just panic on a data abort. 860 * This just fills in a slightly better one. 861 */ 862 #ifdef VERBOSE_INIT_ARM 863 printf("vectors "); 864 #endif 865 data_abort_handler_address = (u_int)data_abort_handler; 866 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 867 undefined_handler_address = (u_int)undefinedinstruction_bounce; 868 869 /* Initialise the undefined instruction handlers */ 870 #ifdef VERBOSE_INIT_ARM 871 printf("undefined "); 872 #endif 873 undefined_init(); 874 875 LEDSTEP(); 876 877 /* Load memory into UVM. */ 878 #ifdef VERBOSE_INIT_ARM 879 printf("page "); 880 #endif 881 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 882 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 883 atop(physical_freestart), atop(physical_freeend), 884 VM_FREELIST_DEFAULT); 885 886 LEDSTEP(); 887 /* Boot strap pmap telling it where the kernel page table is */ 888 #ifdef VERBOSE_INIT_ARM 889 printf("pmap "); 890 #endif 891 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE, 892 KERNEL_VM_BASE + KERNEL_VM_SIZE); 893 894 LEDSTEP(); 895 896 /* Setup the IRQ system */ 897 #ifdef VERBOSE_INIT_ARM 898 printf("irq "); 899 #endif 900 /* XXX irq_init(); */ 901 902 #ifdef VERBOSE_INIT_ARM 903 printf("done.\n"); 904 #endif 905 906 #ifdef BOOTHOWTO 907 boothowto |= BOOTHOWTO; 908 #endif 909 { 910 uint8_t gpio = ~gpio_read8(GPIO_PFDAT); 911 912 if (gpio & (1<<0)) /* SW1 (EINT0) */ 913 boothowto ^= RB_SINGLE; 914 if (gpio & (1<<2)) /* SW2 (EINT2) */ 915 boothowto ^= RB_KDB; 916 #ifdef VERBOSE_INIT_ARM 917 printf( "sw: %x boothowto: %x\n", gpio, boothowto ); 918 #endif 919 } 920 921 #ifdef IPKDB 922 /* Initialise ipkdb */ 923 ipkdb_init(); 924 if (boothowto & RB_KDB) 925 ipkdb_connect(0); 926 #endif 927 928 #ifdef KGDB 929 if (boothowto & RB_KDB) { 930 kgdb_debug_init = 1; 931 kgdb_connect(1); 932 } 933 #endif 934 935 #if NKSYMS || defined(DDB) || defined(LKM) 936 /* Firmware doesn't load symbols. */ 937 ksyms_init(0, NULL, NULL); 938 #endif 939 940 #ifdef DDB 941 db_machine_init(); 942 if (boothowto & RB_KDB) 943 Debugger(); 944 #endif 945 946 /* We return the new stack pointer address */ 947 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP); 948 } 949 950 void 951 consinit(void) 952 { 953 static int consinit_done = 0; 954 bus_space_tag_t iot = &s3c2xx0_bs_tag; 955 int pclk; 956 957 if (consinit_done != 0) 958 return; 959 960 consinit_done = 1; 961 962 s3c24x0_clock_freq2(CLKMAN_VBASE, NULL, NULL, &pclk); 963 964 #if NSSCOM > 0 965 #ifdef SSCOM0CONSOLE 966 if (0 == s3c2410_sscom_cnattach(iot, 0, comcnspeed, 967 pclk, comcnmode)) 968 return; 969 #endif 970 #ifdef SSCOM1CONSOLE 971 if (0 == s3c2410_sscom_cnattach(iot, 1, comcnspeed, 972 pclk, comcnmode)) 973 return; 974 #endif 975 #endif /* NSSCOM */ 976 #if NCOM>0 && defined(CONCOMADDR) 977 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed, 978 COM_FREQ, COM_TYPE_NORMAL, comcnmode)) 979 panic("can't init serial console @%x", CONCOMADDR); 980 return; 981 #endif 982 983 consinit_done = 0; 984 } 985 986 987 #ifdef KGDB 988 989 #if (NSSCOM > 0) 990 991 #ifdef KGDB_DEVNAME 992 const char kgdb_devname[] = KGDB_DEVNAME; 993 #else 994 const char kgdb_devname[] = ""; 995 #endif 996 997 #ifndef KGDB_DEVMODE 998 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */ 999 #endif 1000 int kgdb_sscom_mode = KGDB_DEVMODE; 1001 1002 #endif /* NSSCOM */ 1003 1004 void 1005 kgdb_port_init(void) 1006 { 1007 #if (NSSCOM > 0) 1008 int unit = -1; 1009 int pclk; 1010 1011 if (strcmp(kgdb_devname, "sscom0") == 0) 1012 unit = 0; 1013 else if (strcmp(kgdb_devname, "sscom1") == 0) 1014 unit = 1; 1015 1016 if (unit >= 0) { 1017 s3c24x0_clock_freq2(CLKMAN_VBASE, NULL, NULL, &pclk); 1018 1019 s3c2410_sscom_kgdb_attach(&s3c2xx0_bs_tag, 1020 unit, kgdb_rate, pclk, kgdb_sscom_mode); 1021 } 1022 #endif 1023 } 1024 #endif 1025 1026 static inline void 1027 writeback_dcache_line(vaddr_t va) 1028 { 1029 /* writeback Dcache line */ 1030 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9 1031 * assume write-through cache, and always flush Dcache instead of 1032 * cleaning it. Since Boot loader maps page table with write-back 1033 * cached, we really need to clean Dcache. */ 1034 __asm("mcr p15, 0, %0, c7, c10, 1" 1035 : : "r"(va)); 1036 } 1037 1038 static inline void 1039 clean_dcache_line(vaddr_t va) 1040 { 1041 /* writeback and invalidate Dcache line */ 1042 __asm("mcr p15, 0, %0, c7, c14, 1" 1043 : : "r"(va)); 1044 } 1045 1046 static struct arm32_dma_range smdk2410_dma_ranges[1]; 1047 1048 bus_dma_tag_t 1049 s3c2xx0_bus_dma_init(struct arm32_bus_dma_tag *dma_tag_template) 1050 { 1051 extern paddr_t physical_start, physical_end; 1052 struct arm32_bus_dma_tag *dmat; 1053 1054 smdk2410_dma_ranges[0].dr_sysbase = physical_start; 1055 smdk2410_dma_ranges[0].dr_busbase = physical_start; 1056 smdk2410_dma_ranges[0].dr_len = physical_end - physical_start; 1057 1058 #if 1 1059 dmat = dma_tag_template; 1060 #else 1061 dmat = malloc(sizeof *dmat, M_DEVBUF, M_NOWAIT); 1062 if (dmat == NULL) 1063 return NULL; 1064 *dmat = *dma_tag_template; 1065 #endif 1066 1067 dmat->_ranges = smdk2410_dma_ranges; 1068 dmat->_nranges = 1; 1069 1070 return dmat; 1071 } 1072
Indexes created Mon Oct 20 20:10:13 GMT 2025