smdk2410_machdep.c revision 1.19 1 /* $NetBSD: smdk2410_machdep.c,v 1.19 2008/11/11 06:46:41 dyoung Exp $ */
2
3 /*
4 * Copyright (c) 2002, 2003 Fujitsu Component Limited
5 * Copyright (c) 2002, 2003, 2005 Genetec Corporation
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of The Fujitsu Component Limited nor the name of
17 * Genetec corporation may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34 /*
35 * Copyright (c) 2001,2002 ARM Ltd
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
46 * 3. The name of the company may not be used to endorse or promote
47 * products derived from this software without specific prior written
48 * permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND
51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
52 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
53 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD
54 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
60 * POSSIBILITY OF SUCH DAMAGE.
61 *
62 */
63
64 /*
65 * Copyright (c) 1997,1998 Mark Brinicombe.
66 * Copyright (c) 1997,1998 Causality Limited.
67 * All rights reserved.
68 *
69 * Redistribution and use in source and binary forms, with or without
70 * modification, are permitted provided that the following conditions
71 * are met:
72 * 1. Redistributions of source code must retain the above copyright
73 * notice, this list of conditions and the following disclaimer.
74 * 2. Redistributions in binary form must reproduce the above copyright
75 * notice, this list of conditions and the following disclaimer in the
76 * documentation and/or other materials provided with the distribution.
77 * 3. All advertising materials mentioning features or use of this software
78 * must display the following acknowledgement:
79 * This product includes software developed by Mark Brinicombe
80 * for the NetBSD Project.
81 * 4. The name of the company nor the name of the author may be used to
82 * endorse or promote products derived from this software without specific
83 * prior written permission.
84 *
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
86 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
87 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
88 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
89 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
90 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
91 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
95 * SUCH DAMAGE.
96 *
97 * Machine dependant functions for kernel setup for integrator board
98 *
99 * Created : 24/11/97
100 */
101
102 /*
103 * Machine dependant functions for kernel setup for Samsung SMDK2410
104 * derived from integrator_machdep.c
105 */
106
107 #include <sys/cdefs.h>
108 __KERNEL_RCSID(0, "$NetBSD: smdk2410_machdep.c,v 1.19 2008/11/11 06:46:41 dyoung Exp $");
109
110 #include "opt_ddb.h"
111 #include "opt_kgdb.h"
112 #include "opt_pmap_debug.h"
113 #include "opt_md.h"
114
115 #include <sys/param.h>
116 #include <sys/device.h>
117 #include <sys/systm.h>
118 #include <sys/kernel.h>
119 #include <sys/exec.h>
120 #include <sys/proc.h>
121 #include <sys/msgbuf.h>
122 #include <sys/reboot.h>
123 #include <sys/termios.h>
124 #include <sys/ksyms.h>
125
126 #include <uvm/uvm_extern.h>
127
128 #include <dev/cons.h>
129 #include <dev/md.h>
130
131 #include <machine/db_machdep.h>
132 #include <ddb/db_sym.h>
133 #include <ddb/db_extern.h>
134 #ifdef KGDB
135 #include <sys/kgdb.h>
136 #endif
137
138 #include <machine/bootconfig.h>
139 #include <machine/bus.h>
140 #include <machine/cpu.h>
141 #include <machine/frame.h>
142 #include <machine/intr.h>
143 #include <arm/undefined.h>
144
145 #include <arm/arm32/machdep.h>
146
147 #include <arm/s3c2xx0/s3c2410reg.h>
148 #include <arm/s3c2xx0/s3c2410var.h>
149
150 #include "ksyms.h"
151
152 #ifndef SDRAM_START
153 #define SDRAM_START S3C2410_SDRAM_START
154 #endif
155 #ifndef SDRAM_SIZE
156 #define SDRAM_SIZE (32*1024*1024)
157 #endif
158
159 /*
160 * Address to map I/O registers in early initialize stage.
161 */
162 #define SMDK2410_IO_VBASE 0xfd000000
163
164 /* Kernel text starts 2MB in from the bottom of the kernel address space. */
165 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
166 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
167
168 /*
169 * The range 0xc1000000 - 0xccffffff is available for kernel VM space
170 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
171 */
172 #define KERNEL_VM_SIZE 0x0C000000
173
174 /* Memory disk support */
175 #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR)
176 #define DO_MEMORY_DISK
177 /* We have memory disk image outside of the kernel on ROM. */
178 #ifdef MEMORY_DISK_ROOT_ROM
179 /* map the image directory and use read-only */
180 #else
181 /* copy the image to RAM */
182 #endif
183 #endif
184
185
186 /*
187 * Address to call from cpu_reset() to reset the machine.
188 * This is machine architecture dependant as it varies depending
189 * on where the ROM appears when you turn the MMU off.
190 */
191 u_int cpu_reset_address = (u_int)0;
192
193 /* Define various stack sizes in pages */
194 #define IRQ_STACK_SIZE 1
195 #define ABT_STACK_SIZE 1
196 #define UND_STACK_SIZE 1
197
198 BootConfig bootconfig; /* Boot config storage */
199 char *boot_args = NULL;
200 char *boot_file = NULL;
201
202 vm_offset_t physical_start;
203 vm_offset_t physical_freestart;
204 vm_offset_t physical_freeend;
205 vm_offset_t physical_end;
206 u_int free_pages;
207 vm_offset_t pagetables_start;
208 int physmem = 0;
209
210 /*int debug_flags;*/
211 #ifndef PMAP_STATIC_L1S
212 int max_processes = 64; /* Default number */
213 #endif /* !PMAP_STATIC_L1S */
214
215 /* Physical and virtual addresses for some global pages */
216 pv_addr_t irqstack;
217 pv_addr_t undstack;
218 pv_addr_t abtstack;
219 pv_addr_t kernelstack;
220
221 vm_offset_t msgbufphys;
222
223 extern u_int data_abort_handler_address;
224 extern u_int prefetch_abort_handler_address;
225 extern u_int undefined_handler_address;
226
227 #ifdef PMAP_DEBUG
228 extern int pmap_debug_level;
229 #endif
230
231 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
232 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
233 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */
234
235 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
236
237 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
238 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
239
240 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
241
242 struct user *proc0paddr;
243
244 /* Prototypes */
245
246 void consinit(void);
247 void kgdb_port_init(void);
248
249
250 #include "com.h"
251 #if NCOM > 0
252 #include <dev/ic/comreg.h>
253 #include <dev/ic/comvar.h>
254 #endif
255
256 #include "sscom.h"
257 #if NSSCOM > 0
258 #include "opt_sscom.h"
259 #include <arm/s3c2xx0/sscom_var.h>
260 #endif
261
262 /*
263 * Define the default console speed for the board. This is generally
264 * what the firmware provided with the board defaults to.
265 */
266 #ifndef CONSPEED
267 #define CONSPEED B115200 /* TTYDEF_SPEED */
268 #endif
269 #ifndef CONMODE
270 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
271 #endif
272
273 int comcnspeed = CONSPEED;
274 int comcnmode = CONMODE;
275
276
277 /*
278 * void cpu_reboot(int howto, char *bootstr)
279 *
280 * Reboots the system
281 *
282 * Deal with any syncing, unmounting, dumping and shutdown hooks,
283 * then reset the CPU.
284 */
285 void
286 cpu_reboot(int howto, char *bootstr)
287 {
288 #ifdef DIAGNOSTIC
289 /* info */
290 printf("boot: howto=%08x curproc=%p\n", howto, curproc);
291 #endif
292
293 cpu_reset_address = vtophys((u_int)s3c2410_softreset);
294
295 /*
296 * If we are still cold then hit the air brakes
297 * and crash to earth fast
298 */
299 if (cold) {
300 doshutdownhooks();
301 pmf_system_shutdown(boothowto);
302 printf("The operating system has halted.\n");
303 printf("Please press any key to reboot.\n\n");
304 cngetc();
305 printf("rebooting...\n");
306 cpu_reset();
307 /* NOTREACHED */
308 }
309 /* Disable console buffering */
310
311 /*
312 * If RB_NOSYNC was not specified sync the discs.
313 * Note: Unless cold is set to 1 here, syslogd will die during the
314 * unmount. It looks like syslogd is getting woken up only to find
315 * that it cannot page part of the binary in as the filesystem has
316 * been unmounted.
317 */
318 if (!(howto & RB_NOSYNC))
319 bootsync();
320
321 /* Say NO to interrupts */
322 splhigh();
323
324 /* Do a dump if requested. */
325 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
326 dumpsys();
327
328 /* Run any shutdown hooks */
329 doshutdownhooks();
330
331 pmf_system_shutdown(boothowto);
332
333 /* Make sure IRQ's are disabled */
334 IRQdisable;
335
336 if (howto & RB_HALT) {
337 printf("The operating system has halted.\n");
338 printf("Please press any key to reboot.\n\n");
339 cngetc();
340 }
341 printf("rebooting...\n");
342 cpu_reset();
343 /* NOTREACHED */
344 }
345
346 /*
347 * Static device mappings. These peripheral registers are mapped at
348 * fixed virtual addresses very early in initarm() so that we can use
349 * them while booting the kernel , and stay at the same address
350 * throughout whole kernel's life time.
351 *
352 * We use this table twice; once with bootstrap page table, and once
353 * with kernel's page table which we build up in initarm().
354 *
355 * Since we map these registers into the bootstrap page table using
356 * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
357 * registers segment-aligned and segment-rounded in order to avoid
358 * using the 2nd page tables.
359 */
360
361 #define _A(a) ((a) & ~L1_S_OFFSET)
362 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
363
364 #define _V(n) (SMDK2410_IO_VBASE + (n) * L1_S_SIZE)
365
366 #define GPIO_VBASE _V(0)
367 #define INTCTL_VBASE _V(1)
368 #define CLKMAN_VBASE _V(2)
369 #define UART_VBASE _V(3)
370 #ifdef MEMORY_DISK_DYNAMIC
371 #define MEMORY_DISK_VADDR _V(4)
372 #endif
373
374 static const struct pmap_devmap smdk2410_devmap[] = {
375 /* GPIO registers */
376 {
377 GPIO_VBASE,
378 _A(S3C2410_GPIO_BASE),
379 _S(S3C2410_GPIO_SIZE),
380 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
381 },
382 {
383 INTCTL_VBASE,
384 _A(S3C2410_INTCTL_BASE),
385 _S(S3C2410_INTCTL_SIZE),
386 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
387 },
388 {
389 CLKMAN_VBASE,
390 _A(S3C2410_CLKMAN_BASE),
391 _S(S3C24X0_CLKMAN_SIZE),
392 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
393 },
394 { /* UART registers for UART0, 1, 2. */
395 UART_VBASE,
396 _A(S3C2410_UART0_BASE),
397 _S(S3C2410_UART_BASE(3) - S3C2410_UART0_BASE),
398 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
399 },
400
401 { 0, 0, 0, 0 }
402 };
403
404 #undef _A
405 #undef _S
406
407 static inline pd_entry_t *
408 read_ttb(void)
409 {
410 long ttb;
411
412 __asm volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb));
413
414
415 return (pd_entry_t *)(ttb & ~((1 << 14) - 1));
416 }
417
418
419 #define ioreg_read8(a) (*(volatile uint8_t *)(a))
420 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v))
421 #define ioreg_read32(a) (*(volatile uint32_t *)(a))
422 #define ioreg_write32(a,v) (*(volatile uint32_t *)(a)=(v))
423
424 /*
425 * u_int initarm(...)
426 *
427 * Initial entry point on startup. This gets called before main() is
428 * entered.
429 * It should be responsible for setting up everything that must be
430 * in place when main is called.
431 * This includes
432 * Taking a copy of the boot configuration structure.
433 * Initialising the physical console so characters can be printed.
434 * Setting up page tables for the kernel
435 * Relocating the kernel to the bottom of physical memory
436 */
437
438 u_int
439 initarm(void *arg)
440 {
441 int loop;
442 int loop1;
443 u_int l1pagetable;
444 extern int etext __asm("_etext");
445 extern int end __asm("_end");
446 int progress_counter = 0;
447
448 #ifdef DO_MEMORY_DISK
449 vm_offset_t md_root_start;
450 #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE)
451 #endif
452
453 #define gpio_read8(reg) ioreg_read8(GPIO_VBASE + (reg))
454
455 #define LEDSTEP() __LED(progress_counter++)
456
457 #define pdatf (*(volatile uint8_t *)(S3C2410_GPIO_BASE+GPIO_PFDAT))
458 #define __LED(x) (pdatf = (pdatf & ~0xf0) | (~(x) & 0xf0))
459
460 LEDSTEP();
461
462 /* CS8900A on CS3 and CL-PD7610 need nBE1 signal. make sure
463 * memory controller is set correctly. (USB download firmware
464 * doesn't do this right) Also, we use WAIT signal for them.
465 */
466 ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON,
467 (BWSCON_ST|BWSCON_WS) << BWSCON_BANK_SHIFT(2) |
468 (BWSCON_ST|BWSCON_WS) << BWSCON_BANK_SHIFT(3) |
469 ioreg_read32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON));
470 /* tweak access timing for CS8900A */
471 ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BANKCON(3),
472 (0<<BANKCON_TACS_SHIFT)|(1<<BANKCON_TCOS_SHIFT)|
473 (7<<BANKCON_TACC_SHIFT)|(0<<BANKCON_TOCH_SHIFT)|
474 (0<<BANKCON_TCAH_SHIFT));
475
476 /*
477 * Heads up ... Setup the CPU / MMU / TLB functions
478 */
479 if (set_cpufuncs())
480 panic("cpu not recognized!");
481
482 LEDSTEP();
483
484 /*
485 * Map I/O registers that are used in startup. Now we are
486 * still using page table prepared by bootloader. Later we'll
487 * map those registers at the same address in the kernel page
488 * table.
489 */
490 pmap_devmap_bootstrap((vaddr_t)read_ttb(), smdk2410_devmap);
491
492 #undef pdatf
493 #define pdatf (*(volatile uint8_t *)(GPIO_VBASE+GPIO_PFDAT))
494
495
496 LEDSTEP();
497
498 /* Disable all peripheral interrupts */
499 ioreg_write32(INTCTL_VBASE + INTCTL_INTMSK, ~0);
500
501 /* initialize some variables so that splfoo() doesn't
502 touch illegal address. */
503 s3c2xx0_intr_bootstrap(INTCTL_VBASE);
504
505 consinit();
506 #ifdef VERBOSE_INIT_ARM
507 printf("consinit done\n");
508 #endif
509
510 #ifdef KGDB
511 LEDSTEP();
512 kgdb_port_init();
513 #endif
514 LEDSTEP();
515
516 #ifdef VERBOSE_INIT_ARM
517 /* Talk to the user */
518 printf("\nNetBSD/evbarm (SMDK2410) booting ...\n");
519 #endif
520 /*
521 * Ok we have the following memory map
522 *
523 * Physical Address Range Description
524 * ----------------------- ----------------------------------
525 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB)
526 * 0x02000000 - 0x020fffff AMD flash Memory (1MB)
527 * or (depend on DIPSW setting)
528 * 0x00000000 - 0x000fffff AMD flash Memory (1MB)
529 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB)
530 *
531 * 0x30000000 - 0x31ffffff SDRAM (32MB)
532 *
533 * The initarm() has the responsibility for creating the kernel
534 * page tables.
535 * It must also set up various memory pointers that are used
536 * by pmap etc.
537 */
538
539 /* Fake bootconfig structure for the benefit of pmap.c */
540 /* XXX must make the memory description h/w independent */
541 bootconfig.dramblocks = 1;
542 bootconfig.dram[0].address = SDRAM_START;
543 bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE;
544
545 /*
546 * Set up the variables that define the availablilty of
547 * physical memory. For now, we're going to set
548 * physical_freestart to 0x08200000 (where the kernel
549 * was loaded), and allocate the memory we need downwards.
550 * If we get too close to the bottom of SDRAM, we
551 * will panic. We will update physical_freestart and
552 * physical_freeend later to reflect what pmap_bootstrap()
553 * wants to see.
554 *
555 * XXX pmap_bootstrap() needs an enema.
556 */
557 physical_start = bootconfig.dram[0].address;
558 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
559
560 #ifdef DO_MEMORY_DISK
561 #ifdef MEMORY_DISK_ROOT_ROM
562 md_root_start = MEMORY_DISK_ROOT_ADDR;
563 boothowto |= RB_RDONLY;
564 #else
565 /* Reserve physmem for ram disk */
566 md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1));
567 printf("Reserve %ld bytes for memory disk\n",
568 physical_end - md_root_start);
569 /* copy fs contents */
570 memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR,
571 MD_ROOT_SIZE);
572 physical_end = md_root_start;
573 #endif
574 #endif
575
576 physical_freestart = SDRAM_START; /* XXX */
577 physical_freeend = SDRAM_START + 0x00200000;
578
579 physmem = (physical_end - physical_start) / PAGE_SIZE;
580
581 #ifdef VERBOSE_INIT_ARM
582 /* Tell the user about the memory */
583 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
584 physical_start, physical_end - 1);
585 #endif
586
587 /*
588 * XXX
589 * Okay, the kernel starts 2MB in from the bottom of physical
590 * memory. We are going to allocate our bootstrap pages downwards
591 * from there.
592 *
593 * We need to allocate some fixed page tables to get the kernel
594 * going. We allocate one page directory and a number of page
595 * tables and store the physical addresses in the kernel_pt_table
596 * array.
597 *
598 * The kernel page directory must be on a 16K boundary. The page
599 * tables must be on 4K boundaries. What we do is allocate the
600 * page directory on the first 16K boundary that we encounter, and
601 * the page tables on 4K boundaries otherwise. Since we allocate
602 * at least 3 L2 page tables, we are guaranteed to encounter at
603 * least one 16K aligned region.
604 */
605
606 #ifdef VERBOSE_INIT_ARM
607 printf("Allocating page tables\n");
608 #endif
609
610 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
611
612 #ifdef VERBOSE_INIT_ARM
613 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
614 physical_freestart, free_pages, free_pages);
615 #endif
616
617 /* Define a macro to simplify memory allocation */
618 #define valloc_pages(var, np) \
619 alloc_pages((var).pv_pa, (np)); \
620 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
621
622 #define alloc_pages(var, np) \
623 physical_freeend -= ((np) * PAGE_SIZE); \
624 if (physical_freeend < physical_freestart) \
625 panic("initarm: out of memory"); \
626 (var) = physical_freeend; \
627 free_pages -= (np); \
628 memset((char *)(var), 0, ((np) * PAGE_SIZE));
629
630 loop1 = 0;
631 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
632 /* Are we 16KB aligned for an L1 ? */
633 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
634 && kernel_l1pt.pv_pa == 0) {
635 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
636 } else {
637 valloc_pages(kernel_pt_table[loop1],
638 L2_TABLE_SIZE / PAGE_SIZE);
639 ++loop1;
640 }
641 }
642
643 /* This should never be able to happen but better confirm that. */
644 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0)
645 panic("initarm: Failed to align the kernel page directory\n");
646
647 /*
648 * Allocate a page for the system page mapped to V0x00000000
649 * This page will just contain the system vectors and can be
650 * shared by all processes.
651 */
652 alloc_pages(systempage.pv_pa, 1);
653
654 /* Allocate stacks for all modes */
655 valloc_pages(irqstack, IRQ_STACK_SIZE);
656 valloc_pages(abtstack, ABT_STACK_SIZE);
657 valloc_pages(undstack, UND_STACK_SIZE);
658 valloc_pages(kernelstack, UPAGES);
659
660 #ifdef VERBOSE_INIT_ARM
661 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
662 irqstack.pv_va);
663 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
664 abtstack.pv_va);
665 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
666 undstack.pv_va);
667 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
668 kernelstack.pv_va);
669 #endif
670
671 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
672
673 LEDSTEP();
674
675 /*
676 * Ok we have allocated physical pages for the primary kernel
677 * page tables
678 */
679
680 #ifdef VERBOSE_INIT_ARM
681 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
682 #endif
683
684 /*
685 * Now we start construction of the L1 page table
686 * We start by mapping the L2 page tables into the L1.
687 * This means that we can replace L1 mappings later on if necessary
688 */
689 l1pagetable = kernel_l1pt.pv_pa;
690
691 /* Map the L2 pages tables in the L1 page table */
692 pmap_link_l2pt(l1pagetable, 0x00000000,
693 &kernel_pt_table[KERNEL_PT_SYS]);
694 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
695 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
696 &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
697 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
698 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
699 &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
700
701 /* update the top of the kernel VM */
702 pmap_curmaxkvaddr =
703 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
704
705 #ifdef VERBOSE_INIT_ARM
706 printf("Mapping kernel\n");
707 #endif
708
709 /* Now we fill in the L2 pagetable for the kernel static code/data */
710 {
711 size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE;
712 size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE;
713 u_int logical;
714
715 textsize = (textsize + PGOFSET) & ~PGOFSET;
716 totalsize = (totalsize + PGOFSET) & ~PGOFSET;
717
718 logical = 0x00200000; /* offset of kernel in RAM */
719
720 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
721 physical_start + logical, textsize,
722 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
723 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
724 physical_start + logical, totalsize - textsize,
725 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
726 }
727
728 #ifdef VERBOSE_INIT_ARM
729 printf("Constructing L2 page tables\n");
730 #endif
731
732 /* Map the stack pages */
733 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
734 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
735 PTE_CACHE);
736 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
737 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
738 PTE_CACHE);
739 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
740 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
741 PTE_CACHE);
742 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
743 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
744
745 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
746 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
747
748 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
749 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
750 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
751 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
752 }
753
754 /* Map the vector page. */
755 #if 1
756 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the
757 * cache-clean code there. */
758 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
759 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
760 #else
761 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
762 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
763 #endif
764
765 #ifdef MEMORY_DISK_DYNAMIC
766 /* map MD root image */
767 pmap_map_chunk(l1pagetable, MEMORY_DISK_VADDR, md_root_start,
768 MD_ROOT_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
769
770 md_root_setconf((void *)md_root_start, MD_ROOT_SIZE);
771 #endif /* MEMORY_DISK_DYNAMIC */
772 /*
773 * map integrated peripherals at same address in l1pagetable
774 * so that we can continue to use console.
775 */
776 pmap_devmap_bootstrap(l1pagetable, smdk2410_devmap);
777
778 /*
779 * Now we have the real page tables in place so we can switch to them.
780 * Once this is done we will be running with the REAL kernel page
781 * tables.
782 */
783
784 /*
785 * Update the physical_freestart/physical_freeend/free_pages
786 * variables.
787 */
788 {
789 physical_freestart = physical_start +
790 (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE);
791 physical_freeend = physical_end;
792 free_pages =
793 (physical_freeend - physical_freestart) / PAGE_SIZE;
794 }
795
796 /* Switch tables */
797 #ifdef VERBOSE_INIT_ARM
798 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
799 physical_freestart, free_pages, free_pages);
800 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
801 #endif
802 LEDSTEP();
803 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
804 setttb(kernel_l1pt.pv_pa);
805 cpu_tlb_flushID();
806 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
807
808 /*
809 * Moved from cpu_startup() as data_abort_handler() references
810 * this during uvm init
811 */
812 proc0paddr = (struct user *)kernelstack.pv_va;
813 lwp0.l_addr = proc0paddr;
814
815 #ifdef VERBOSE_INIT_ARM
816 printf("done!\n");
817 #endif
818
819 LEDSTEP();
820 #ifdef VERBOSE_INIT_ARM
821 printf("bootstrap done.\n");
822 #endif
823
824 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
825
826 /*
827 * Pages were allocated during the secondary bootstrap for the
828 * stacks for different CPU modes.
829 * We must now set the r13 registers in the different CPU modes to
830 * point to these stacks.
831 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
832 * of the stack memory.
833 */
834 #ifdef VERBOSE_INIT_ARM
835 printf("init subsystems: stacks ");
836 #endif
837
838 set_stackptr(PSR_IRQ32_MODE,
839 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
840 set_stackptr(PSR_ABT32_MODE,
841 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
842 set_stackptr(PSR_UND32_MODE,
843 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
844
845 LEDSTEP();
846
847 /*
848 * Well we should set a data abort handler.
849 * Once things get going this will change as we will need a proper
850 * handler.
851 * Until then we will use a handler that just panics but tells us
852 * why.
853 * Initialisation of the vectors will just panic on a data abort.
854 * This just fills in a slightly better one.
855 */
856 #ifdef VERBOSE_INIT_ARM
857 printf("vectors ");
858 #endif
859 data_abort_handler_address = (u_int)data_abort_handler;
860 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
861 undefined_handler_address = (u_int)undefinedinstruction_bounce;
862
863 /* Initialise the undefined instruction handlers */
864 #ifdef VERBOSE_INIT_ARM
865 printf("undefined ");
866 #endif
867 undefined_init();
868
869 LEDSTEP();
870
871 /* Load memory into UVM. */
872 #ifdef VERBOSE_INIT_ARM
873 printf("page ");
874 #endif
875 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
876 uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
877 atop(physical_freestart), atop(physical_freeend),
878 VM_FREELIST_DEFAULT);
879
880 LEDSTEP();
881 /* Boot strap pmap telling it where the kernel page table is */
882 #ifdef VERBOSE_INIT_ARM
883 printf("pmap ");
884 #endif
885 pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
886
887 LEDSTEP();
888
889 /* Setup the IRQ system */
890 #ifdef VERBOSE_INIT_ARM
891 printf("irq ");
892 #endif
893 /* XXX irq_init(); */
894
895 #ifdef VERBOSE_INIT_ARM
896 printf("done.\n");
897 #endif
898
899 #ifdef BOOTHOWTO
900 boothowto |= BOOTHOWTO;
901 #endif
902 {
903 uint8_t gpio = ~gpio_read8(GPIO_PFDAT);
904
905 if (gpio & (1<<0)) /* SW1 (EINT0) */
906 boothowto ^= RB_SINGLE;
907 if (gpio & (1<<2)) /* SW2 (EINT2) */
908 boothowto ^= RB_KDB;
909 #ifdef VERBOSE_INIT_ARM
910 printf( "sw: %x boothowto: %x\n", gpio, boothowto );
911 #endif
912 }
913
914 #ifdef KGDB
915 if (boothowto & RB_KDB) {
916 kgdb_debug_init = 1;
917 kgdb_connect(1);
918 }
919 #endif
920
921 #if NKSYMS || defined(DDB) || defined(LKM)
922 /* Firmware doesn't load symbols. */
923 ksyms_init(0, NULL, NULL);
924 #endif
925
926 #ifdef DDB
927 db_machine_init();
928 if (boothowto & RB_KDB)
929 Debugger();
930 #endif
931
932 /* We return the new stack pointer address */
933 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP);
934 }
935
936 void
937 consinit(void)
938 {
939 static int consinit_done = 0;
940 bus_space_tag_t iot = &s3c2xx0_bs_tag;
941 int pclk;
942
943 if (consinit_done != 0)
944 return;
945
946 consinit_done = 1;
947
948 s3c24x0_clock_freq2(CLKMAN_VBASE, NULL, NULL, &pclk);
949
950 #if NSSCOM > 0
951 #ifdef SSCOM0CONSOLE
952 if (0 == s3c2410_sscom_cnattach(iot, 0, comcnspeed,
953 pclk, comcnmode))
954 return;
955 #endif
956 #ifdef SSCOM1CONSOLE
957 if (0 == s3c2410_sscom_cnattach(iot, 1, comcnspeed,
958 pclk, comcnmode))
959 return;
960 #endif
961 #endif /* NSSCOM */
962 #if NCOM>0 && defined(CONCOMADDR)
963 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed,
964 COM_FREQ, COM_TYPE_NORMAL, comcnmode))
965 panic("can't init serial console @%x", CONCOMADDR);
966 return;
967 #endif
968
969 consinit_done = 0;
970 }
971
972
973 #ifdef KGDB
974
975 #if (NSSCOM > 0)
976
977 #ifdef KGDB_DEVNAME
978 const char kgdb_devname[] = KGDB_DEVNAME;
979 #else
980 const char kgdb_devname[] = "";
981 #endif
982
983 #ifndef KGDB_DEVMODE
984 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */
985 #endif
986 int kgdb_sscom_mode = KGDB_DEVMODE;
987
988 #endif /* NSSCOM */
989
990 void
991 kgdb_port_init(void)
992 {
993 #if (NSSCOM > 0)
994 int unit = -1;
995 int pclk;
996
997 if (strcmp(kgdb_devname, "sscom0") == 0)
998 unit = 0;
999 else if (strcmp(kgdb_devname, "sscom1") == 0)
1000 unit = 1;
1001
1002 if (unit >= 0) {
1003 s3c24x0_clock_freq2(CLKMAN_VBASE, NULL, NULL, &pclk);
1004
1005 s3c2410_sscom_kgdb_attach(&s3c2xx0_bs_tag,
1006 unit, kgdb_rate, pclk, kgdb_sscom_mode);
1007 }
1008 #endif
1009 }
1010 #endif
1011
1012 static inline void
1013 writeback_dcache_line(vaddr_t va)
1014 {
1015 /* writeback Dcache line */
1016 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9
1017 * assume write-through cache, and always flush Dcache instead of
1018 * cleaning it. Since Boot loader maps page table with write-back
1019 * cached, we really need to clean Dcache. */
1020 __asm("mcr p15, 0, %0, c7, c10, 1"
1021 : : "r"(va));
1022 }
1023
1024 static inline void
1025 clean_dcache_line(vaddr_t va)
1026 {
1027 /* writeback and invalidate Dcache line */
1028 __asm("mcr p15, 0, %0, c7, c14, 1"
1029 : : "r"(va));
1030 }
1031
1032 static struct arm32_dma_range smdk2410_dma_ranges[1];
1033
1034 bus_dma_tag_t
1035 s3c2xx0_bus_dma_init(struct arm32_bus_dma_tag *dma_tag_template)
1036 {
1037 extern paddr_t physical_start, physical_end;
1038 struct arm32_bus_dma_tag *dmat;
1039
1040 smdk2410_dma_ranges[0].dr_sysbase = physical_start;
1041 smdk2410_dma_ranges[0].dr_busbase = physical_start;
1042 smdk2410_dma_ranges[0].dr_len = physical_end - physical_start;
1043
1044 #if 1
1045 dmat = dma_tag_template;
1046 #else
1047 dmat = malloc(sizeof *dmat, M_DEVBUF, M_NOWAIT);
1048 if (dmat == NULL)
1049 return NULL;
1050 *dmat = *dma_tag_template;
1051 #endif
1052
1053 dmat->_ranges = smdk2410_dma_ranges;
1054 dmat->_nranges = 1;
1055
1056 return dmat;
1057 }
1058