smdk2410_machdep.c revision 1.25 1 /* $NetBSD: smdk2410_machdep.c,v 1.25 2009/11/27 03:23:07 rmind Exp $ */
2
3 /*
4 * Copyright (c) 2002, 2003 Fujitsu Component Limited
5 * Copyright (c) 2002, 2003, 2005 Genetec Corporation
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of The Fujitsu Component Limited nor the name of
17 * Genetec corporation may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34 /*
35 * Copyright (c) 2001,2002 ARM Ltd
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
46 * 3. The name of the company may not be used to endorse or promote
47 * products derived from this software without specific prior written
48 * permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND
51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
52 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
53 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD
54 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
60 * POSSIBILITY OF SUCH DAMAGE.
61 *
62 */
63
64 /*
65 * Copyright (c) 1997,1998 Mark Brinicombe.
66 * Copyright (c) 1997,1998 Causality Limited.
67 * All rights reserved.
68 *
69 * Redistribution and use in source and binary forms, with or without
70 * modification, are permitted provided that the following conditions
71 * are met:
72 * 1. Redistributions of source code must retain the above copyright
73 * notice, this list of conditions and the following disclaimer.
74 * 2. Redistributions in binary form must reproduce the above copyright
75 * notice, this list of conditions and the following disclaimer in the
76 * documentation and/or other materials provided with the distribution.
77 * 3. All advertising materials mentioning features or use of this software
78 * must display the following acknowledgement:
79 * This product includes software developed by Mark Brinicombe
80 * for the NetBSD Project.
81 * 4. The name of the company nor the name of the author may be used to
82 * endorse or promote products derived from this software without specific
83 * prior written permission.
84 *
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
86 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
87 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
88 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
89 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
90 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
91 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
95 * SUCH DAMAGE.
96 *
97 * Machine dependant functions for kernel setup for integrator board
98 *
99 * Created : 24/11/97
100 */
101
102 /*
103 * Machine dependant functions for kernel setup for Samsung SMDK2410
104 * derived from integrator_machdep.c
105 */
106
107 #include <sys/cdefs.h>
108 __KERNEL_RCSID(0, "$NetBSD: smdk2410_machdep.c,v 1.25 2009/11/27 03:23:07 rmind Exp $");
109
110 #include "opt_ddb.h"
111 #include "opt_kgdb.h"
112 #include "opt_pmap_debug.h"
113 #include "opt_md.h"
114
115 #include <sys/param.h>
116 #include <sys/device.h>
117 #include <sys/systm.h>
118 #include <sys/kernel.h>
119 #include <sys/exec.h>
120 #include <sys/proc.h>
121 #include <sys/msgbuf.h>
122 #include <sys/reboot.h>
123 #include <sys/termios.h>
124 #include <sys/ksyms.h>
125
126 #include <uvm/uvm_extern.h>
127
128 #include <dev/cons.h>
129 #include <dev/md.h>
130
131 #include <machine/db_machdep.h>
132 #include <ddb/db_sym.h>
133 #include <ddb/db_extern.h>
134 #ifdef KGDB
135 #include <sys/kgdb.h>
136 #endif
137
138 #include <machine/bootconfig.h>
139 #include <machine/bus.h>
140 #include <machine/cpu.h>
141 #include <machine/frame.h>
142 #include <machine/intr.h>
143 #include <arm/undefined.h>
144
145 #include <arm/arm32/machdep.h>
146
147 #include <arm/s3c2xx0/s3c2410reg.h>
148 #include <arm/s3c2xx0/s3c2410var.h>
149
150 #include "ksyms.h"
151
152 #ifndef SDRAM_START
153 #define SDRAM_START S3C2410_SDRAM_START
154 #endif
155 #ifndef SDRAM_SIZE
156 #define SDRAM_SIZE (32*1024*1024)
157 #endif
158
159 /*
160 * Address to map I/O registers in early initialize stage.
161 */
162 #define SMDK2410_IO_VBASE 0xfd000000
163
164 /* Kernel text starts 2MB in from the bottom of the kernel address space. */
165 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
166 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
167
168 /*
169 * The range 0xc1000000 - 0xccffffff is available for kernel VM space
170 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
171 */
172 #define KERNEL_VM_SIZE 0x0C000000
173
174 /* Memory disk support */
175 #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR)
176 #define DO_MEMORY_DISK
177 /* We have memory disk image outside of the kernel on ROM. */
178 #ifdef MEMORY_DISK_ROOT_ROM
179 /* map the image directory and use read-only */
180 #else
181 /* copy the image to RAM */
182 #endif
183 #endif
184
185
186 /*
187 * Address to call from cpu_reset() to reset the machine.
188 * This is machine architecture dependant as it varies depending
189 * on where the ROM appears when you turn the MMU off.
190 */
191 u_int cpu_reset_address = (u_int)0;
192
193 /* Define various stack sizes in pages */
194 #define IRQ_STACK_SIZE 1
195 #define ABT_STACK_SIZE 1
196 #define UND_STACK_SIZE 1
197
198 BootConfig bootconfig; /* Boot config storage */
199 char *boot_args = NULL;
200 char *boot_file = NULL;
201
202 vm_offset_t physical_start;
203 vm_offset_t physical_freestart;
204 vm_offset_t physical_freeend;
205 vm_offset_t physical_end;
206 u_int free_pages;
207 vm_offset_t pagetables_start;
208
209 /*int debug_flags;*/
210 #ifndef PMAP_STATIC_L1S
211 int max_processes = 64; /* Default number */
212 #endif /* !PMAP_STATIC_L1S */
213
214 /* Physical and virtual addresses for some global pages */
215 pv_addr_t irqstack;
216 pv_addr_t undstack;
217 pv_addr_t abtstack;
218 pv_addr_t kernelstack;
219
220 vm_offset_t msgbufphys;
221
222 extern u_int data_abort_handler_address;
223 extern u_int prefetch_abort_handler_address;
224 extern u_int undefined_handler_address;
225
226 #ifdef PMAP_DEBUG
227 extern int pmap_debug_level;
228 #endif
229
230 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
231 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
232 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */
233
234 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
235
236 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
237 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
238
239 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
240
241 /* Prototypes */
242
243 void consinit(void);
244 void kgdb_port_init(void);
245
246
247 #include "com.h"
248 #if NCOM > 0
249 #include <dev/ic/comreg.h>
250 #include <dev/ic/comvar.h>
251 #endif
252
253 #include "sscom.h"
254 #if NSSCOM > 0
255 #include "opt_sscom.h"
256 #include <arm/s3c2xx0/sscom_var.h>
257 #endif
258
259 /*
260 * Define the default console speed for the board. This is generally
261 * what the firmware provided with the board defaults to.
262 */
263 #ifndef CONSPEED
264 #define CONSPEED B115200 /* TTYDEF_SPEED */
265 #endif
266 #ifndef CONMODE
267 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
268 #endif
269
270 int comcnspeed = CONSPEED;
271 int comcnmode = CONMODE;
272
273
274 /*
275 * void cpu_reboot(int howto, char *bootstr)
276 *
277 * Reboots the system
278 *
279 * Deal with any syncing, unmounting, dumping and shutdown hooks,
280 * then reset the CPU.
281 */
282 void
283 cpu_reboot(int howto, char *bootstr)
284 {
285 #ifdef DIAGNOSTIC
286 /* info */
287 printf("boot: howto=%08x curproc=%p\n", howto, curproc);
288 #endif
289
290 cpu_reset_address = vtophys((u_int)s3c2410_softreset);
291
292 /*
293 * If we are still cold then hit the air brakes
294 * and crash to earth fast
295 */
296 if (cold) {
297 doshutdownhooks();
298 pmf_system_shutdown(boothowto);
299 printf("The operating system has halted.\n");
300 printf("Please press any key to reboot.\n\n");
301 cngetc();
302 printf("rebooting...\n");
303 cpu_reset();
304 /* NOTREACHED */
305 }
306 /* Disable console buffering */
307
308 /*
309 * If RB_NOSYNC was not specified sync the discs.
310 * Note: Unless cold is set to 1 here, syslogd will die during the
311 * unmount. It looks like syslogd is getting woken up only to find
312 * that it cannot page part of the binary in as the filesystem has
313 * been unmounted.
314 */
315 if (!(howto & RB_NOSYNC))
316 bootsync();
317
318 /* Say NO to interrupts */
319 splhigh();
320
321 /* Do a dump if requested. */
322 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
323 dumpsys();
324
325 /* Run any shutdown hooks */
326 doshutdownhooks();
327
328 pmf_system_shutdown(boothowto);
329
330 /* Make sure IRQ's are disabled */
331 IRQdisable;
332
333 if (howto & RB_HALT) {
334 printf("The operating system has halted.\n");
335 printf("Please press any key to reboot.\n\n");
336 cngetc();
337 }
338 printf("rebooting...\n");
339 cpu_reset();
340 /* NOTREACHED */
341 }
342
343 /*
344 * Static device mappings. These peripheral registers are mapped at
345 * fixed virtual addresses very early in initarm() so that we can use
346 * them while booting the kernel , and stay at the same address
347 * throughout whole kernel's life time.
348 *
349 * We use this table twice; once with bootstrap page table, and once
350 * with kernel's page table which we build up in initarm().
351 *
352 * Since we map these registers into the bootstrap page table using
353 * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
354 * registers segment-aligned and segment-rounded in order to avoid
355 * using the 2nd page tables.
356 */
357
358 #define _A(a) ((a) & ~L1_S_OFFSET)
359 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
360
361 #define _V(n) (SMDK2410_IO_VBASE + (n) * L1_S_SIZE)
362
363 #define GPIO_VBASE _V(0)
364 #define INTCTL_VBASE _V(1)
365 #define CLKMAN_VBASE _V(2)
366 #define UART_VBASE _V(3)
367 #ifdef MEMORY_DISK_DYNAMIC
368 #define MEMORY_DISK_VADDR _V(4)
369 #endif
370
371 static const struct pmap_devmap smdk2410_devmap[] = {
372 /* GPIO registers */
373 {
374 GPIO_VBASE,
375 _A(S3C2410_GPIO_BASE),
376 _S(S3C2410_GPIO_SIZE),
377 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
378 },
379 {
380 INTCTL_VBASE,
381 _A(S3C2410_INTCTL_BASE),
382 _S(S3C2410_INTCTL_SIZE),
383 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
384 },
385 {
386 CLKMAN_VBASE,
387 _A(S3C2410_CLKMAN_BASE),
388 _S(S3C24X0_CLKMAN_SIZE),
389 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
390 },
391 { /* UART registers for UART0, 1, 2. */
392 UART_VBASE,
393 _A(S3C2410_UART0_BASE),
394 _S(S3C2410_UART_BASE(3) - S3C2410_UART0_BASE),
395 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
396 },
397
398 { 0, 0, 0, 0 }
399 };
400
401 #undef _A
402 #undef _S
403
404 static inline pd_entry_t *
405 read_ttb(void)
406 {
407 long ttb;
408
409 __asm volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb));
410
411
412 return (pd_entry_t *)(ttb & ~((1 << 14) - 1));
413 }
414
415
416 #define ioreg_read8(a) (*(volatile uint8_t *)(a))
417 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v))
418 #define ioreg_read32(a) (*(volatile uint32_t *)(a))
419 #define ioreg_write32(a,v) (*(volatile uint32_t *)(a)=(v))
420
421 /*
422 * u_int initarm(...)
423 *
424 * Initial entry point on startup. This gets called before main() is
425 * entered.
426 * It should be responsible for setting up everything that must be
427 * in place when main is called.
428 * This includes
429 * Taking a copy of the boot configuration structure.
430 * Initialising the physical console so characters can be printed.
431 * Setting up page tables for the kernel
432 * Relocating the kernel to the bottom of physical memory
433 */
434
435 u_int
436 initarm(void *arg)
437 {
438 int loop;
439 int loop1;
440 u_int l1pagetable;
441 extern int etext __asm("_etext");
442 extern int end __asm("_end");
443 int progress_counter = 0;
444
445 #ifdef DO_MEMORY_DISK
446 vm_offset_t md_root_start;
447 #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE)
448 #endif
449
450 #define gpio_read8(reg) ioreg_read8(GPIO_VBASE + (reg))
451
452 #define LEDSTEP() __LED(progress_counter++)
453
454 #define pdatf (*(volatile uint8_t *)(S3C2410_GPIO_BASE+GPIO_PFDAT))
455 #define __LED(x) (pdatf = (pdatf & ~0xf0) | (~(x) & 0xf0))
456
457 LEDSTEP();
458
459 /* CS8900A on CS3 and CL-PD7610 need nBE1 signal. make sure
460 * memory controller is set correctly. (USB download firmware
461 * doesn't do this right) Also, we use WAIT signal for them.
462 */
463 ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON,
464 (BWSCON_ST|BWSCON_WS) << BWSCON_BANK_SHIFT(2) |
465 (BWSCON_ST|BWSCON_WS) << BWSCON_BANK_SHIFT(3) |
466 ioreg_read32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON));
467 /* tweak access timing for CS8900A */
468 ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BANKCON(3),
469 (0<<BANKCON_TACS_SHIFT)|(1<<BANKCON_TCOS_SHIFT)|
470 (7<<BANKCON_TACC_SHIFT)|(0<<BANKCON_TOCH_SHIFT)|
471 (0<<BANKCON_TCAH_SHIFT));
472
473 /*
474 * Heads up ... Setup the CPU / MMU / TLB functions
475 */
476 if (set_cpufuncs())
477 panic("cpu not recognized!");
478
479 LEDSTEP();
480
481 /*
482 * Map I/O registers that are used in startup. Now we are
483 * still using page table prepared by bootloader. Later we'll
484 * map those registers at the same address in the kernel page
485 * table.
486 */
487 pmap_devmap_bootstrap((vaddr_t)read_ttb(), smdk2410_devmap);
488
489 #undef pdatf
490 #define pdatf (*(volatile uint8_t *)(GPIO_VBASE+GPIO_PFDAT))
491
492
493 LEDSTEP();
494
495 /* Disable all peripheral interrupts */
496 ioreg_write32(INTCTL_VBASE + INTCTL_INTMSK, ~0);
497
498 /* initialize some variables so that splfoo() doesn't
499 touch illegal address. */
500 s3c2xx0_intr_bootstrap(INTCTL_VBASE);
501
502 consinit();
503 #ifdef VERBOSE_INIT_ARM
504 printf("consinit done\n");
505 #endif
506
507 #ifdef KGDB
508 LEDSTEP();
509 kgdb_port_init();
510 #endif
511 LEDSTEP();
512
513 #ifdef VERBOSE_INIT_ARM
514 /* Talk to the user */
515 printf("\nNetBSD/evbarm (SMDK2410) booting ...\n");
516 #endif
517 /*
518 * Ok we have the following memory map
519 *
520 * Physical Address Range Description
521 * ----------------------- ----------------------------------
522 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB)
523 * 0x02000000 - 0x020fffff AMD flash Memory (1MB)
524 * or (depend on DIPSW setting)
525 * 0x00000000 - 0x000fffff AMD flash Memory (1MB)
526 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB)
527 *
528 * 0x30000000 - 0x31ffffff SDRAM (32MB)
529 *
530 * The initarm() has the responsibility for creating the kernel
531 * page tables.
532 * It must also set up various memory pointers that are used
533 * by pmap etc.
534 */
535
536 /* Fake bootconfig structure for the benefit of pmap.c */
537 /* XXX must make the memory description h/w independent */
538 bootconfig.dramblocks = 1;
539 bootconfig.dram[0].address = SDRAM_START;
540 bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE;
541
542 /*
543 * Set up the variables that define the availablilty of
544 * physical memory. For now, we're going to set
545 * physical_freestart to 0x08200000 (where the kernel
546 * was loaded), and allocate the memory we need downwards.
547 * If we get too close to the bottom of SDRAM, we
548 * will panic. We will update physical_freestart and
549 * physical_freeend later to reflect what pmap_bootstrap()
550 * wants to see.
551 *
552 * XXX pmap_bootstrap() needs an enema.
553 */
554 physical_start = bootconfig.dram[0].address;
555 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
556
557 #ifdef DO_MEMORY_DISK
558 #ifdef MEMORY_DISK_ROOT_ROM
559 md_root_start = MEMORY_DISK_ROOT_ADDR;
560 boothowto |= RB_RDONLY;
561 #else
562 /* Reserve physmem for ram disk */
563 md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1));
564 printf("Reserve %ld bytes for memory disk\n",
565 physical_end - md_root_start);
566 /* copy fs contents */
567 memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR,
568 MD_ROOT_SIZE);
569 physical_end = md_root_start;
570 #endif
571 #endif
572
573 physical_freestart = SDRAM_START; /* XXX */
574 physical_freeend = SDRAM_START + 0x00200000;
575
576 physmem = (physical_end - physical_start) / PAGE_SIZE;
577
578 #ifdef VERBOSE_INIT_ARM
579 /* Tell the user about the memory */
580 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
581 physical_start, physical_end - 1);
582 #endif
583
584 /*
585 * XXX
586 * Okay, the kernel starts 2MB in from the bottom of physical
587 * memory. We are going to allocate our bootstrap pages downwards
588 * from there.
589 *
590 * We need to allocate some fixed page tables to get the kernel
591 * going. We allocate one page directory and a number of page
592 * tables and store the physical addresses in the kernel_pt_table
593 * array.
594 *
595 * The kernel page directory must be on a 16K boundary. The page
596 * tables must be on 4K boundaries. What we do is allocate the
597 * page directory on the first 16K boundary that we encounter, and
598 * the page tables on 4K boundaries otherwise. Since we allocate
599 * at least 3 L2 page tables, we are guaranteed to encounter at
600 * least one 16K aligned region.
601 */
602
603 #ifdef VERBOSE_INIT_ARM
604 printf("Allocating page tables\n");
605 #endif
606
607 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
608
609 #ifdef VERBOSE_INIT_ARM
610 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
611 physical_freestart, free_pages, free_pages);
612 #endif
613
614 /* Define a macro to simplify memory allocation */
615 #define valloc_pages(var, np) \
616 alloc_pages((var).pv_pa, (np)); \
617 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
618
619 #define alloc_pages(var, np) \
620 physical_freeend -= ((np) * PAGE_SIZE); \
621 if (physical_freeend < physical_freestart) \
622 panic("initarm: out of memory"); \
623 (var) = physical_freeend; \
624 free_pages -= (np); \
625 memset((char *)(var), 0, ((np) * PAGE_SIZE));
626
627 loop1 = 0;
628 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
629 /* Are we 16KB aligned for an L1 ? */
630 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
631 && kernel_l1pt.pv_pa == 0) {
632 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
633 } else {
634 valloc_pages(kernel_pt_table[loop1],
635 L2_TABLE_SIZE / PAGE_SIZE);
636 ++loop1;
637 }
638 }
639
640 /* This should never be able to happen but better confirm that. */
641 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0)
642 panic("initarm: Failed to align the kernel page directory\n");
643
644 /*
645 * Allocate a page for the system page mapped to V0x00000000
646 * This page will just contain the system vectors and can be
647 * shared by all processes.
648 */
649 alloc_pages(systempage.pv_pa, 1);
650
651 /* Allocate stacks for all modes */
652 valloc_pages(irqstack, IRQ_STACK_SIZE);
653 valloc_pages(abtstack, ABT_STACK_SIZE);
654 valloc_pages(undstack, UND_STACK_SIZE);
655 valloc_pages(kernelstack, UPAGES);
656
657 #ifdef VERBOSE_INIT_ARM
658 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
659 irqstack.pv_va);
660 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
661 abtstack.pv_va);
662 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
663 undstack.pv_va);
664 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
665 kernelstack.pv_va);
666 #endif
667
668 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
669
670 LEDSTEP();
671
672 /*
673 * Ok we have allocated physical pages for the primary kernel
674 * page tables
675 */
676
677 #ifdef VERBOSE_INIT_ARM
678 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
679 #endif
680
681 /*
682 * Now we start construction of the L1 page table
683 * We start by mapping the L2 page tables into the L1.
684 * This means that we can replace L1 mappings later on if necessary
685 */
686 l1pagetable = kernel_l1pt.pv_pa;
687
688 /* Map the L2 pages tables in the L1 page table */
689 pmap_link_l2pt(l1pagetable, 0x00000000,
690 &kernel_pt_table[KERNEL_PT_SYS]);
691 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
692 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
693 &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
694 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
695 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
696 &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
697
698 /* update the top of the kernel VM */
699 pmap_curmaxkvaddr =
700 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
701
702 #ifdef VERBOSE_INIT_ARM
703 printf("Mapping kernel\n");
704 #endif
705
706 /* Now we fill in the L2 pagetable for the kernel static code/data */
707 {
708 size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE;
709 size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE;
710 u_int logical;
711
712 textsize = (textsize + PGOFSET) & ~PGOFSET;
713 totalsize = (totalsize + PGOFSET) & ~PGOFSET;
714
715 logical = 0x00200000; /* offset of kernel in RAM */
716
717 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
718 physical_start + logical, textsize,
719 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
720 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
721 physical_start + logical, totalsize - textsize,
722 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
723 }
724
725 #ifdef VERBOSE_INIT_ARM
726 printf("Constructing L2 page tables\n");
727 #endif
728
729 /* Map the stack pages */
730 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
731 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
732 PTE_CACHE);
733 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
734 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
735 PTE_CACHE);
736 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
737 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
738 PTE_CACHE);
739 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
740 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
741
742 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
743 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
744
745 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
746 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
747 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
748 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
749 }
750
751 /* Map the vector page. */
752 #if 1
753 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the
754 * cache-clean code there. */
755 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
756 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
757 #else
758 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
759 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
760 #endif
761
762 #ifdef MEMORY_DISK_DYNAMIC
763 /* map MD root image */
764 pmap_map_chunk(l1pagetable, MEMORY_DISK_VADDR, md_root_start,
765 MD_ROOT_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
766
767 md_root_setconf((void *)md_root_start, MD_ROOT_SIZE);
768 #endif /* MEMORY_DISK_DYNAMIC */
769 /*
770 * map integrated peripherals at same address in l1pagetable
771 * so that we can continue to use console.
772 */
773 pmap_devmap_bootstrap(l1pagetable, smdk2410_devmap);
774
775 /*
776 * Now we have the real page tables in place so we can switch to them.
777 * Once this is done we will be running with the REAL kernel page
778 * tables.
779 */
780
781 /*
782 * Update the physical_freestart/physical_freeend/free_pages
783 * variables.
784 */
785 {
786 physical_freestart = physical_start +
787 (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE);
788 physical_freeend = physical_end;
789 free_pages =
790 (physical_freeend - physical_freestart) / PAGE_SIZE;
791 }
792
793 /* Switch tables */
794 #ifdef VERBOSE_INIT_ARM
795 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
796 physical_freestart, free_pages, free_pages);
797 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
798 #endif
799 LEDSTEP();
800 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
801 setttb(kernel_l1pt.pv_pa);
802 cpu_tlb_flushID();
803 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
804
805 /*
806 * Moved from cpu_startup() as data_abort_handler() references
807 * this during uvm init
808 */
809 uvm_lwp_setuarea(&lwp0, kernelstack.pv_va);
810
811 #ifdef VERBOSE_INIT_ARM
812 printf("done!\n");
813 #endif
814
815 LEDSTEP();
816 #ifdef VERBOSE_INIT_ARM
817 printf("bootstrap done.\n");
818 #endif
819
820 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
821
822 /*
823 * Pages were allocated during the secondary bootstrap for the
824 * stacks for different CPU modes.
825 * We must now set the r13 registers in the different CPU modes to
826 * point to these stacks.
827 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
828 * of the stack memory.
829 */
830 #ifdef VERBOSE_INIT_ARM
831 printf("init subsystems: stacks ");
832 #endif
833
834 set_stackptr(PSR_IRQ32_MODE,
835 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
836 set_stackptr(PSR_ABT32_MODE,
837 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
838 set_stackptr(PSR_UND32_MODE,
839 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
840
841 LEDSTEP();
842
843 /*
844 * Well we should set a data abort handler.
845 * Once things get going this will change as we will need a proper
846 * handler.
847 * Until then we will use a handler that just panics but tells us
848 * why.
849 * Initialisation of the vectors will just panic on a data abort.
850 * This just fills in a slightly better one.
851 */
852 #ifdef VERBOSE_INIT_ARM
853 printf("vectors ");
854 #endif
855 data_abort_handler_address = (u_int)data_abort_handler;
856 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
857 undefined_handler_address = (u_int)undefinedinstruction_bounce;
858
859 /* Initialise the undefined instruction handlers */
860 #ifdef VERBOSE_INIT_ARM
861 printf("undefined ");
862 #endif
863 undefined_init();
864
865 LEDSTEP();
866
867 /* Load memory into UVM. */
868 #ifdef VERBOSE_INIT_ARM
869 printf("page ");
870 #endif
871 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
872 uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
873 atop(physical_freestart), atop(physical_freeend),
874 VM_FREELIST_DEFAULT);
875
876 LEDSTEP();
877 /* Boot strap pmap telling it where the kernel page table is */
878 #ifdef VERBOSE_INIT_ARM
879 printf("pmap ");
880 #endif
881 pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
882
883 LEDSTEP();
884
885 /* Setup the IRQ system */
886 #ifdef VERBOSE_INIT_ARM
887 printf("irq ");
888 #endif
889 /* XXX irq_init(); */
890
891 #ifdef VERBOSE_INIT_ARM
892 printf("done.\n");
893 #endif
894
895 #ifdef BOOTHOWTO
896 boothowto |= BOOTHOWTO;
897 #endif
898 {
899 uint8_t gpio = ~gpio_read8(GPIO_PFDAT);
900
901 if (gpio & (1<<0)) /* SW1 (EINT0) */
902 boothowto ^= RB_SINGLE;
903 if (gpio & (1<<2)) /* SW2 (EINT2) */
904 boothowto ^= RB_KDB;
905 #ifdef VERBOSE_INIT_ARM
906 printf( "sw: %x boothowto: %x\n", gpio, boothowto );
907 #endif
908 }
909
910 #ifdef KGDB
911 if (boothowto & RB_KDB) {
912 kgdb_debug_init = 1;
913 kgdb_connect(1);
914 }
915 #endif
916
917 #ifdef DDB
918 db_machine_init();
919 if (boothowto & RB_KDB)
920 Debugger();
921 #endif
922
923 /* We return the new stack pointer address */
924 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP);
925 }
926
927 void
928 consinit(void)
929 {
930 static int consinit_done = 0;
931 bus_space_tag_t iot = &s3c2xx0_bs_tag;
932 int pclk;
933
934 if (consinit_done != 0)
935 return;
936
937 consinit_done = 1;
938
939 s3c24x0_clock_freq2(CLKMAN_VBASE, NULL, NULL, &pclk);
940
941 #if NSSCOM > 0
942 #ifdef SSCOM0CONSOLE
943 if (0 == s3c2410_sscom_cnattach(iot, 0, comcnspeed,
944 pclk, comcnmode))
945 return;
946 #endif
947 #ifdef SSCOM1CONSOLE
948 if (0 == s3c2410_sscom_cnattach(iot, 1, comcnspeed,
949 pclk, comcnmode))
950 return;
951 #endif
952 #endif /* NSSCOM */
953 #if NCOM>0 && defined(CONCOMADDR)
954 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed,
955 COM_FREQ, COM_TYPE_NORMAL, comcnmode))
956 panic("can't init serial console @%x", CONCOMADDR);
957 return;
958 #endif
959
960 consinit_done = 0;
961 }
962
963
964 #ifdef KGDB
965
966 #if (NSSCOM > 0)
967
968 #ifdef KGDB_DEVNAME
969 const char kgdb_devname[] = KGDB_DEVNAME;
970 #else
971 const char kgdb_devname[] = "";
972 #endif
973
974 #ifndef KGDB_DEVMODE
975 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */
976 #endif
977 int kgdb_sscom_mode = KGDB_DEVMODE;
978
979 #endif /* NSSCOM */
980
981 void
982 kgdb_port_init(void)
983 {
984 #if (NSSCOM > 0)
985 int unit = -1;
986 int pclk;
987
988 if (strcmp(kgdb_devname, "sscom0") == 0)
989 unit = 0;
990 else if (strcmp(kgdb_devname, "sscom1") == 0)
991 unit = 1;
992
993 if (unit >= 0) {
994 s3c24x0_clock_freq2(CLKMAN_VBASE, NULL, NULL, &pclk);
995
996 s3c2410_sscom_kgdb_attach(&s3c2xx0_bs_tag,
997 unit, kgdb_rate, pclk, kgdb_sscom_mode);
998 }
999 #endif
1000 }
1001 #endif
1002
1003 static inline void
1004 writeback_dcache_line(vaddr_t va)
1005 {
1006 /* writeback Dcache line */
1007 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9
1008 * assume write-through cache, and always flush Dcache instead of
1009 * cleaning it. Since Boot loader maps page table with write-back
1010 * cached, we really need to clean Dcache. */
1011 __asm("mcr p15, 0, %0, c7, c10, 1"
1012 : : "r"(va));
1013 }
1014
1015 static inline void
1016 clean_dcache_line(vaddr_t va)
1017 {
1018 /* writeback and invalidate Dcache line */
1019 __asm("mcr p15, 0, %0, c7, c14, 1"
1020 : : "r"(va));
1021 }
1022
1023 static struct arm32_dma_range smdk2410_dma_ranges[1];
1024
1025 bus_dma_tag_t
1026 s3c2xx0_bus_dma_init(struct arm32_bus_dma_tag *dma_tag_template)
1027 {
1028 extern paddr_t physical_start, physical_end;
1029 struct arm32_bus_dma_tag *dmat;
1030
1031 smdk2410_dma_ranges[0].dr_sysbase = physical_start;
1032 smdk2410_dma_ranges[0].dr_busbase = physical_start;
1033 smdk2410_dma_ranges[0].dr_len = physical_end - physical_start;
1034
1035 #if 1
1036 dmat = dma_tag_template;
1037 #else
1038 dmat = malloc(sizeof *dmat, M_DEVBUF, M_NOWAIT);
1039 if (dmat == NULL)
1040 return NULL;
1041 *dmat = *dma_tag_template;
1042 #endif
1043
1044 dmat->_ranges = smdk2410_dma_ranges;
1045 dmat->_nranges = 1;
1046
1047 return dmat;
1048 }
1049