smdk2800_machdep.c revision 1.10 1 1.10 thorpej /* $NetBSD: smdk2800_machdep.c,v 1.10 2003/05/17 23:47:01 thorpej Exp $ */
2 1.1 bsh
3 1.1 bsh /*
4 1.1 bsh * Copyright (c) 2002 Fujitsu Component Limited
5 1.1 bsh * Copyright (c) 2002 Genetec Corporation
6 1.1 bsh * All rights reserved.
7 1.1 bsh *
8 1.1 bsh * Redistribution and use in source and binary forms, with or without
9 1.1 bsh * modification, are permitted provided that the following conditions
10 1.1 bsh * are met:
11 1.1 bsh * 1. Redistributions of source code must retain the above copyright
12 1.1 bsh * notice, this list of conditions and the following disclaimer.
13 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 bsh * notice, this list of conditions and the following disclaimer in the
15 1.1 bsh * documentation and/or other materials provided with the distribution.
16 1.1 bsh * 3. Neither the name of The Fujitsu Component Limited nor the name of
17 1.1 bsh * Genetec corporation may not be used to endorse or promote products
18 1.1 bsh * derived from this software without specific prior written permission.
19 1.1 bsh *
20 1.1 bsh * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
21 1.1 bsh * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 1.1 bsh * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 1.1 bsh * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 1.1 bsh * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
25 1.1 bsh * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 1.1 bsh * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 1.1 bsh * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 1.1 bsh * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29 1.1 bsh * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 1.1 bsh * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 1.1 bsh * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 1.1 bsh * SUCH DAMAGE.
33 1.1 bsh */
34 1.1 bsh
35 1.1 bsh /*
36 1.1 bsh * Copyright (c) 2001,2002 ARM Ltd
37 1.1 bsh * All rights reserved.
38 1.1 bsh *
39 1.1 bsh * Redistribution and use in source and binary forms, with or without
40 1.1 bsh * modification, are permitted provided that the following conditions
41 1.1 bsh * are met:
42 1.1 bsh * 1. Redistributions of source code must retain the above copyright
43 1.1 bsh * notice, this list of conditions and the following disclaimer.
44 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
45 1.1 bsh * notice, this list of conditions and the following disclaimer in the
46 1.1 bsh * documentation and/or other materials provided with the distribution.
47 1.1 bsh * 3. The name of the company may not be used to endorse or promote
48 1.1 bsh * products derived from this software without specific prior written
49 1.1 bsh * permission.
50 1.1 bsh *
51 1.1 bsh * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND
52 1.1 bsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
53 1.1 bsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
54 1.1 bsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD
55 1.1 bsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
56 1.1 bsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
57 1.1 bsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
58 1.1 bsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
59 1.1 bsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
60 1.1 bsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
61 1.1 bsh * POSSIBILITY OF SUCH DAMAGE.
62 1.1 bsh *
63 1.1 bsh */
64 1.1 bsh
65 1.1 bsh /*
66 1.1 bsh * Copyright (c) 1997,1998 Mark Brinicombe.
67 1.1 bsh * Copyright (c) 1997,1998 Causality Limited.
68 1.1 bsh * All rights reserved.
69 1.1 bsh *
70 1.1 bsh * Redistribution and use in source and binary forms, with or without
71 1.1 bsh * modification, are permitted provided that the following conditions
72 1.1 bsh * are met:
73 1.1 bsh * 1. Redistributions of source code must retain the above copyright
74 1.1 bsh * notice, this list of conditions and the following disclaimer.
75 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
76 1.1 bsh * notice, this list of conditions and the following disclaimer in the
77 1.1 bsh * documentation and/or other materials provided with the distribution.
78 1.1 bsh * 3. All advertising materials mentioning features or use of this software
79 1.1 bsh * must display the following acknowledgement:
80 1.1 bsh * This product includes software developed by Mark Brinicombe
81 1.1 bsh * for the NetBSD Project.
82 1.1 bsh * 4. The name of the company nor the name of the author may be used to
83 1.1 bsh * endorse or promote products derived from this software without specific
84 1.1 bsh * prior written permission.
85 1.1 bsh *
86 1.1 bsh * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
87 1.1 bsh * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
88 1.1 bsh * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
89 1.1 bsh * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
90 1.1 bsh * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
91 1.1 bsh * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
92 1.1 bsh * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
93 1.1 bsh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
94 1.1 bsh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
95 1.1 bsh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
96 1.1 bsh * SUCH DAMAGE.
97 1.1 bsh *
98 1.1 bsh * Machine dependant functions for kernel setup for integrator board
99 1.1 bsh *
100 1.1 bsh * Created : 24/11/97
101 1.1 bsh */
102 1.1 bsh
103 1.9 bsh /*
104 1.9 bsh * Machine dependant functions for kernel setup for Samsung SMDK2800
105 1.9 bsh * derived from integrator_machdep.c
106 1.9 bsh */
107 1.9 bsh
108 1.1 bsh #include "opt_ddb.h"
109 1.1 bsh #include "opt_kgdb.h"
110 1.1 bsh #include "opt_ipkdb.h"
111 1.1 bsh #include "opt_pmap_debug.h"
112 1.1 bsh #include "opt_md.h"
113 1.1 bsh #include "pci.h"
114 1.1 bsh
115 1.1 bsh #include <sys/param.h>
116 1.1 bsh #include <sys/device.h>
117 1.1 bsh #include <sys/systm.h>
118 1.1 bsh #include <sys/kernel.h>
119 1.1 bsh #include <sys/exec.h>
120 1.1 bsh #include <sys/proc.h>
121 1.1 bsh #include <sys/msgbuf.h>
122 1.1 bsh #include <sys/reboot.h>
123 1.1 bsh #include <sys/termios.h>
124 1.3 ragge #include <sys/ksyms.h>
125 1.1 bsh
126 1.2 thorpej #include <uvm/uvm_extern.h>
127 1.2 thorpej
128 1.1 bsh #include <dev/cons.h>
129 1.1 bsh #include <dev/md.h>
130 1.1 bsh
131 1.1 bsh #include <machine/db_machdep.h>
132 1.1 bsh #include <ddb/db_sym.h>
133 1.1 bsh #include <ddb/db_extern.h>
134 1.1 bsh #ifdef KGDB
135 1.1 bsh #include <sys/kgdb.h>
136 1.1 bsh #endif
137 1.1 bsh
138 1.1 bsh #include <machine/bootconfig.h>
139 1.1 bsh #include <machine/bus.h>
140 1.1 bsh #include <machine/cpu.h>
141 1.1 bsh #include <machine/frame.h>
142 1.1 bsh #include <machine/intr.h>
143 1.1 bsh #include <arm/undefined.h>
144 1.1 bsh
145 1.1 bsh #include <arm/arm32/machdep.h>
146 1.1 bsh
147 1.1 bsh #include <arm/s3c2xx0/s3c2800reg.h>
148 1.1 bsh #include <arm/s3c2xx0/s3c2800var.h>
149 1.1 bsh
150 1.3 ragge #include "ksyms.h"
151 1.3 ragge
152 1.1 bsh #ifndef SDRAM_START
153 1.1 bsh #define SDRAM_START S3C2800_DBANK0_START
154 1.1 bsh #endif
155 1.1 bsh #ifndef SDRAM_SIZE
156 1.1 bsh #define SDRAM_SIZE (32*1024*1024)
157 1.1 bsh #endif
158 1.1 bsh
159 1.1 bsh /*
160 1.1 bsh * Address to map I/O registers in early initialize stage.
161 1.1 bsh */
162 1.1 bsh #define SMDK2800_IO_AREA_VBASE 0xfd000000
163 1.1 bsh #define SMDK2800_VBASE_FREE 0xfd200000
164 1.7 thorpej
165 1.7 thorpej /* Kernel text starts 2MB in from the bottom of the kernel address space. */
166 1.7 thorpej #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
167 1.1 bsh
168 1.9 bsh /* Memory disk support */
169 1.9 bsh #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR)
170 1.9 bsh #define DO_MEMORY_DISK
171 1.9 bsh /* We have memory disk image outside of the kernel on ROM. */
172 1.9 bsh #ifdef MEMORY_DISK_ROOT_ROM
173 1.9 bsh /* map the image directory and use read-only */
174 1.9 bsh #else
175 1.9 bsh /* copy the image to RAM */
176 1.9 bsh #endif
177 1.9 bsh #endif
178 1.9 bsh
179 1.9 bsh
180 1.1 bsh /*
181 1.1 bsh * Address to call from cpu_reset() to reset the machine.
182 1.1 bsh * This is machine architecture dependant as it varies depending
183 1.1 bsh * on where the ROM appears when you turn the MMU off.
184 1.1 bsh */
185 1.1 bsh u_int cpu_reset_address = (u_int)0;
186 1.1 bsh
187 1.1 bsh /* Define various stack sizes in pages */
188 1.1 bsh #define IRQ_STACK_SIZE 1
189 1.1 bsh #define ABT_STACK_SIZE 1
190 1.1 bsh #ifdef IPKDB
191 1.1 bsh #define UND_STACK_SIZE 2
192 1.1 bsh #else
193 1.1 bsh #define UND_STACK_SIZE 1
194 1.1 bsh #endif
195 1.1 bsh
196 1.1 bsh BootConfig bootconfig; /* Boot config storage */
197 1.1 bsh char *boot_args = NULL;
198 1.1 bsh char *boot_file = NULL;
199 1.1 bsh
200 1.1 bsh vm_offset_t physical_start;
201 1.1 bsh vm_offset_t physical_freestart;
202 1.1 bsh vm_offset_t physical_freeend;
203 1.1 bsh vm_offset_t physical_end;
204 1.1 bsh u_int free_pages;
205 1.1 bsh vm_offset_t pagetables_start;
206 1.1 bsh int physmem = 0;
207 1.1 bsh
208 1.1 bsh /*int debug_flags;*/
209 1.1 bsh #ifndef PMAP_STATIC_L1S
210 1.1 bsh int max_processes = 64; /* Default number */
211 1.1 bsh #endif /* !PMAP_STATIC_L1S */
212 1.1 bsh
213 1.1 bsh /* Physical and virtual addresses for some global pages */
214 1.1 bsh pv_addr_t systempage;
215 1.1 bsh pv_addr_t irqstack;
216 1.1 bsh pv_addr_t undstack;
217 1.1 bsh pv_addr_t abtstack;
218 1.1 bsh pv_addr_t kernelstack;
219 1.1 bsh
220 1.1 bsh vm_offset_t msgbufphys;
221 1.1 bsh
222 1.1 bsh extern u_int data_abort_handler_address;
223 1.1 bsh extern u_int prefetch_abort_handler_address;
224 1.1 bsh extern u_int undefined_handler_address;
225 1.1 bsh
226 1.1 bsh #ifdef PMAP_DEBUG
227 1.1 bsh extern int pmap_debug_level;
228 1.1 bsh #endif
229 1.1 bsh
230 1.1 bsh #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
231 1.1 bsh #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
232 1.1 bsh #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */
233 1.1 bsh
234 1.1 bsh #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
235 1.1 bsh
236 1.1 bsh #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
237 1.1 bsh #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
238 1.1 bsh
239 1.1 bsh pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
240 1.1 bsh
241 1.1 bsh struct user *proc0paddr;
242 1.1 bsh
243 1.1 bsh /* Prototypes */
244 1.1 bsh
245 1.1 bsh void consinit(void);
246 1.1 bsh void kgdb_port_init(void);
247 1.1 bsh
248 1.1 bsh static int
249 1.1 bsh bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
250 1.1 bsh int cacheable, bus_space_handle_t * bshp);
251 1.9 bsh static void map_builtin_peripherals(void);
252 1.1 bsh static void copy_io_area_map(pd_entry_t * new_pd);
253 1.1 bsh
254 1.1 bsh /* A load of console goo. */
255 1.1 bsh #include "vga.h"
256 1.1 bsh #if NVGA > 0
257 1.1 bsh #include <dev/ic/mc6845reg.h>
258 1.1 bsh #include <dev/ic/pcdisplayvar.h>
259 1.1 bsh #include <dev/ic/vgareg.h>
260 1.1 bsh #include <dev/ic/vgavar.h>
261 1.1 bsh #endif
262 1.1 bsh
263 1.1 bsh #include "com.h"
264 1.1 bsh #if NCOM > 0
265 1.1 bsh #include <dev/ic/comreg.h>
266 1.1 bsh #include <dev/ic/comvar.h>
267 1.1 bsh #endif
268 1.1 bsh
269 1.1 bsh #include "sscom.h"
270 1.1 bsh #if NSSCOM > 0
271 1.1 bsh #include "opt_sscom.h"
272 1.1 bsh #include <arm/s3c2xx0/sscom_var.h>
273 1.1 bsh #endif
274 1.1 bsh
275 1.1 bsh /*
276 1.1 bsh * Define the default console speed for the board. This is generally
277 1.1 bsh * what the firmware provided with the board defaults to.
278 1.1 bsh */
279 1.1 bsh #ifndef CONSPEED
280 1.1 bsh #define CONSPEED B115200 /* TTYDEF_SPEED */
281 1.1 bsh #endif
282 1.1 bsh #ifndef CONMODE
283 1.1 bsh #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
284 1.1 bsh #endif
285 1.1 bsh
286 1.1 bsh int comcnspeed = CONSPEED;
287 1.1 bsh int comcnmode = CONMODE;
288 1.1 bsh
289 1.1 bsh struct bus_space bootstrap_bs_tag;
290 1.1 bsh
291 1.1 bsh /*
292 1.1 bsh * void cpu_reboot(int howto, char *bootstr)
293 1.1 bsh *
294 1.1 bsh * Reboots the system
295 1.1 bsh *
296 1.1 bsh * Deal with any syncing, unmounting, dumping and shutdown hooks,
297 1.1 bsh * then reset the CPU.
298 1.1 bsh */
299 1.1 bsh void
300 1.1 bsh cpu_reboot(int howto, char *bootstr)
301 1.1 bsh {
302 1.1 bsh
303 1.9 bsh cpu_reset_address = vtophys((u_int)s3c2800_softreset);
304 1.1 bsh
305 1.1 bsh /*
306 1.1 bsh * If we are still cold then hit the air brakes
307 1.1 bsh * and crash to earth fast
308 1.1 bsh */
309 1.1 bsh if (cold) {
310 1.1 bsh doshutdownhooks();
311 1.1 bsh printf("The operating system has halted.\n");
312 1.1 bsh printf("Please press any key to reboot.\n\n");
313 1.1 bsh cngetc();
314 1.1 bsh printf("rebooting...\n");
315 1.1 bsh cpu_reset();
316 1.1 bsh /* NOTREACHED */
317 1.1 bsh }
318 1.1 bsh /* Disable console buffering */
319 1.1 bsh
320 1.1 bsh /*
321 1.1 bsh * If RB_NOSYNC was not specified sync the discs.
322 1.1 bsh * Note: Unless cold is set to 1 here, syslogd will die during the
323 1.1 bsh * unmount. It looks like syslogd is getting woken up only to find
324 1.1 bsh * that it cannot page part of the binary in as the filesystem has
325 1.1 bsh * been unmounted.
326 1.1 bsh */
327 1.1 bsh if (!(howto & RB_NOSYNC))
328 1.1 bsh bootsync();
329 1.1 bsh
330 1.1 bsh /* Say NO to interrupts */
331 1.1 bsh splhigh();
332 1.1 bsh
333 1.1 bsh /* Do a dump if requested. */
334 1.1 bsh if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
335 1.1 bsh dumpsys();
336 1.1 bsh
337 1.1 bsh /* Run any shutdown hooks */
338 1.1 bsh doshutdownhooks();
339 1.1 bsh
340 1.1 bsh /* Make sure IRQ's are disabled */
341 1.1 bsh IRQdisable;
342 1.1 bsh
343 1.1 bsh if (howto & RB_HALT) {
344 1.1 bsh printf("The operating system has halted.\n");
345 1.1 bsh printf("Please press any key to reboot.\n\n");
346 1.1 bsh cngetc();
347 1.1 bsh }
348 1.1 bsh printf("rebooting...\n");
349 1.1 bsh cpu_reset();
350 1.1 bsh /* NOTREACHED */
351 1.1 bsh }
352 1.1 bsh #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v))
353 1.1 bsh
354 1.1 bsh /*
355 1.1 bsh * u_int initarm(...)
356 1.1 bsh *
357 1.1 bsh * Initial entry point on startup. This gets called before main() is
358 1.1 bsh * entered.
359 1.1 bsh * It should be responsible for setting up everything that must be
360 1.1 bsh * in place when main is called.
361 1.1 bsh * This includes
362 1.1 bsh * Taking a copy of the boot configuration structure.
363 1.1 bsh * Initialising the physical console so characters can be printed.
364 1.1 bsh * Setting up page tables for the kernel
365 1.1 bsh * Relocating the kernel to the bottom of physical memory
366 1.1 bsh */
367 1.1 bsh
368 1.1 bsh u_int
369 1.1 bsh initarm(void *arg)
370 1.1 bsh {
371 1.1 bsh int loop;
372 1.1 bsh int loop1;
373 1.1 bsh u_int l1pagetable;
374 1.1 bsh extern int etext asm("_etext");
375 1.1 bsh extern int end asm("_end");
376 1.1 bsh pv_addr_t kernel_l1pt;
377 1.9 bsh struct s3c2800_softc temp_softc; /* used to initialize IO regs */
378 1.1 bsh int progress_counter = 0;
379 1.9 bsh
380 1.9 bsh #ifdef DO_MEMORY_DISK
381 1.9 bsh vm_offset_t md_root_start;
382 1.9 bsh #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE)
383 1.1 bsh #endif
384 1.1 bsh
385 1.9 bsh #define gpio_read8(reg) bus_space_read_1(temp_softc.sc_sx.sc_iot, \
386 1.9 bsh temp_softc.sc_sx.sc_gpio_ioh, (reg))
387 1.9 bsh
388 1.1 bsh #define LEDSTEP() __LED(progress_counter++)
389 1.1 bsh
390 1.1 bsh #define pdatc (*(volatile uint8_t *)(S3C2800_GPIO_BASE+GPIO_PDATC))
391 1.1 bsh #define __LED(x) (pdatc = (pdatc & ~0x07) | (~(x) & 0x07))
392 1.1 bsh
393 1.1 bsh LEDSTEP();
394 1.1 bsh /*
395 1.1 bsh * Heads up ... Setup the CPU / MMU / TLB functions
396 1.1 bsh */
397 1.1 bsh if (set_cpufuncs())
398 1.1 bsh panic("cpu not recognized!");
399 1.1 bsh
400 1.1 bsh LEDSTEP();
401 1.9 bsh
402 1.9 bsh map_builtin_peripherals();
403 1.9 bsh
404 1.1 bsh /*
405 1.1 bsh * prepare fake bus space tag
406 1.1 bsh */
407 1.1 bsh bootstrap_bs_tag = s3c2xx0_bs_tag;
408 1.1 bsh bootstrap_bs_tag.bs_map = bootstrap_bs_map;
409 1.9 bsh s3c2xx0_softc = &temp_softc.sc_sx;
410 1.9 bsh s3c2xx0_softc->sc_iot = &bootstrap_bs_tag;
411 1.1 bsh
412 1.1 bsh bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_GPIO_BASE,
413 1.9 bsh S3C2800_GPIO_SIZE, 0, &temp_softc.sc_sx.sc_gpio_ioh);
414 1.1 bsh bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_INTCTL_BASE,
415 1.9 bsh S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_sx.sc_intctl_ioh);
416 1.9 bsh bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_CLKMAN_BASE,
417 1.9 bsh S3C2800_CLKMAN_SIZE, 0, &temp_softc.sc_sx.sc_clkman_ioh);
418 1.1 bsh
419 1.1 bsh #undef __LED
420 1.10 thorpej #define __LED(x) \
421 1.10 thorpej bus_space_write_1(&bootstrap_bs_tag, \
422 1.10 thorpej temp_softc.sc_sx.sc_gpio_ioh, \
423 1.10 thorpej GPIO_PDATC, (~(x) & 0x07) | \
424 1.10 thorpej (bus_space_read_1(&bootstrap_bs_tag, \
425 1.9 bsh temp_softc.sc_sx.sc_gpio_ioh, GPIO_PDATC ) & ~0x07))
426 1.1 bsh
427 1.1 bsh LEDSTEP();
428 1.1 bsh
429 1.1 bsh /* Disable all peripheral interrupts */
430 1.9 bsh bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_sx.sc_intctl_ioh,
431 1.1 bsh INTCTL_INTMSK, 0);
432 1.1 bsh
433 1.9 bsh s3c2800_clock_freq(&temp_softc);
434 1.9 bsh
435 1.1 bsh consinit();
436 1.10 thorpej #ifdef VERBOSE_INIT_ARM
437 1.1 bsh printf("consinit done\n");
438 1.10 thorpej #endif
439 1.1 bsh
440 1.1 bsh #ifdef KGDB
441 1.1 bsh LEDSTEP();
442 1.1 bsh kgdb_port_init();
443 1.1 bsh #endif
444 1.1 bsh LEDSTEP();
445 1.1 bsh
446 1.10 thorpej #ifdef VERBOSE_INIT_ARM
447 1.1 bsh /* Talk to the user */
448 1.1 bsh printf("\nNetBSD/evbarm (SMDK2800) booting ...\n");
449 1.10 thorpej #endif
450 1.1 bsh
451 1.1 bsh /*
452 1.1 bsh * Ok we have the following memory map
453 1.1 bsh *
454 1.1 bsh * Physical Address Range Description
455 1.1 bsh * ----------------------- ----------------------------------
456 1.1 bsh * 0x00000000 - 0x00ffffff Intel flash Memory (16MB)
457 1.1 bsh * 0x02000000 - 0x020fffff AMD flash Memory (1MB)
458 1.1 bsh * or (depend on DIPSW setting)
459 1.1 bsh * 0x00000000 - 0x000fffff AMD flash Memory (1MB)
460 1.1 bsh * 0x02000000 - 0x02ffffff Intel flash Memory (16MB)
461 1.1 bsh *
462 1.1 bsh * 0x08000000 - 0x09ffffff SDRAM (32MB)
463 1.1 bsh * 0x20000000 - 0x3fffffff PCI space
464 1.1 bsh *
465 1.1 bsh * The initarm() has the responsibility for creating the kernel
466 1.1 bsh * page tables.
467 1.1 bsh * It must also set up various memory pointers that are used
468 1.1 bsh * by pmap etc.
469 1.1 bsh */
470 1.1 bsh
471 1.1 bsh /* Fake bootconfig structure for the benefit of pmap.c */
472 1.1 bsh /* XXX must make the memory description h/w independent */
473 1.1 bsh bootconfig.dramblocks = 1;
474 1.1 bsh bootconfig.dram[0].address = SDRAM_START;
475 1.2 thorpej bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE;
476 1.1 bsh
477 1.1 bsh /*
478 1.1 bsh * Set up the variables that define the availablilty of
479 1.1 bsh * physical memory. For now, we're going to set
480 1.1 bsh * physical_freestart to 0x08200000 (where the kernel
481 1.1 bsh * was loaded), and allocate the memory we need downwards.
482 1.1 bsh * If we get too close to the bottom of SDRAM, we
483 1.1 bsh * will panic. We will update physical_freestart and
484 1.1 bsh * physical_freeend later to reflect what pmap_bootstrap()
485 1.1 bsh * wants to see.
486 1.1 bsh *
487 1.1 bsh * XXX pmap_bootstrap() needs an enema.
488 1.1 bsh */
489 1.1 bsh physical_start = bootconfig.dram[0].address;
490 1.2 thorpej physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
491 1.9 bsh
492 1.9 bsh #if DO_MEMORY_DISK
493 1.9 bsh #ifdef MEMORY_DISK_ROOT_ROM
494 1.9 bsh md_root_start = MEMORY_DISK_ROOT_ADDR;
495 1.9 bsh boothowto |= RB_RDONLY;
496 1.9 bsh #else
497 1.9 bsh /* Reserve physmem for ram disk */
498 1.9 bsh md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1));
499 1.9 bsh printf("Reserve %ld bytes for memory disk\n",
500 1.9 bsh physical_end - md_root_start);
501 1.9 bsh /* copy fs contents */
502 1.9 bsh memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR,
503 1.9 bsh MD_ROOT_SIZE);
504 1.9 bsh physical_end = md_root_start;
505 1.9 bsh #endif
506 1.1 bsh #endif
507 1.1 bsh
508 1.1 bsh physical_freestart = 0x08000000UL; /* XXX */
509 1.1 bsh physical_freeend = 0x08200000UL;
510 1.1 bsh
511 1.2 thorpej physmem = (physical_end - physical_start) / PAGE_SIZE;
512 1.1 bsh
513 1.10 thorpej #ifdef VERBOSE_INIT_ARM
514 1.1 bsh /* Tell the user about the memory */
515 1.1 bsh printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
516 1.1 bsh physical_start, physical_end - 1);
517 1.10 thorpej #endif
518 1.1 bsh
519 1.1 bsh /*
520 1.1 bsh * XXX
521 1.1 bsh * Okay, the kernel starts 2MB in from the bottom of physical
522 1.1 bsh * memory. We are going to allocate our bootstrap pages downwards
523 1.1 bsh * from there.
524 1.1 bsh *
525 1.1 bsh * We need to allocate some fixed page tables to get the kernel
526 1.1 bsh * going. We allocate one page directory and a number of page
527 1.1 bsh * tables and store the physical addresses in the kernel_pt_table
528 1.1 bsh * array.
529 1.1 bsh *
530 1.1 bsh * The kernel page directory must be on a 16K boundary. The page
531 1.1 bsh * tables must be on 4K bounaries. What we do is allocate the
532 1.1 bsh * page directory on the first 16K boundary that we encounter, and
533 1.1 bsh * the page tables on 4K boundaries otherwise. Since we allocate
534 1.1 bsh * at least 3 L2 page tables, we are guaranteed to encounter at
535 1.1 bsh * least one 16K aligned region.
536 1.1 bsh */
537 1.1 bsh
538 1.1 bsh #ifdef VERBOSE_INIT_ARM
539 1.1 bsh printf("Allocating page tables\n");
540 1.1 bsh #endif
541 1.1 bsh
542 1.2 thorpej free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
543 1.1 bsh
544 1.1 bsh #ifdef VERBOSE_INIT_ARM
545 1.1 bsh printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
546 1.1 bsh physical_freestart, free_pages, free_pages);
547 1.1 bsh #endif
548 1.1 bsh
549 1.1 bsh /* Define a macro to simplify memory allocation */
550 1.1 bsh #define valloc_pages(var, np) \
551 1.1 bsh alloc_pages((var).pv_pa, (np)); \
552 1.1 bsh (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
553 1.1 bsh
554 1.1 bsh #define alloc_pages(var, np) \
555 1.2 thorpej physical_freeend -= ((np) * PAGE_SIZE); \
556 1.1 bsh if (physical_freeend < physical_freestart) \
557 1.1 bsh panic("initarm: out of memory"); \
558 1.1 bsh (var) = physical_freeend; \
559 1.1 bsh free_pages -= (np); \
560 1.2 thorpej memset((char *)(var), 0, ((np) * PAGE_SIZE));
561 1.1 bsh
562 1.1 bsh loop1 = 0;
563 1.1 bsh kernel_l1pt.pv_pa = 0;
564 1.1 bsh for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
565 1.1 bsh /* Are we 16KB aligned for an L1 ? */
566 1.1 bsh if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
567 1.1 bsh && kernel_l1pt.pv_pa == 0) {
568 1.2 thorpej valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
569 1.1 bsh } else {
570 1.4 thorpej valloc_pages(kernel_pt_table[loop1],
571 1.4 thorpej L2_TABLE_SIZE / PAGE_SIZE);
572 1.1 bsh ++loop1;
573 1.1 bsh }
574 1.1 bsh }
575 1.1 bsh
576 1.1 bsh /* This should never be able to happen but better confirm that. */
577 1.9 bsh if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
578 1.1 bsh panic("initarm: Failed to align the kernel page directory\n");
579 1.1 bsh
580 1.1 bsh /*
581 1.1 bsh * Allocate a page for the system page mapped to V0x00000000
582 1.1 bsh * This page will just contain the system vectors and can be
583 1.1 bsh * shared by all processes.
584 1.1 bsh */
585 1.1 bsh alloc_pages(systempage.pv_pa, 1);
586 1.1 bsh
587 1.1 bsh /* Allocate stacks for all modes */
588 1.1 bsh valloc_pages(irqstack, IRQ_STACK_SIZE);
589 1.1 bsh valloc_pages(abtstack, ABT_STACK_SIZE);
590 1.1 bsh valloc_pages(undstack, UND_STACK_SIZE);
591 1.1 bsh valloc_pages(kernelstack, UPAGES);
592 1.1 bsh
593 1.1 bsh #ifdef VERBOSE_INIT_ARM
594 1.1 bsh printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
595 1.1 bsh irqstack.pv_va);
596 1.1 bsh printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
597 1.1 bsh abtstack.pv_va);
598 1.1 bsh printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
599 1.1 bsh undstack.pv_va);
600 1.1 bsh printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
601 1.1 bsh kernelstack.pv_va);
602 1.1 bsh #endif
603 1.1 bsh
604 1.2 thorpej alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
605 1.1 bsh
606 1.1 bsh LEDSTEP();
607 1.1 bsh
608 1.1 bsh /*
609 1.1 bsh * Ok we have allocated physical pages for the primary kernel
610 1.1 bsh * page tables
611 1.1 bsh */
612 1.1 bsh
613 1.1 bsh #ifdef VERBOSE_INIT_ARM
614 1.1 bsh printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
615 1.1 bsh #endif
616 1.1 bsh
617 1.1 bsh /*
618 1.1 bsh * Now we start construction of the L1 page table
619 1.1 bsh * We start by mapping the L2 page tables into the L1.
620 1.1 bsh * This means that we can replace L1 mappings later on if necessary
621 1.1 bsh */
622 1.1 bsh l1pagetable = kernel_l1pt.pv_pa;
623 1.1 bsh
624 1.1 bsh /* Map the L2 pages tables in the L1 page table */
625 1.1 bsh pmap_link_l2pt(l1pagetable, 0x00000000,
626 1.1 bsh &kernel_pt_table[KERNEL_PT_SYS]);
627 1.1 bsh for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
628 1.1 bsh pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
629 1.1 bsh &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
630 1.1 bsh for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
631 1.1 bsh pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
632 1.1 bsh &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
633 1.1 bsh
634 1.1 bsh /* update the top of the kernel VM */
635 1.1 bsh pmap_curmaxkvaddr =
636 1.1 bsh KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
637 1.1 bsh
638 1.1 bsh #ifdef VERBOSE_INIT_ARM
639 1.1 bsh printf("Mapping kernel\n");
640 1.1 bsh #endif
641 1.1 bsh
642 1.1 bsh /* Now we fill in the L2 pagetable for the kernel static code/data */
643 1.1 bsh {
644 1.8 bsh size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE;
645 1.8 bsh size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE;
646 1.1 bsh u_int logical;
647 1.1 bsh
648 1.1 bsh textsize = (textsize + PGOFSET) & ~PGOFSET;
649 1.1 bsh totalsize = (totalsize + PGOFSET) & ~PGOFSET;
650 1.1 bsh
651 1.1 bsh logical = 0x00200000; /* offset of kernel in RAM */
652 1.1 bsh
653 1.1 bsh logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
654 1.1 bsh physical_start + logical, textsize,
655 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
656 1.1 bsh logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
657 1.1 bsh physical_start + logical, totalsize - textsize,
658 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
659 1.1 bsh }
660 1.1 bsh
661 1.1 bsh #ifdef VERBOSE_INIT_ARM
662 1.1 bsh printf("Constructing L2 page tables\n");
663 1.1 bsh #endif
664 1.1 bsh
665 1.1 bsh /* Map the stack pages */
666 1.1 bsh pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
667 1.2 thorpej IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
668 1.2 thorpej PTE_CACHE);
669 1.1 bsh pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
670 1.2 thorpej ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
671 1.2 thorpej PTE_CACHE);
672 1.1 bsh pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
673 1.2 thorpej UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
674 1.2 thorpej PTE_CACHE);
675 1.1 bsh pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
676 1.2 thorpej UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
677 1.1 bsh
678 1.4 thorpej pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
679 1.4 thorpej L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
680 1.1 bsh
681 1.4 thorpej for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
682 1.4 thorpej pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
683 1.4 thorpej kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
684 1.4 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
685 1.4 thorpej }
686 1.1 bsh
687 1.1 bsh /* Map the vector page. */
688 1.1 bsh #if 1
689 1.1 bsh /* MULTI-ICE requires that page 0 is NC/NB so that it can download the
690 1.1 bsh * cache-clean code there. */
691 1.1 bsh pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
692 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
693 1.1 bsh #else
694 1.1 bsh pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
695 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
696 1.1 bsh #endif
697 1.1 bsh
698 1.1 bsh #if 0
699 1.1 bsh /* Map the core memory needed before autoconfig */
700 1.1 bsh loop = 0;
701 1.1 bsh while (l1_sec_table[loop].size) {
702 1.1 bsh vm_size_t sz;
703 1.1 bsh
704 1.1 bsh #ifdef VERBOSE_INIT_ARM
705 1.1 bsh printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
706 1.1 bsh l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
707 1.1 bsh l1_sec_table[loop].va);
708 1.1 bsh #endif
709 1.1 bsh for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
710 1.1 bsh pmap_map_section(l1pagetable,
711 1.1 bsh l1_sec_table[loop].va + sz,
712 1.1 bsh l1_sec_table[loop].pa + sz,
713 1.1 bsh l1_sec_table[loop].prot,
714 1.1 bsh l1_sec_table[loop].cache);
715 1.1 bsh ++loop;
716 1.1 bsh }
717 1.1 bsh #endif
718 1.1 bsh
719 1.1 bsh #ifdef MEMORY_DISK_DYNAMIC
720 1.9 bsh /* map MD root image */
721 1.9 bsh bootstrap_bs_map(&bootstrap_bs_tag, md_root_start, MD_ROOT_SIZE,
722 1.9 bsh BUS_SPACE_MAP_CACHEABLE | BUS_SPACE_MAP_LINEAR,
723 1.9 bsh (bus_space_handle_t *)&md_root_start);
724 1.1 bsh
725 1.9 bsh md_root_setconf((void *)md_root_start, MD_ROOT_SIZE);
726 1.9 bsh #endif /* MEMORY_DISK_DYNAMIC */
727 1.1 bsh /*
728 1.1 bsh * map integrated peripherals at same address in l1pagetable
729 1.1 bsh * so that we can continue to use console.
730 1.1 bsh */
731 1.1 bsh copy_io_area_map((pd_entry_t *)l1pagetable);
732 1.1 bsh
733 1.1 bsh /*
734 1.1 bsh * Now we have the real page tables in place so we can switch to them.
735 1.1 bsh * Once this is done we will be running with the REAL kernel page
736 1.1 bsh * tables.
737 1.1 bsh */
738 1.1 bsh
739 1.1 bsh /*
740 1.1 bsh * Update the physical_freestart/physical_freeend/free_pages
741 1.1 bsh * variables.
742 1.1 bsh */
743 1.1 bsh {
744 1.1 bsh physical_freestart = physical_start +
745 1.8 bsh (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE);
746 1.1 bsh physical_freeend = physical_end;
747 1.2 thorpej free_pages =
748 1.2 thorpej (physical_freeend - physical_freestart) / PAGE_SIZE;
749 1.1 bsh }
750 1.1 bsh
751 1.1 bsh /* Switch tables */
752 1.1 bsh #ifdef VERBOSE_INIT_ARM
753 1.1 bsh printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
754 1.1 bsh physical_freestart, free_pages, free_pages);
755 1.1 bsh printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
756 1.1 bsh #endif
757 1.1 bsh LEDSTEP();
758 1.4 thorpej cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
759 1.1 bsh setttb(kernel_l1pt.pv_pa);
760 1.1 bsh cpu_tlb_flushID();
761 1.4 thorpej cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
762 1.4 thorpej
763 1.4 thorpej /*
764 1.4 thorpej * Moved from cpu_startup() as data_abort_handler() references
765 1.4 thorpej * this during uvm init
766 1.4 thorpej */
767 1.4 thorpej proc0paddr = (struct user *)kernelstack.pv_va;
768 1.4 thorpej lwp0.l_addr = proc0paddr;
769 1.1 bsh
770 1.1 bsh #ifdef VERBOSE_INIT_ARM
771 1.1 bsh printf("done!\n");
772 1.1 bsh #endif
773 1.1 bsh
774 1.1 bsh #if 0
775 1.1 bsh /*
776 1.1 bsh * The IFPGA registers have just moved.
777 1.1 bsh * Detach the diagnostic serial port and reattach at the new address.
778 1.1 bsh */
779 1.1 bsh plcomcndetach();
780 1.1 bsh /*
781 1.1 bsh * XXX this should only be done in main() but it useful to
782 1.1 bsh * have output earlier ...
783 1.1 bsh */
784 1.1 bsh consinit();
785 1.1 bsh #endif
786 1.1 bsh
787 1.1 bsh LEDSTEP();
788 1.1 bsh #ifdef VERBOSE_INIT_ARM
789 1.1 bsh printf("bootstrap done.\n");
790 1.1 bsh #endif
791 1.1 bsh
792 1.1 bsh arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
793 1.1 bsh
794 1.1 bsh /*
795 1.1 bsh * Pages were allocated during the secondary bootstrap for the
796 1.1 bsh * stacks for different CPU modes.
797 1.1 bsh * We must now set the r13 registers in the different CPU modes to
798 1.1 bsh * point to these stacks.
799 1.1 bsh * Since the ARM stacks use STMFD etc. we must set r13 to the top end
800 1.1 bsh * of the stack memory.
801 1.1 bsh */
802 1.10 thorpej #ifdef VERBOSE_INIT_ARM
803 1.1 bsh printf("init subsystems: stacks ");
804 1.10 thorpej #endif
805 1.1 bsh
806 1.2 thorpej set_stackptr(PSR_IRQ32_MODE,
807 1.2 thorpej irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
808 1.2 thorpej set_stackptr(PSR_ABT32_MODE,
809 1.2 thorpej abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
810 1.2 thorpej set_stackptr(PSR_UND32_MODE,
811 1.2 thorpej undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
812 1.1 bsh
813 1.1 bsh LEDSTEP();
814 1.1 bsh
815 1.1 bsh /*
816 1.1 bsh * Well we should set a data abort handler.
817 1.1 bsh * Once things get going this will change as we will need a proper
818 1.1 bsh * handler.
819 1.1 bsh * Until then we will use a handler that just panics but tells us
820 1.1 bsh * why.
821 1.1 bsh * Initialisation of the vectors will just panic on a data abort.
822 1.1 bsh * This just fills in a slighly better one.
823 1.1 bsh */
824 1.10 thorpej #ifdef VERBOSE_INIT_ARM
825 1.1 bsh printf("vectors ");
826 1.10 thorpej #endif
827 1.1 bsh data_abort_handler_address = (u_int)data_abort_handler;
828 1.1 bsh prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
829 1.1 bsh undefined_handler_address = (u_int)undefinedinstruction_bounce;
830 1.1 bsh
831 1.1 bsh /* Initialise the undefined instruction handlers */
832 1.10 thorpej #ifdef VERBOSE_INIT_ARM
833 1.1 bsh printf("undefined ");
834 1.10 thorpej #endif
835 1.1 bsh undefined_init();
836 1.1 bsh
837 1.1 bsh LEDSTEP();
838 1.1 bsh
839 1.1 bsh /* Load memory into UVM. */
840 1.10 thorpej #ifdef VERBOSE_INIT_ARM
841 1.1 bsh printf("page ");
842 1.10 thorpej #endif
843 1.1 bsh uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
844 1.1 bsh uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
845 1.1 bsh atop(physical_freestart), atop(physical_freeend),
846 1.1 bsh VM_FREELIST_DEFAULT);
847 1.1 bsh
848 1.1 bsh LEDSTEP();
849 1.1 bsh /* Boot strap pmap telling it where the kernel page table is */
850 1.10 thorpej #ifdef VERBOSE_INIT_ARM
851 1.1 bsh printf("pmap ");
852 1.10 thorpej #endif
853 1.6 thorpej pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
854 1.6 thorpej KERNEL_VM_BASE + KERNEL_VM_SIZE);
855 1.1 bsh
856 1.1 bsh LEDSTEP();
857 1.1 bsh
858 1.1 bsh /* Setup the IRQ system */
859 1.10 thorpej #ifdef VERBOSE_INIT_ARM
860 1.1 bsh printf("irq ");
861 1.10 thorpej #endif
862 1.1 bsh /* XXX irq_init(); */
863 1.1 bsh
864 1.10 thorpej #ifdef VERBOSE_INIT_ARM
865 1.1 bsh printf("done.\n");
866 1.10 thorpej #endif
867 1.1 bsh
868 1.9 bsh #ifdef BOOTHOWTO_INIT
869 1.9 bsh boothowto |= BOOTHOWTO_INIT;
870 1.9 bsh #endif
871 1.9 bsh {
872 1.9 bsh uint8_t gpio = ~gpio_read8(GPIO_PDATF);
873 1.9 bsh
874 1.9 bsh if (gpio & (1<<5)) /* SW3 */
875 1.9 bsh boothowto ^= RB_SINGLE;
876 1.9 bsh if (gpio & (1<<7)) /* SW7 */
877 1.9 bsh boothowto ^= RB_KDB;
878 1.10 thorpej #ifdef VERBOSE_INIT_ARM
879 1.9 bsh printf( "sw: %x boothowto: %x\n", gpio, boothowto );
880 1.10 thorpej #endif
881 1.9 bsh }
882 1.1 bsh
883 1.1 bsh #ifdef IPKDB
884 1.1 bsh /* Initialise ipkdb */
885 1.1 bsh ipkdb_init();
886 1.1 bsh if (boothowto & RB_KDB)
887 1.1 bsh ipkdb_connect(0);
888 1.1 bsh #endif
889 1.1 bsh
890 1.1 bsh #ifdef KGDB
891 1.1 bsh if (boothowto & RB_KDB) {
892 1.1 bsh kgdb_debug_init = 1;
893 1.1 bsh kgdb_connect(1);
894 1.1 bsh }
895 1.1 bsh #endif
896 1.1 bsh
897 1.3 ragge #if NKSYMS || defined(DDB) || defined(LKM)
898 1.3 ragge /* Firmware doesn't load symbols. */
899 1.3 ragge ksyms_init(0, NULL, NULL);
900 1.3 ragge #endif
901 1.3 ragge
902 1.1 bsh #ifdef DDB
903 1.1 bsh db_machine_init();
904 1.1 bsh if (boothowto & RB_KDB)
905 1.1 bsh Debugger();
906 1.1 bsh #endif
907 1.1 bsh
908 1.1 bsh /* We return the new stack pointer address */
909 1.1 bsh return (kernelstack.pv_va + USPACE_SVC_STACK_TOP);
910 1.1 bsh }
911 1.1 bsh
912 1.1 bsh void
913 1.1 bsh consinit(void)
914 1.1 bsh {
915 1.1 bsh static int consinit_done = 0;
916 1.1 bsh bus_space_tag_t iot = s3c2xx0_softc->sc_iot;
917 1.9 bsh int pclk = s3c2xx0_softc->sc_pclk;
918 1.1 bsh
919 1.1 bsh if (consinit_done != 0)
920 1.1 bsh return;
921 1.1 bsh
922 1.1 bsh consinit_done = 1;
923 1.1 bsh
924 1.1 bsh #if NSSCOM > 0
925 1.1 bsh #ifdef SSCOM0CONSOLE
926 1.1 bsh if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed,
927 1.9 bsh pclk, comcnmode))
928 1.1 bsh return;
929 1.1 bsh #endif
930 1.1 bsh #ifdef SSCOM1CONSOLE
931 1.1 bsh if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed,
932 1.9 bsh pclk, comcnmode))
933 1.1 bsh return;
934 1.1 bsh #endif
935 1.1 bsh #endif /* NSSCOM */
936 1.1 bsh #if NCOM>0 && defined(CONCOMADDR)
937 1.1 bsh if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed,
938 1.1 bsh COM_FREQ, comcnmode))
939 1.1 bsh panic("can't init serial console @%x", CONCOMADDR);
940 1.1 bsh return;
941 1.1 bsh #endif
942 1.1 bsh
943 1.1 bsh consinit_done = 0;
944 1.1 bsh }
945 1.1 bsh
946 1.1 bsh
947 1.1 bsh #ifdef KGDB
948 1.1 bsh
949 1.1 bsh #if (NSSCOM > 0)
950 1.1 bsh
951 1.1 bsh #ifdef KGDB_DEVNAME
952 1.1 bsh const char kgdb_devname[] = KGDB_DEVNAME;
953 1.1 bsh #else
954 1.1 bsh const char kgdb_devname[] = "";
955 1.1 bsh #endif
956 1.1 bsh
957 1.1 bsh #ifndef KGDB_DEVMODE
958 1.1 bsh #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */
959 1.1 bsh #endif
960 1.1 bsh int kgdb_sscom_mode = KGDB_DEVMODE;
961 1.1 bsh
962 1.1 bsh #endif /* NSSCOM */
963 1.1 bsh
964 1.1 bsh void
965 1.1 bsh kgdb_port_init(void)
966 1.1 bsh {
967 1.1 bsh #if (NSSCOM > 0)
968 1.1 bsh int unit = -1;
969 1.9 bsh int pclk = s3c2xx0_softc->sc_pclk;
970 1.1 bsh
971 1.1 bsh if (strcmp(kgdb_devname, "sscom0") == 0)
972 1.1 bsh unit = 0;
973 1.1 bsh else if (strcmp(kgdb_devname, "sscom1") == 0)
974 1.1 bsh unit = 1;
975 1.1 bsh
976 1.1 bsh if (unit >= 0) {
977 1.1 bsh s3c2800_sscom_kgdb_attach(s3c2xx0_softc->sc_iot,
978 1.9 bsh unit, kgdb_rate, pclk, kgdb_sscom_mode);
979 1.1 bsh }
980 1.1 bsh #endif
981 1.1 bsh }
982 1.1 bsh #endif
983 1.1 bsh
984 1.1 bsh static __inline
985 1.1 bsh pd_entry_t *
986 1.1 bsh read_ttb(void)
987 1.1 bsh {
988 1.1 bsh long ttb;
989 1.1 bsh
990 1.1 bsh __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb));
991 1.1 bsh
992 1.1 bsh
993 1.1 bsh return (pd_entry_t *)(ttb & ~((1 << 14) - 1));
994 1.1 bsh }
995 1.1 bsh
996 1.1 bsh
997 1.1 bsh static __inline void
998 1.1 bsh writeback_dcache_line(vaddr_t va)
999 1.1 bsh {
1000 1.1 bsh /* writeback Dcache line */
1001 1.1 bsh /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9
1002 1.1 bsh * assume write-through cache, and always flush Dcache instead of
1003 1.1 bsh * cleaning it. Since Boot loader maps page table with write-back
1004 1.1 bsh * cached, we really need to clean Dcache. */
1005 1.1 bsh asm("mcr p15, 0, %0, c7, c10, 1"
1006 1.1 bsh : : "r"(va));
1007 1.1 bsh }
1008 1.1 bsh
1009 1.1 bsh static __inline void
1010 1.1 bsh clean_dcache_line(vaddr_t va)
1011 1.1 bsh {
1012 1.1 bsh /* writeback and invalidate Dcache line */
1013 1.1 bsh asm("mcr p15, 0, %0, c7, c14, 1"
1014 1.1 bsh : : "r"(va));
1015 1.1 bsh }
1016 1.1 bsh
1017 1.1 bsh static vaddr_t section_free = SMDK2800_VBASE_FREE;
1018 1.1 bsh
1019 1.9 bsh static void
1020 1.9 bsh map_builtin_peripherals(void)
1021 1.9 bsh {
1022 1.9 bsh pd_entry_t *pagedir = read_ttb();
1023 1.9 bsh int i, sec;
1024 1.9 bsh
1025 1.9 bsh for (i=0; i < 2; ++i) {
1026 1.9 bsh
1027 1.9 bsh pmap_map_section((vaddr_t)pagedir,
1028 1.9 bsh SMDK2800_IO_AREA_VBASE + (i <<L1_S_SHIFT),
1029 1.9 bsh S3C2800_PERIPHERALS + (i << L1_S_SHIFT),
1030 1.9 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
1031 1.9 bsh
1032 1.9 bsh sec = (SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT) + i;
1033 1.9 bsh writeback_dcache_line((vaddr_t)&pagedir[sec]);
1034 1.9 bsh }
1035 1.9 bsh
1036 1.9 bsh cpu_drain_writebuf();
1037 1.9 bsh cpu_tlb_flushD();
1038 1.9 bsh }
1039 1.9 bsh
1040 1.1 bsh /*
1041 1.1 bsh * simple memory mapping function used in early bootstrap stage
1042 1.1 bsh * before pmap is initialized.
1043 1.1 bsh * This assumes only peripheral registers to map. they are mapped to
1044 1.1 bsh * fixed address with section mapping.
1045 1.1 bsh */
1046 1.1 bsh static int
1047 1.1 bsh bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
1048 1.1 bsh int flag, bus_space_handle_t * bshp)
1049 1.1 bsh {
1050 1.9 bsh long offset;
1051 1.1 bsh int modified = 0;
1052 1.1 bsh pd_entry_t *pagedir = read_ttb();
1053 1.1 bsh /* This assumes PA==VA for page directory */
1054 1.1 bsh
1055 1.1 bsh if (S3C2800_PERIPHERALS <= bpa && bpa < S3C2800_PERIPHERALS + 0x200000) {
1056 1.1 bsh offset = bpa - S3C2800_PERIPHERALS;
1057 1.1 bsh if (offset < 0 || 2 * L1_S_SIZE < offset)
1058 1.1 bsh panic("bootstrap_bs_map: can't map");
1059 1.1 bsh *bshp = (bus_space_handle_t)(SMDK2800_IO_AREA_VBASE + offset);
1060 1.1 bsh } else {
1061 1.1 bsh vaddr_t va;
1062 1.1 bsh bus_addr_t pa;
1063 1.1 bsh int cacheable = flag & BUS_SPACE_MAP_CACHEABLE;
1064 1.1 bsh
1065 1.1 bsh
1066 1.1 bsh size = (size + L1_S_OFFSET) & ~L1_S_OFFSET;
1067 1.1 bsh pa = bpa & ~L1_S_OFFSET;
1068 1.1 bsh offset = bpa - pa;
1069 1.1 bsh
1070 1.1 bsh va = section_free;
1071 1.1 bsh while (size) {
1072 1.1 bsh pmap_map_section((vaddr_t)pagedir, va,
1073 1.1 bsh pa, VM_PROT_READ | VM_PROT_WRITE,
1074 1.1 bsh cacheable ? PTE_CACHE : PTE_NOCACHE);
1075 1.1 bsh writeback_dcache_line((vaddr_t)& pagedir[va >> L1_S_SHIFT]);
1076 1.1 bsh va += L1_S_SIZE;
1077 1.1 bsh pa += L1_S_SIZE;
1078 1.1 bsh size -= L1_S_SIZE;
1079 1.1 bsh }
1080 1.1 bsh
1081 1.1 bsh *bshp = (bus_space_handle_t)(section_free + offset);
1082 1.1 bsh section_free = va;
1083 1.1 bsh }
1084 1.1 bsh
1085 1.1 bsh
1086 1.1 bsh if (modified) {
1087 1.1 bsh
1088 1.1 bsh cpu_drain_writebuf();
1089 1.1 bsh cpu_tlb_flushD();
1090 1.1 bsh }
1091 1.1 bsh return (0);
1092 1.1 bsh }
1093 1.1 bsh
1094 1.1 bsh static void
1095 1.1 bsh copy_io_area_map(pd_entry_t * new_pd)
1096 1.1 bsh {
1097 1.1 bsh pd_entry_t *cur_pd = read_ttb();
1098 1.9 bsh int sec;
1099 1.1 bsh
1100 1.1 bsh for (sec = SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT;
1101 1.1 bsh sec < (section_free >> L1_S_SHIFT); ++sec) {
1102 1.1 bsh new_pd[sec] = cur_pd[sec];
1103 1.1 bsh }
1104 1.1 bsh }
1105