smdk2800_machdep.c revision 1.2 1 1.2 thorpej /* $NetBSD: smdk2800_machdep.c,v 1.2 2003/04/02 03:49:26 thorpej Exp $ */
2 1.1 bsh
3 1.1 bsh /*
4 1.1 bsh * Copyright (c) 2002 Fujitsu Component Limited
5 1.1 bsh * Copyright (c) 2002 Genetec Corporation
6 1.1 bsh * All rights reserved.
7 1.1 bsh *
8 1.1 bsh * Redistribution and use in source and binary forms, with or without
9 1.1 bsh * modification, are permitted provided that the following conditions
10 1.1 bsh * are met:
11 1.1 bsh * 1. Redistributions of source code must retain the above copyright
12 1.1 bsh * notice, this list of conditions and the following disclaimer.
13 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 bsh * notice, this list of conditions and the following disclaimer in the
15 1.1 bsh * documentation and/or other materials provided with the distribution.
16 1.1 bsh * 3. Neither the name of The Fujitsu Component Limited nor the name of
17 1.1 bsh * Genetec corporation may not be used to endorse or promote products
18 1.1 bsh * derived from this software without specific prior written permission.
19 1.1 bsh *
20 1.1 bsh * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
21 1.1 bsh * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 1.1 bsh * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 1.1 bsh * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 1.1 bsh * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
25 1.1 bsh * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 1.1 bsh * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 1.1 bsh * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 1.1 bsh * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29 1.1 bsh * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 1.1 bsh * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 1.1 bsh * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 1.1 bsh * SUCH DAMAGE.
33 1.1 bsh */
34 1.1 bsh
35 1.1 bsh /*
36 1.1 bsh * Machine dependant functions for kernel setup for Samsung SMDK2800
37 1.1 bsh * derived from integrator_machdep.c
38 1.1 bsh */
39 1.1 bsh
40 1.1 bsh /*
41 1.1 bsh * Copyright (c) 2001,2002 ARM Ltd
42 1.1 bsh * All rights reserved.
43 1.1 bsh *
44 1.1 bsh * Redistribution and use in source and binary forms, with or without
45 1.1 bsh * modification, are permitted provided that the following conditions
46 1.1 bsh * are met:
47 1.1 bsh * 1. Redistributions of source code must retain the above copyright
48 1.1 bsh * notice, this list of conditions and the following disclaimer.
49 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
50 1.1 bsh * notice, this list of conditions and the following disclaimer in the
51 1.1 bsh * documentation and/or other materials provided with the distribution.
52 1.1 bsh * 3. The name of the company may not be used to endorse or promote
53 1.1 bsh * products derived from this software without specific prior written
54 1.1 bsh * permission.
55 1.1 bsh *
56 1.1 bsh * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND
57 1.1 bsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
58 1.1 bsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
59 1.1 bsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD
60 1.1 bsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
61 1.1 bsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
62 1.1 bsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
63 1.1 bsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
64 1.1 bsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
65 1.1 bsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
66 1.1 bsh * POSSIBILITY OF SUCH DAMAGE.
67 1.1 bsh *
68 1.1 bsh */
69 1.1 bsh
70 1.1 bsh /*
71 1.1 bsh * Copyright (c) 1997,1998 Mark Brinicombe.
72 1.1 bsh * Copyright (c) 1997,1998 Causality Limited.
73 1.1 bsh * All rights reserved.
74 1.1 bsh *
75 1.1 bsh * Redistribution and use in source and binary forms, with or without
76 1.1 bsh * modification, are permitted provided that the following conditions
77 1.1 bsh * are met:
78 1.1 bsh * 1. Redistributions of source code must retain the above copyright
79 1.1 bsh * notice, this list of conditions and the following disclaimer.
80 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
81 1.1 bsh * notice, this list of conditions and the following disclaimer in the
82 1.1 bsh * documentation and/or other materials provided with the distribution.
83 1.1 bsh * 3. All advertising materials mentioning features or use of this software
84 1.1 bsh * must display the following acknowledgement:
85 1.1 bsh * This product includes software developed by Mark Brinicombe
86 1.1 bsh * for the NetBSD Project.
87 1.1 bsh * 4. The name of the company nor the name of the author may be used to
88 1.1 bsh * endorse or promote products derived from this software without specific
89 1.1 bsh * prior written permission.
90 1.1 bsh *
91 1.1 bsh * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
92 1.1 bsh * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
93 1.1 bsh * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
94 1.1 bsh * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
95 1.1 bsh * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
96 1.1 bsh * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
97 1.1 bsh * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
98 1.1 bsh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
99 1.1 bsh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
100 1.1 bsh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
101 1.1 bsh * SUCH DAMAGE.
102 1.1 bsh *
103 1.1 bsh * Machine dependant functions for kernel setup for integrator board
104 1.1 bsh *
105 1.1 bsh * Created : 24/11/97
106 1.1 bsh */
107 1.1 bsh
108 1.1 bsh #include "opt_ddb.h"
109 1.1 bsh #include "opt_kgdb.h"
110 1.1 bsh #include "opt_ipkdb.h"
111 1.1 bsh #include "opt_pmap_debug.h"
112 1.1 bsh #include "opt_md.h"
113 1.1 bsh #include "pci.h"
114 1.1 bsh
115 1.1 bsh #include <sys/param.h>
116 1.1 bsh #include <sys/device.h>
117 1.1 bsh #include <sys/systm.h>
118 1.1 bsh #include <sys/kernel.h>
119 1.1 bsh #include <sys/exec.h>
120 1.1 bsh #include <sys/proc.h>
121 1.1 bsh #include <sys/msgbuf.h>
122 1.1 bsh #include <sys/reboot.h>
123 1.1 bsh #include <sys/termios.h>
124 1.1 bsh
125 1.2 thorpej #include <uvm/uvm_extern.h>
126 1.2 thorpej
127 1.1 bsh #include <dev/cons.h>
128 1.1 bsh #include <dev/md.h>
129 1.1 bsh
130 1.1 bsh #include <machine/db_machdep.h>
131 1.1 bsh #include <ddb/db_sym.h>
132 1.1 bsh #include <ddb/db_extern.h>
133 1.1 bsh #ifdef KGDB
134 1.1 bsh #include <sys/kgdb.h>
135 1.1 bsh #endif
136 1.1 bsh
137 1.1 bsh #include <machine/bootconfig.h>
138 1.1 bsh #include <machine/bus.h>
139 1.1 bsh #include <machine/cpu.h>
140 1.1 bsh #include <machine/frame.h>
141 1.1 bsh #include <machine/intr.h>
142 1.1 bsh #include <arm/undefined.h>
143 1.1 bsh
144 1.1 bsh #include <arm/arm32/machdep.h>
145 1.1 bsh
146 1.1 bsh #include <arm/s3c2xx0/s3c2800reg.h>
147 1.1 bsh #include <arm/s3c2xx0/s3c2800var.h>
148 1.1 bsh
149 1.1 bsh #ifndef SDRAM_START
150 1.1 bsh #define SDRAM_START S3C2800_DBANK0_START
151 1.1 bsh #endif
152 1.1 bsh #ifndef SDRAM_SIZE
153 1.1 bsh #define SDRAM_SIZE (32*1024*1024)
154 1.1 bsh #endif
155 1.1 bsh
156 1.1 bsh /*
157 1.1 bsh * Address to map I/O registers in early initialize stage.
158 1.1 bsh */
159 1.1 bsh #define SMDK2800_IO_AREA_VBASE 0xfd000000
160 1.1 bsh #define SMDK2800_VBASE_FREE 0xfd200000
161 1.1 bsh
162 1.1 bsh /*
163 1.1 bsh * Address to call from cpu_reset() to reset the machine.
164 1.1 bsh * This is machine architecture dependant as it varies depending
165 1.1 bsh * on where the ROM appears when you turn the MMU off.
166 1.1 bsh */
167 1.1 bsh u_int cpu_reset_address = (u_int)0;
168 1.1 bsh
169 1.1 bsh /* Define various stack sizes in pages */
170 1.1 bsh #define IRQ_STACK_SIZE 1
171 1.1 bsh #define ABT_STACK_SIZE 1
172 1.1 bsh #ifdef IPKDB
173 1.1 bsh #define UND_STACK_SIZE 2
174 1.1 bsh #else
175 1.1 bsh #define UND_STACK_SIZE 1
176 1.1 bsh #endif
177 1.1 bsh
178 1.1 bsh BootConfig bootconfig; /* Boot config storage */
179 1.1 bsh char *boot_args = NULL;
180 1.1 bsh char *boot_file = NULL;
181 1.1 bsh
182 1.1 bsh vm_offset_t physical_start;
183 1.1 bsh vm_offset_t physical_freestart;
184 1.1 bsh vm_offset_t physical_freeend;
185 1.1 bsh vm_offset_t physical_end;
186 1.1 bsh u_int free_pages;
187 1.1 bsh vm_offset_t pagetables_start;
188 1.1 bsh int physmem = 0;
189 1.1 bsh
190 1.1 bsh /*int debug_flags;*/
191 1.1 bsh #ifndef PMAP_STATIC_L1S
192 1.1 bsh int max_processes = 64; /* Default number */
193 1.1 bsh #endif /* !PMAP_STATIC_L1S */
194 1.1 bsh
195 1.1 bsh /* Physical and virtual addresses for some global pages */
196 1.1 bsh pv_addr_t systempage;
197 1.1 bsh pv_addr_t irqstack;
198 1.1 bsh pv_addr_t undstack;
199 1.1 bsh pv_addr_t abtstack;
200 1.1 bsh pv_addr_t kernelstack;
201 1.1 bsh
202 1.1 bsh vm_offset_t msgbufphys;
203 1.1 bsh
204 1.1 bsh extern u_int data_abort_handler_address;
205 1.1 bsh extern u_int prefetch_abort_handler_address;
206 1.1 bsh extern u_int undefined_handler_address;
207 1.1 bsh
208 1.1 bsh #ifdef PMAP_DEBUG
209 1.1 bsh extern int pmap_debug_level;
210 1.1 bsh #endif
211 1.1 bsh
212 1.1 bsh #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
213 1.1 bsh #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
214 1.1 bsh #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */
215 1.1 bsh
216 1.1 bsh #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
217 1.1 bsh
218 1.1 bsh #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
219 1.1 bsh #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
220 1.1 bsh
221 1.1 bsh pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
222 1.1 bsh
223 1.1 bsh struct user *proc0paddr;
224 1.1 bsh
225 1.1 bsh #ifdef MEMORY_DISK_DYNAMIC
226 1.1 bsh #define MD_ROOT_SIZE 4 /* in megabytes */
227 1.1 bsh #define MD_ROOT_START 0x400000/* MD root image in ROM */
228 1.1 bsh #endif
229 1.1 bsh
230 1.1 bsh
231 1.1 bsh /* Prototypes */
232 1.1 bsh
233 1.1 bsh void consinit(void);
234 1.1 bsh void kgdb_port_init(void);
235 1.1 bsh
236 1.1 bsh static int
237 1.1 bsh bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
238 1.1 bsh int cacheable, bus_space_handle_t * bshp);
239 1.1 bsh static void copy_io_area_map(pd_entry_t * new_pd);
240 1.1 bsh
241 1.1 bsh /* A load of console goo. */
242 1.1 bsh #include "vga.h"
243 1.1 bsh #if NVGA > 0
244 1.1 bsh #include <dev/ic/mc6845reg.h>
245 1.1 bsh #include <dev/ic/pcdisplayvar.h>
246 1.1 bsh #include <dev/ic/vgareg.h>
247 1.1 bsh #include <dev/ic/vgavar.h>
248 1.1 bsh #endif
249 1.1 bsh
250 1.1 bsh #include "com.h"
251 1.1 bsh #if NCOM > 0
252 1.1 bsh #include <dev/ic/comreg.h>
253 1.1 bsh #include <dev/ic/comvar.h>
254 1.1 bsh #endif
255 1.1 bsh
256 1.1 bsh #include "sscom.h"
257 1.1 bsh #if NSSCOM > 0
258 1.1 bsh #include "opt_sscom.h"
259 1.1 bsh #include <arm/s3c2xx0/sscom_var.h>
260 1.1 bsh #endif
261 1.1 bsh
262 1.1 bsh /*
263 1.1 bsh * Define the default console speed for the board. This is generally
264 1.1 bsh * what the firmware provided with the board defaults to.
265 1.1 bsh */
266 1.1 bsh #ifndef CONSPEED
267 1.1 bsh #define CONSPEED B115200 /* TTYDEF_SPEED */
268 1.1 bsh #endif
269 1.1 bsh #ifndef CONMODE
270 1.1 bsh #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
271 1.1 bsh #endif
272 1.1 bsh
273 1.1 bsh int comcnspeed = CONSPEED;
274 1.1 bsh int comcnmode = CONMODE;
275 1.1 bsh
276 1.1 bsh struct bus_space bootstrap_bs_tag;
277 1.1 bsh
278 1.1 bsh /*
279 1.1 bsh * void cpu_reboot(int howto, char *bootstr)
280 1.1 bsh *
281 1.1 bsh * Reboots the system
282 1.1 bsh *
283 1.1 bsh * Deal with any syncing, unmounting, dumping and shutdown hooks,
284 1.1 bsh * then reset the CPU.
285 1.1 bsh */
286 1.1 bsh void
287 1.1 bsh cpu_reboot(int howto, char *bootstr)
288 1.1 bsh {
289 1.1 bsh #ifdef DIAGNOSTIC
290 1.1 bsh /* info */
291 1.1 bsh printf("boot: howto=%08x curproc=%p\n", howto, curproc);
292 1.1 bsh #endif
293 1.1 bsh
294 1.1 bsh cpu_reset_address = (u_int)s3c2800_softreset;
295 1.1 bsh
296 1.1 bsh /*
297 1.1 bsh * If we are still cold then hit the air brakes
298 1.1 bsh * and crash to earth fast
299 1.1 bsh */
300 1.1 bsh if (cold) {
301 1.1 bsh doshutdownhooks();
302 1.1 bsh printf("The operating system has halted.\n");
303 1.1 bsh printf("Please press any key to reboot.\n\n");
304 1.1 bsh cngetc();
305 1.1 bsh printf("rebooting...\n");
306 1.1 bsh cpu_reset();
307 1.1 bsh /* NOTREACHED */
308 1.1 bsh }
309 1.1 bsh /* Disable console buffering */
310 1.1 bsh
311 1.1 bsh /*
312 1.1 bsh * If RB_NOSYNC was not specified sync the discs.
313 1.1 bsh * Note: Unless cold is set to 1 here, syslogd will die during the
314 1.1 bsh * unmount. It looks like syslogd is getting woken up only to find
315 1.1 bsh * that it cannot page part of the binary in as the filesystem has
316 1.1 bsh * been unmounted.
317 1.1 bsh */
318 1.1 bsh if (!(howto & RB_NOSYNC))
319 1.1 bsh bootsync();
320 1.1 bsh
321 1.1 bsh /* Say NO to interrupts */
322 1.1 bsh splhigh();
323 1.1 bsh
324 1.1 bsh /* Do a dump if requested. */
325 1.1 bsh if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
326 1.1 bsh dumpsys();
327 1.1 bsh
328 1.1 bsh /* Run any shutdown hooks */
329 1.1 bsh doshutdownhooks();
330 1.1 bsh
331 1.1 bsh /* Make sure IRQ's are disabled */
332 1.1 bsh IRQdisable;
333 1.1 bsh
334 1.1 bsh if (howto & RB_HALT) {
335 1.1 bsh printf("The operating system has halted.\n");
336 1.1 bsh printf("Please press any key to reboot.\n\n");
337 1.1 bsh cngetc();
338 1.1 bsh }
339 1.1 bsh printf("rebooting...\n");
340 1.1 bsh cpu_reset();
341 1.1 bsh /* NOTREACHED */
342 1.1 bsh }
343 1.1 bsh #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v))
344 1.1 bsh
345 1.1 bsh /*
346 1.1 bsh * u_int initarm(...)
347 1.1 bsh *
348 1.1 bsh * Initial entry point on startup. This gets called before main() is
349 1.1 bsh * entered.
350 1.1 bsh * It should be responsible for setting up everything that must be
351 1.1 bsh * in place when main is called.
352 1.1 bsh * This includes
353 1.1 bsh * Taking a copy of the boot configuration structure.
354 1.1 bsh * Initialising the physical console so characters can be printed.
355 1.1 bsh * Setting up page tables for the kernel
356 1.1 bsh * Relocating the kernel to the bottom of physical memory
357 1.1 bsh */
358 1.1 bsh
359 1.1 bsh u_int
360 1.1 bsh initarm(void *arg)
361 1.1 bsh {
362 1.1 bsh int loop;
363 1.1 bsh int loop1;
364 1.1 bsh u_int l1pagetable;
365 1.1 bsh extern int etext asm("_etext");
366 1.1 bsh extern int end asm("_end");
367 1.1 bsh pv_addr_t kernel_l1pt;
368 1.1 bsh pv_addr_t kernel_ptpt;
369 1.1 bsh struct s3c2xx0_softc temp_softc; /* used to initialize IO regs */
370 1.1 bsh int progress_counter = 0;
371 1.1 bsh #ifdef MEMORY_DISK_DYNAMIC
372 1.1 bsh void *md_root_start, *md_root_rom;
373 1.1 bsh #endif
374 1.1 bsh
375 1.1 bsh #define LEDSTEP() __LED(progress_counter++)
376 1.1 bsh
377 1.1 bsh #define pdatc (*(volatile uint8_t *)(S3C2800_GPIO_BASE+GPIO_PDATC))
378 1.1 bsh #define __LED(x) (pdatc = (pdatc & ~0x07) | (~(x) & 0x07))
379 1.1 bsh
380 1.1 bsh LEDSTEP();
381 1.1 bsh /*
382 1.1 bsh * Heads up ... Setup the CPU / MMU / TLB functions
383 1.1 bsh */
384 1.1 bsh if (set_cpufuncs())
385 1.1 bsh panic("cpu not recognized!");
386 1.1 bsh
387 1.1 bsh LEDSTEP();
388 1.1 bsh /*
389 1.1 bsh * prepare fake bus space tag
390 1.1 bsh */
391 1.1 bsh bootstrap_bs_tag = s3c2xx0_bs_tag;
392 1.1 bsh bootstrap_bs_tag.bs_map = bootstrap_bs_map;
393 1.1 bsh temp_softc.sc_iot = &bootstrap_bs_tag;
394 1.1 bsh s3c2xx0_softc = &temp_softc;
395 1.1 bsh
396 1.1 bsh
397 1.1 bsh bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_GPIO_BASE,
398 1.1 bsh S3C2800_GPIO_SIZE, 0, &temp_softc.sc_gpio_ioh);
399 1.1 bsh bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_INTCTL_BASE,
400 1.1 bsh S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_intctl_ioh);
401 1.1 bsh
402 1.1 bsh #undef __LED
403 1.1 bsh #define __LED(x) bus_space_write_1( &bootstrap_bs_tag, temp_softc.sc_gpio_ioh, \
404 1.1 bsh GPIO_PDATC, (~(x) & 0x07) | \
405 1.1 bsh (bus_space_read_1( &bootstrap_bs_tag, \
406 1.1 bsh temp_softc.sc_gpio_ioh, GPIO_PDATC ) & ~0x07) )
407 1.1 bsh
408 1.1 bsh LEDSTEP();
409 1.1 bsh
410 1.1 bsh /* Disable all peripheral interrupts */
411 1.1 bsh bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_intctl_ioh,
412 1.1 bsh INTCTL_INTMSK, 0);
413 1.1 bsh
414 1.1 bsh consinit();
415 1.1 bsh printf("consinit done\n");
416 1.1 bsh
417 1.1 bsh #ifdef KGDB
418 1.1 bsh LEDSTEP();
419 1.1 bsh kgdb_port_init();
420 1.1 bsh #endif
421 1.1 bsh LEDSTEP();
422 1.1 bsh
423 1.1 bsh /* Talk to the user */
424 1.1 bsh printf("\nNetBSD/evbarm (SMDK2800) booting ...\n");
425 1.1 bsh
426 1.1 bsh /*
427 1.1 bsh * Ok we have the following memory map
428 1.1 bsh *
429 1.1 bsh * Physical Address Range Description
430 1.1 bsh * ----------------------- ----------------------------------
431 1.1 bsh * 0x00000000 - 0x00ffffff Intel flash Memory (16MB)
432 1.1 bsh * 0x02000000 - 0x020fffff AMD flash Memory (1MB)
433 1.1 bsh * or (depend on DIPSW setting)
434 1.1 bsh * 0x00000000 - 0x000fffff AMD flash Memory (1MB)
435 1.1 bsh * 0x02000000 - 0x02ffffff Intel flash Memory (16MB)
436 1.1 bsh *
437 1.1 bsh * 0x08000000 - 0x09ffffff SDRAM (32MB)
438 1.1 bsh * 0x20000000 - 0x3fffffff PCI space
439 1.1 bsh *
440 1.1 bsh * The initarm() has the responsibility for creating the kernel
441 1.1 bsh * page tables.
442 1.1 bsh * It must also set up various memory pointers that are used
443 1.1 bsh * by pmap etc.
444 1.1 bsh */
445 1.1 bsh
446 1.1 bsh /* Fake bootconfig structure for the benefit of pmap.c */
447 1.1 bsh /* XXX must make the memory description h/w independent */
448 1.1 bsh bootconfig.dramblocks = 1;
449 1.1 bsh bootconfig.dram[0].address = SDRAM_START;
450 1.2 thorpej bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE;
451 1.1 bsh
452 1.1 bsh /*
453 1.1 bsh * Set up the variables that define the availablilty of
454 1.1 bsh * physical memory. For now, we're going to set
455 1.1 bsh * physical_freestart to 0x08200000 (where the kernel
456 1.1 bsh * was loaded), and allocate the memory we need downwards.
457 1.1 bsh * If we get too close to the bottom of SDRAM, we
458 1.1 bsh * will panic. We will update physical_freestart and
459 1.1 bsh * physical_freeend later to reflect what pmap_bootstrap()
460 1.1 bsh * wants to see.
461 1.1 bsh *
462 1.1 bsh * XXX pmap_bootstrap() needs an enema.
463 1.1 bsh */
464 1.1 bsh physical_start = bootconfig.dram[0].address;
465 1.2 thorpej physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
466 1.1 bsh #ifdef MEMORY_DISK_DYNAMIC
467 1.1 bsh /* Reserve for ram disk */
468 1.1 bsh printf("Reserve %d bytes for memory disk\n", MD_ROOT_SIZE * L1_S_SIZE);
469 1.1 bsh physical_end -= MD_ROOT_SIZE * L1_S_SIZE;
470 1.1 bsh #endif
471 1.1 bsh
472 1.1 bsh physical_freestart = 0x08000000UL; /* XXX */
473 1.1 bsh physical_freeend = 0x08200000UL;
474 1.1 bsh
475 1.2 thorpej physmem = (physical_end - physical_start) / PAGE_SIZE;
476 1.1 bsh
477 1.1 bsh /* Tell the user about the memory */
478 1.1 bsh printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
479 1.1 bsh physical_start, physical_end - 1);
480 1.1 bsh
481 1.1 bsh /*
482 1.1 bsh * XXX
483 1.1 bsh * Okay, the kernel starts 2MB in from the bottom of physical
484 1.1 bsh * memory. We are going to allocate our bootstrap pages downwards
485 1.1 bsh * from there.
486 1.1 bsh *
487 1.1 bsh * We need to allocate some fixed page tables to get the kernel
488 1.1 bsh * going. We allocate one page directory and a number of page
489 1.1 bsh * tables and store the physical addresses in the kernel_pt_table
490 1.1 bsh * array.
491 1.1 bsh *
492 1.1 bsh * The kernel page directory must be on a 16K boundary. The page
493 1.1 bsh * tables must be on 4K bounaries. What we do is allocate the
494 1.1 bsh * page directory on the first 16K boundary that we encounter, and
495 1.1 bsh * the page tables on 4K boundaries otherwise. Since we allocate
496 1.1 bsh * at least 3 L2 page tables, we are guaranteed to encounter at
497 1.1 bsh * least one 16K aligned region.
498 1.1 bsh */
499 1.1 bsh
500 1.1 bsh #ifdef VERBOSE_INIT_ARM
501 1.1 bsh printf("Allocating page tables\n");
502 1.1 bsh #endif
503 1.1 bsh
504 1.2 thorpej free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
505 1.1 bsh
506 1.1 bsh #ifdef VERBOSE_INIT_ARM
507 1.1 bsh printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
508 1.1 bsh physical_freestart, free_pages, free_pages);
509 1.1 bsh #endif
510 1.1 bsh
511 1.1 bsh /* Define a macro to simplify memory allocation */
512 1.1 bsh #define valloc_pages(var, np) \
513 1.1 bsh alloc_pages((var).pv_pa, (np)); \
514 1.1 bsh (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
515 1.1 bsh
516 1.1 bsh #define alloc_pages(var, np) \
517 1.2 thorpej physical_freeend -= ((np) * PAGE_SIZE); \
518 1.1 bsh if (physical_freeend < physical_freestart) \
519 1.1 bsh panic("initarm: out of memory"); \
520 1.1 bsh (var) = physical_freeend; \
521 1.1 bsh free_pages -= (np); \
522 1.2 thorpej memset((char *)(var), 0, ((np) * PAGE_SIZE));
523 1.1 bsh
524 1.1 bsh loop1 = 0;
525 1.1 bsh kernel_l1pt.pv_pa = 0;
526 1.1 bsh for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
527 1.1 bsh /* Are we 16KB aligned for an L1 ? */
528 1.1 bsh if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
529 1.1 bsh && kernel_l1pt.pv_pa == 0) {
530 1.2 thorpej valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
531 1.1 bsh } else {
532 1.1 bsh alloc_pages(kernel_pt_table[loop1].pv_pa,
533 1.2 thorpej L2_TABLE_SIZE / PAGE_SIZE);
534 1.1 bsh kernel_pt_table[loop1].pv_va =
535 1.1 bsh kernel_pt_table[loop1].pv_pa;
536 1.1 bsh ++loop1;
537 1.1 bsh }
538 1.1 bsh }
539 1.1 bsh
540 1.1 bsh /* This should never be able to happen but better confirm that. */
541 1.1 bsh if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0)
542 1.1 bsh panic("initarm: Failed to align the kernel page directory\n");
543 1.1 bsh
544 1.1 bsh /*
545 1.1 bsh * Allocate a page for the system page mapped to V0x00000000
546 1.1 bsh * This page will just contain the system vectors and can be
547 1.1 bsh * shared by all processes.
548 1.1 bsh */
549 1.1 bsh alloc_pages(systempage.pv_pa, 1);
550 1.1 bsh
551 1.1 bsh /* Allocate a page for the page table to map kernel page tables. */
552 1.2 thorpej valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE);
553 1.1 bsh
554 1.1 bsh /* Allocate stacks for all modes */
555 1.1 bsh valloc_pages(irqstack, IRQ_STACK_SIZE);
556 1.1 bsh valloc_pages(abtstack, ABT_STACK_SIZE);
557 1.1 bsh valloc_pages(undstack, UND_STACK_SIZE);
558 1.1 bsh valloc_pages(kernelstack, UPAGES);
559 1.1 bsh
560 1.1 bsh #ifdef VERBOSE_INIT_ARM
561 1.1 bsh printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
562 1.1 bsh irqstack.pv_va);
563 1.1 bsh printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
564 1.1 bsh abtstack.pv_va);
565 1.1 bsh printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
566 1.1 bsh undstack.pv_va);
567 1.1 bsh printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
568 1.1 bsh kernelstack.pv_va);
569 1.1 bsh #endif
570 1.1 bsh
571 1.2 thorpej alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
572 1.1 bsh
573 1.1 bsh LEDSTEP();
574 1.1 bsh
575 1.1 bsh /*
576 1.1 bsh * Ok we have allocated physical pages for the primary kernel
577 1.1 bsh * page tables
578 1.1 bsh */
579 1.1 bsh
580 1.1 bsh #ifdef VERBOSE_INIT_ARM
581 1.1 bsh printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
582 1.1 bsh #endif
583 1.1 bsh
584 1.1 bsh /*
585 1.1 bsh * Now we start construction of the L1 page table
586 1.1 bsh * We start by mapping the L2 page tables into the L1.
587 1.1 bsh * This means that we can replace L1 mappings later on if necessary
588 1.1 bsh */
589 1.1 bsh l1pagetable = kernel_l1pt.pv_pa;
590 1.1 bsh
591 1.1 bsh /* Map the L2 pages tables in the L1 page table */
592 1.1 bsh pmap_link_l2pt(l1pagetable, 0x00000000,
593 1.1 bsh &kernel_pt_table[KERNEL_PT_SYS]);
594 1.1 bsh for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
595 1.1 bsh pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
596 1.1 bsh &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
597 1.1 bsh for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
598 1.1 bsh pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
599 1.1 bsh &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
600 1.1 bsh pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
601 1.1 bsh
602 1.1 bsh /* update the top of the kernel VM */
603 1.1 bsh pmap_curmaxkvaddr =
604 1.1 bsh KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
605 1.1 bsh
606 1.1 bsh #ifdef VERBOSE_INIT_ARM
607 1.1 bsh printf("Mapping kernel\n");
608 1.1 bsh #endif
609 1.1 bsh
610 1.1 bsh /* Now we fill in the L2 pagetable for the kernel static code/data */
611 1.1 bsh {
612 1.1 bsh size_t textsize = (uintptr_t) & etext - KERNEL_TEXT_BASE;
613 1.1 bsh size_t totalsize = (uintptr_t) & end - KERNEL_TEXT_BASE;
614 1.1 bsh u_int logical;
615 1.1 bsh
616 1.1 bsh textsize = (textsize + PGOFSET) & ~PGOFSET;
617 1.1 bsh totalsize = (totalsize + PGOFSET) & ~PGOFSET;
618 1.1 bsh
619 1.1 bsh logical = 0x00200000; /* offset of kernel in RAM */
620 1.1 bsh
621 1.1 bsh logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
622 1.1 bsh physical_start + logical, textsize,
623 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
624 1.1 bsh logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
625 1.1 bsh physical_start + logical, totalsize - textsize,
626 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
627 1.1 bsh }
628 1.1 bsh
629 1.1 bsh #ifdef VERBOSE_INIT_ARM
630 1.1 bsh printf("Constructing L2 page tables\n");
631 1.1 bsh #endif
632 1.1 bsh
633 1.1 bsh /* Map the stack pages */
634 1.1 bsh pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
635 1.2 thorpej IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
636 1.2 thorpej PTE_CACHE);
637 1.1 bsh pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
638 1.2 thorpej ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
639 1.2 thorpej PTE_CACHE);
640 1.1 bsh pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
641 1.2 thorpej UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
642 1.2 thorpej PTE_CACHE);
643 1.1 bsh pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
644 1.2 thorpej UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
645 1.1 bsh
646 1.1 bsh pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
647 1.1 bsh L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
648 1.1 bsh
649 1.1 bsh /* Map the page table that maps the kernel pages */
650 1.1 bsh pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
651 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
652 1.1 bsh
653 1.1 bsh /*
654 1.1 bsh * Map entries in the page table used to map PTE's
655 1.1 bsh * Basically every kernel page table gets mapped here
656 1.1 bsh */
657 1.1 bsh /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
658 1.1 bsh for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) {
659 1.1 bsh pmap_map_entry(l1pagetable,
660 1.1 bsh PTE_BASE + ((KERNEL_BASE +
661 1.1 bsh (loop * 0x00400000)) >> (PGSHIFT - 2)),
662 1.1 bsh kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
663 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
664 1.1 bsh }
665 1.1 bsh pmap_map_entry(l1pagetable,
666 1.1 bsh PTE_BASE + (PTE_BASE >> (PGSHIFT - 2)),
667 1.1 bsh kernel_ptpt.pv_pa, VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
668 1.1 bsh pmap_map_entry(l1pagetable,
669 1.1 bsh PTE_BASE + (0x00000000 >> (PGSHIFT - 2)),
670 1.1 bsh kernel_pt_table[KERNEL_PT_SYS].pv_pa,
671 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
672 1.1 bsh for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
673 1.1 bsh pmap_map_entry(l1pagetable,
674 1.1 bsh PTE_BASE + ((KERNEL_VM_BASE +
675 1.1 bsh (loop * 0x00400000)) >> (PGSHIFT - 2)),
676 1.1 bsh kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
677 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
678 1.1 bsh
679 1.1 bsh /* Map the vector page. */
680 1.1 bsh #if 1
681 1.1 bsh /* MULTI-ICE requires that page 0 is NC/NB so that it can download the
682 1.1 bsh * cache-clean code there. */
683 1.1 bsh pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
684 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
685 1.1 bsh #else
686 1.1 bsh pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
687 1.1 bsh VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
688 1.1 bsh #endif
689 1.1 bsh
690 1.1 bsh #if 0
691 1.1 bsh /* Map the core memory needed before autoconfig */
692 1.1 bsh loop = 0;
693 1.1 bsh while (l1_sec_table[loop].size) {
694 1.1 bsh vm_size_t sz;
695 1.1 bsh
696 1.1 bsh #ifdef VERBOSE_INIT_ARM
697 1.1 bsh printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
698 1.1 bsh l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
699 1.1 bsh l1_sec_table[loop].va);
700 1.1 bsh #endif
701 1.1 bsh for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
702 1.1 bsh pmap_map_section(l1pagetable,
703 1.1 bsh l1_sec_table[loop].va + sz,
704 1.1 bsh l1_sec_table[loop].pa + sz,
705 1.1 bsh l1_sec_table[loop].prot,
706 1.1 bsh l1_sec_table[loop].cache);
707 1.1 bsh ++loop;
708 1.1 bsh }
709 1.1 bsh #endif
710 1.1 bsh
711 1.1 bsh #ifdef MEMORY_DISK_DYNAMIC
712 1.1 bsh /* Map ram for MD root This will overwrite old page table */
713 1.1 bsh bootstrap_bs_map(&bootstrap_bs_tag, physical_end,
714 1.1 bsh MD_ROOT_SIZE * L1_S_SIZE, 0, (bus_space_handle_t *) & md_root_start);
715 1.1 bsh /* map MD root image on ROM */
716 1.1 bsh bootstrap_bs_map(&bootstrap_bs_tag, MD_ROOT_START,
717 1.1 bsh MD_ROOT_SIZE * L1_S_SIZE, 0, (bus_space_handle_t *) & md_root_rom);
718 1.1 bsh
719 1.1 bsh #endif
720 1.1 bsh /*
721 1.1 bsh * map integrated peripherals at same address in l1pagetable
722 1.1 bsh * so that we can continue to use console.
723 1.1 bsh */
724 1.1 bsh copy_io_area_map((pd_entry_t *)l1pagetable);
725 1.1 bsh
726 1.1 bsh /*
727 1.1 bsh * Now we have the real page tables in place so we can switch to them.
728 1.1 bsh * Once this is done we will be running with the REAL kernel page
729 1.1 bsh * tables.
730 1.1 bsh */
731 1.1 bsh
732 1.1 bsh /*
733 1.1 bsh * Update the physical_freestart/physical_freeend/free_pages
734 1.1 bsh * variables.
735 1.1 bsh */
736 1.1 bsh {
737 1.1 bsh physical_freestart = physical_start +
738 1.1 bsh (((((uintptr_t) & end) + PGOFSET) & ~PGOFSET) -
739 1.1 bsh KERNEL_BASE);
740 1.1 bsh physical_freeend = physical_end;
741 1.2 thorpej free_pages =
742 1.2 thorpej (physical_freeend - physical_freestart) / PAGE_SIZE;
743 1.1 bsh }
744 1.1 bsh
745 1.1 bsh /* Switch tables */
746 1.1 bsh #ifdef VERBOSE_INIT_ARM
747 1.1 bsh printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
748 1.1 bsh physical_freestart, free_pages, free_pages);
749 1.1 bsh printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
750 1.1 bsh #endif
751 1.1 bsh LEDSTEP();
752 1.1 bsh setttb(kernel_l1pt.pv_pa);
753 1.1 bsh cpu_tlb_flushID();
754 1.1 bsh
755 1.1 bsh #ifdef VERBOSE_INIT_ARM
756 1.1 bsh printf("done!\n");
757 1.1 bsh #endif
758 1.1 bsh
759 1.1 bsh #ifdef MEMORY_DISK_DYNAMIC
760 1.1 bsh memcpy(md_root_start, md_root_rom, MD_ROOT_SIZE * L1_S_SIZE);
761 1.1 bsh md_root_setconf(md_root_start, MD_ROOT_SIZE * L1_S_SIZE);
762 1.1 bsh #endif
763 1.1 bsh
764 1.1 bsh #if 0
765 1.1 bsh /*
766 1.1 bsh * The IFPGA registers have just moved.
767 1.1 bsh * Detach the diagnostic serial port and reattach at the new address.
768 1.1 bsh */
769 1.1 bsh plcomcndetach();
770 1.1 bsh /*
771 1.1 bsh * XXX this should only be done in main() but it useful to
772 1.1 bsh * have output earlier ...
773 1.1 bsh */
774 1.1 bsh consinit();
775 1.1 bsh #endif
776 1.1 bsh
777 1.1 bsh LEDSTEP();
778 1.1 bsh #ifdef VERBOSE_INIT_ARM
779 1.1 bsh printf("bootstrap done.\n");
780 1.1 bsh #endif
781 1.1 bsh
782 1.1 bsh arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
783 1.1 bsh
784 1.1 bsh /*
785 1.1 bsh * Pages were allocated during the secondary bootstrap for the
786 1.1 bsh * stacks for different CPU modes.
787 1.1 bsh * We must now set the r13 registers in the different CPU modes to
788 1.1 bsh * point to these stacks.
789 1.1 bsh * Since the ARM stacks use STMFD etc. we must set r13 to the top end
790 1.1 bsh * of the stack memory.
791 1.1 bsh */
792 1.1 bsh printf("init subsystems: stacks ");
793 1.1 bsh
794 1.2 thorpej set_stackptr(PSR_IRQ32_MODE,
795 1.2 thorpej irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
796 1.2 thorpej set_stackptr(PSR_ABT32_MODE,
797 1.2 thorpej abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
798 1.2 thorpej set_stackptr(PSR_UND32_MODE,
799 1.2 thorpej undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
800 1.1 bsh
801 1.1 bsh LEDSTEP();
802 1.1 bsh
803 1.1 bsh /*
804 1.1 bsh * Well we should set a data abort handler.
805 1.1 bsh * Once things get going this will change as we will need a proper
806 1.1 bsh * handler.
807 1.1 bsh * Until then we will use a handler that just panics but tells us
808 1.1 bsh * why.
809 1.1 bsh * Initialisation of the vectors will just panic on a data abort.
810 1.1 bsh * This just fills in a slighly better one.
811 1.1 bsh */
812 1.1 bsh printf("vectors ");
813 1.1 bsh data_abort_handler_address = (u_int)data_abort_handler;
814 1.1 bsh prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
815 1.1 bsh undefined_handler_address = (u_int)undefinedinstruction_bounce;
816 1.1 bsh
817 1.1 bsh /* Initialise the undefined instruction handlers */
818 1.1 bsh printf("undefined ");
819 1.1 bsh undefined_init();
820 1.1 bsh
821 1.1 bsh LEDSTEP();
822 1.1 bsh
823 1.1 bsh /* Load memory into UVM. */
824 1.1 bsh printf("page ");
825 1.1 bsh uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
826 1.1 bsh uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
827 1.1 bsh atop(physical_freestart), atop(physical_freeend),
828 1.1 bsh VM_FREELIST_DEFAULT);
829 1.1 bsh
830 1.1 bsh LEDSTEP();
831 1.1 bsh /* Boot strap pmap telling it where the kernel page table is */
832 1.1 bsh printf("pmap ");
833 1.1 bsh pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
834 1.1 bsh
835 1.1 bsh LEDSTEP();
836 1.1 bsh
837 1.1 bsh /* Setup the IRQ system */
838 1.1 bsh printf("irq ");
839 1.1 bsh /* XXX irq_init(); */
840 1.1 bsh
841 1.1 bsh printf("done.\n");
842 1.1 bsh
843 1.1 bsh boothowto |= RB_SINGLE | RB_KDB | RB_ASKNAME;
844 1.1 bsh
845 1.1 bsh #ifdef IPKDB
846 1.1 bsh /* Initialise ipkdb */
847 1.1 bsh ipkdb_init();
848 1.1 bsh if (boothowto & RB_KDB)
849 1.1 bsh ipkdb_connect(0);
850 1.1 bsh #endif
851 1.1 bsh
852 1.1 bsh #ifdef KGDB
853 1.1 bsh if (boothowto & RB_KDB) {
854 1.1 bsh kgdb_debug_init = 1;
855 1.1 bsh kgdb_connect(1);
856 1.1 bsh }
857 1.1 bsh #endif
858 1.1 bsh
859 1.1 bsh #ifdef DDB
860 1.1 bsh db_machine_init();
861 1.1 bsh
862 1.1 bsh /* Firmware doesn't load symbols. */
863 1.1 bsh ddb_init(0, NULL, NULL);
864 1.1 bsh
865 1.1 bsh if (boothowto & RB_KDB)
866 1.1 bsh Debugger();
867 1.1 bsh #endif
868 1.1 bsh
869 1.1 bsh /* We return the new stack pointer address */
870 1.1 bsh return (kernelstack.pv_va + USPACE_SVC_STACK_TOP);
871 1.1 bsh }
872 1.1 bsh #ifndef SSCOM_FREQ
873 1.1 bsh /* our PCLK is 50MHz */
874 1.1 bsh #define SSCOM_FREQ 50000000
875 1.1 bsh #endif
876 1.1 bsh
877 1.1 bsh void
878 1.1 bsh consinit(void)
879 1.1 bsh {
880 1.1 bsh static int consinit_done = 0;
881 1.1 bsh bus_space_tag_t iot = s3c2xx0_softc->sc_iot;
882 1.1 bsh
883 1.1 bsh if (consinit_done != 0)
884 1.1 bsh return;
885 1.1 bsh
886 1.1 bsh consinit_done = 1;
887 1.1 bsh
888 1.1 bsh #if NSSCOM > 0
889 1.1 bsh #ifdef SSCOM0CONSOLE
890 1.1 bsh if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed,
891 1.1 bsh SSCOM_FREQ, comcnmode))
892 1.1 bsh return;
893 1.1 bsh #endif
894 1.1 bsh #ifdef SSCOM1CONSOLE
895 1.1 bsh if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed,
896 1.1 bsh SSCOM_FREQ, comcnmode))
897 1.1 bsh return;
898 1.1 bsh #endif
899 1.1 bsh #endif /* NSSCOM */
900 1.1 bsh #if NCOM>0 && defined(CONCOMADDR)
901 1.1 bsh if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed,
902 1.1 bsh COM_FREQ, comcnmode))
903 1.1 bsh panic("can't init serial console @%x", CONCOMADDR);
904 1.1 bsh return;
905 1.1 bsh #endif
906 1.1 bsh
907 1.1 bsh consinit_done = 0;
908 1.1 bsh }
909 1.1 bsh
910 1.1 bsh
911 1.1 bsh #ifdef KGDB
912 1.1 bsh
913 1.1 bsh #if (NSSCOM > 0)
914 1.1 bsh
915 1.1 bsh #ifdef KGDB_DEVNAME
916 1.1 bsh const char kgdb_devname[] = KGDB_DEVNAME;
917 1.1 bsh #else
918 1.1 bsh const char kgdb_devname[] = "";
919 1.1 bsh #endif
920 1.1 bsh
921 1.1 bsh #ifndef KGDB_DEVMODE
922 1.1 bsh #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */
923 1.1 bsh #endif
924 1.1 bsh int kgdb_sscom_mode = KGDB_DEVMODE;
925 1.1 bsh
926 1.1 bsh #endif /* NSSCOM */
927 1.1 bsh
928 1.1 bsh void
929 1.1 bsh kgdb_port_init(void)
930 1.1 bsh {
931 1.1 bsh #if (NSSCOM > 0)
932 1.1 bsh int unit = -1;
933 1.1 bsh
934 1.1 bsh if (strcmp(kgdb_devname, "sscom0") == 0)
935 1.1 bsh unit = 0;
936 1.1 bsh else if (strcmp(kgdb_devname, "sscom1") == 0)
937 1.1 bsh unit = 1;
938 1.1 bsh
939 1.1 bsh if (unit >= 0) {
940 1.1 bsh s3c2800_sscom_kgdb_attach(s3c2xx0_softc->sc_iot,
941 1.1 bsh unit, kgdb_rate, SSCOM_FREQ, kgdb_sscom_mode);
942 1.1 bsh }
943 1.1 bsh #endif
944 1.1 bsh }
945 1.1 bsh #endif
946 1.1 bsh
947 1.1 bsh static __inline
948 1.1 bsh pd_entry_t *
949 1.1 bsh read_ttb(void)
950 1.1 bsh {
951 1.1 bsh long ttb;
952 1.1 bsh
953 1.1 bsh __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb));
954 1.1 bsh
955 1.1 bsh
956 1.1 bsh return (pd_entry_t *)(ttb & ~((1 << 14) - 1));
957 1.1 bsh }
958 1.1 bsh
959 1.1 bsh
960 1.1 bsh static __inline void
961 1.1 bsh writeback_dcache_line(vaddr_t va)
962 1.1 bsh {
963 1.1 bsh /* writeback Dcache line */
964 1.1 bsh /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9
965 1.1 bsh * assume write-through cache, and always flush Dcache instead of
966 1.1 bsh * cleaning it. Since Boot loader maps page table with write-back
967 1.1 bsh * cached, we really need to clean Dcache. */
968 1.1 bsh asm("mcr p15, 0, %0, c7, c10, 1"
969 1.1 bsh : : "r"(va));
970 1.1 bsh }
971 1.1 bsh
972 1.1 bsh static __inline void
973 1.1 bsh clean_dcache_line(vaddr_t va)
974 1.1 bsh {
975 1.1 bsh /* writeback and invalidate Dcache line */
976 1.1 bsh asm("mcr p15, 0, %0, c7, c14, 1"
977 1.1 bsh : : "r"(va));
978 1.1 bsh }
979 1.1 bsh
980 1.1 bsh static vaddr_t section_free = SMDK2800_VBASE_FREE;
981 1.1 bsh
982 1.1 bsh /*
983 1.1 bsh * simple memory mapping function used in early bootstrap stage
984 1.1 bsh * before pmap is initialized.
985 1.1 bsh * This assumes only peripheral registers to map. they are mapped to
986 1.1 bsh * fixed address with section mapping.
987 1.1 bsh */
988 1.1 bsh static int
989 1.1 bsh bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
990 1.1 bsh int flag, bus_space_handle_t * bshp)
991 1.1 bsh {
992 1.1 bsh long offset, sec;
993 1.1 bsh int modified = 0;
994 1.1 bsh pd_entry_t *pagedir = read_ttb();
995 1.1 bsh /* This assumes PA==VA for page directory */
996 1.1 bsh
997 1.1 bsh if (S3C2800_PERIPHERALS <= bpa && bpa < S3C2800_PERIPHERALS + 0x200000) {
998 1.1 bsh offset = bpa - S3C2800_PERIPHERALS;
999 1.1 bsh if (offset < 0 || 2 * L1_S_SIZE < offset)
1000 1.1 bsh panic("bootstrap_bs_map: can't map");
1001 1.1 bsh sec = (SMDK2800_IO_AREA_VBASE + offset) >> L1_S_SHIFT;
1002 1.1 bsh
1003 1.1 bsh /* already mapped? */
1004 1.1 bsh if ((pagedir[sec] & L1_S_FRAME) != (bpa & L1_S_FRAME)) {
1005 1.1 bsh pmap_map_section((vaddr_t)pagedir, sec << L1_S_SHIFT,
1006 1.1 bsh bpa & L1_S_FRAME,
1007 1.1 bsh VM_PROT_READ | VM_PROT_WRITE,
1008 1.1 bsh PTE_NOCACHE);
1009 1.1 bsh
1010 1.1 bsh writeback_dcache_line((vaddr_t)&pagedir[sec]);
1011 1.1 bsh modified = 1;
1012 1.1 bsh }
1013 1.1 bsh *bshp = (bus_space_handle_t)(SMDK2800_IO_AREA_VBASE + offset);
1014 1.1 bsh } else {
1015 1.1 bsh vaddr_t va;
1016 1.1 bsh bus_addr_t pa;
1017 1.1 bsh int cacheable = flag & BUS_SPACE_MAP_CACHEABLE;
1018 1.1 bsh
1019 1.1 bsh
1020 1.1 bsh size = (size + L1_S_OFFSET) & ~L1_S_OFFSET;
1021 1.1 bsh pa = bpa & ~L1_S_OFFSET;
1022 1.1 bsh offset = bpa - pa;
1023 1.1 bsh
1024 1.1 bsh va = section_free;
1025 1.1 bsh while (size) {
1026 1.1 bsh pmap_map_section((vaddr_t)pagedir, va,
1027 1.1 bsh pa, VM_PROT_READ | VM_PROT_WRITE,
1028 1.1 bsh cacheable ? PTE_CACHE : PTE_NOCACHE);
1029 1.1 bsh writeback_dcache_line((vaddr_t)& pagedir[va >> L1_S_SHIFT]);
1030 1.1 bsh va += L1_S_SIZE;
1031 1.1 bsh pa += L1_S_SIZE;
1032 1.1 bsh size -= L1_S_SIZE;
1033 1.1 bsh }
1034 1.1 bsh
1035 1.1 bsh *bshp = (bus_space_handle_t)(section_free + offset);
1036 1.1 bsh section_free = va;
1037 1.1 bsh }
1038 1.1 bsh
1039 1.1 bsh
1040 1.1 bsh if (modified) {
1041 1.1 bsh
1042 1.1 bsh cpu_drain_writebuf();
1043 1.1 bsh cpu_tlb_flushD();
1044 1.1 bsh }
1045 1.1 bsh return (0);
1046 1.1 bsh }
1047 1.1 bsh
1048 1.1 bsh static void
1049 1.1 bsh copy_io_area_map(pd_entry_t * new_pd)
1050 1.1 bsh {
1051 1.1 bsh pd_entry_t *cur_pd = read_ttb();
1052 1.1 bsh vaddr_t sec;
1053 1.1 bsh
1054 1.1 bsh for (sec = SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT;
1055 1.1 bsh sec < (section_free >> L1_S_SHIFT); ++sec) {
1056 1.1 bsh new_pd[sec] = cur_pd[sec];
1057 1.1 bsh }
1058 1.1 bsh }
1059