smdk2800_machdep.c revision 1.1
1 /* $NetBSD: smdk2800_machdep.c,v 1.1 2002/11/20 18:06:26 bsh Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Fujitsu Component Limited 5 * Copyright (c) 2002 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 /* 36 * Machine dependant functions for kernel setup for Samsung SMDK2800 37 * derived from integrator_machdep.c 38 */ 39 40 /* 41 * Copyright (c) 2001,2002 ARM Ltd 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. The name of the company may not be used to endorse or promote 53 * products derived from this software without specific prior written 54 * permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 58 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 59 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD 60 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 61 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 62 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 63 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 64 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 65 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 66 * POSSIBILITY OF SUCH DAMAGE. 67 * 68 */ 69 70 /* 71 * Copyright (c) 1997,1998 Mark Brinicombe. 72 * Copyright (c) 1997,1998 Causality Limited. 73 * All rights reserved. 74 * 75 * Redistribution and use in source and binary forms, with or without 76 * modification, are permitted provided that the following conditions 77 * are met: 78 * 1. Redistributions of source code must retain the above copyright 79 * notice, this list of conditions and the following disclaimer. 80 * 2. Redistributions in binary form must reproduce the above copyright 81 * notice, this list of conditions and the following disclaimer in the 82 * documentation and/or other materials provided with the distribution. 83 * 3. All advertising materials mentioning features or use of this software 84 * must display the following acknowledgement: 85 * This product includes software developed by Mark Brinicombe 86 * for the NetBSD Project. 87 * 4. The name of the company nor the name of the author may be used to 88 * endorse or promote products derived from this software without specific 89 * prior written permission. 90 * 91 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 92 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 93 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 94 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 95 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 96 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 97 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 98 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 99 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 100 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 101 * SUCH DAMAGE. 102 * 103 * Machine dependant functions for kernel setup for integrator board 104 * 105 * Created : 24/11/97 106 */ 107 108 #include "opt_ddb.h" 109 #include "opt_kgdb.h" 110 #include "opt_ipkdb.h" 111 #include "opt_pmap_debug.h" 112 #include "opt_md.h" 113 #include "pci.h" 114 115 #include <sys/param.h> 116 #include <sys/device.h> 117 #include <sys/systm.h> 118 #include <sys/kernel.h> 119 #include <sys/exec.h> 120 #include <sys/proc.h> 121 #include <sys/msgbuf.h> 122 #include <sys/reboot.h> 123 #include <sys/termios.h> 124 125 #include <dev/cons.h> 126 #include <dev/md.h> 127 128 #include <machine/db_machdep.h> 129 #include <ddb/db_sym.h> 130 #include <ddb/db_extern.h> 131 #ifdef KGDB 132 #include <sys/kgdb.h> 133 #endif 134 135 #include <machine/bootconfig.h> 136 #include <machine/bus.h> 137 #include <machine/cpu.h> 138 #include <machine/frame.h> 139 #include <machine/intr.h> 140 #include <arm/undefined.h> 141 142 #include <arm/arm32/machdep.h> 143 144 #include <arm/s3c2xx0/s3c2800reg.h> 145 #include <arm/s3c2xx0/s3c2800var.h> 146 147 #ifndef SDRAM_START 148 #define SDRAM_START S3C2800_DBANK0_START 149 #endif 150 #ifndef SDRAM_SIZE 151 #define SDRAM_SIZE (32*1024*1024) 152 #endif 153 154 /* 155 * Address to map I/O registers in early initialize stage. 156 */ 157 #define SMDK2800_IO_AREA_VBASE 0xfd000000 158 #define SMDK2800_VBASE_FREE 0xfd200000 159 160 /* 161 * Address to call from cpu_reset() to reset the machine. 162 * This is machine architecture dependant as it varies depending 163 * on where the ROM appears when you turn the MMU off. 164 */ 165 u_int cpu_reset_address = (u_int)0; 166 167 /* Define various stack sizes in pages */ 168 #define IRQ_STACK_SIZE 1 169 #define ABT_STACK_SIZE 1 170 #ifdef IPKDB 171 #define UND_STACK_SIZE 2 172 #else 173 #define UND_STACK_SIZE 1 174 #endif 175 176 BootConfig bootconfig; /* Boot config storage */ 177 char *boot_args = NULL; 178 char *boot_file = NULL; 179 180 vm_offset_t physical_start; 181 vm_offset_t physical_freestart; 182 vm_offset_t physical_freeend; 183 vm_offset_t physical_end; 184 u_int free_pages; 185 vm_offset_t pagetables_start; 186 int physmem = 0; 187 188 /*int debug_flags;*/ 189 #ifndef PMAP_STATIC_L1S 190 int max_processes = 64; /* Default number */ 191 #endif /* !PMAP_STATIC_L1S */ 192 193 /* Physical and virtual addresses for some global pages */ 194 pv_addr_t systempage; 195 pv_addr_t irqstack; 196 pv_addr_t undstack; 197 pv_addr_t abtstack; 198 pv_addr_t kernelstack; 199 200 vm_offset_t msgbufphys; 201 202 extern u_int data_abort_handler_address; 203 extern u_int prefetch_abort_handler_address; 204 extern u_int undefined_handler_address; 205 206 #ifdef PMAP_DEBUG 207 extern int pmap_debug_level; 208 #endif 209 210 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */ 211 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */ 212 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */ 213 214 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 215 216 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 217 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 218 219 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 220 221 struct user *proc0paddr; 222 223 #ifdef MEMORY_DISK_DYNAMIC 224 #define MD_ROOT_SIZE 4 /* in megabytes */ 225 #define MD_ROOT_START 0x400000/* MD root image in ROM */ 226 #endif 227 228 229 /* Prototypes */ 230 231 void consinit(void); 232 void kgdb_port_init(void); 233 234 static int 235 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 236 int cacheable, bus_space_handle_t * bshp); 237 static void copy_io_area_map(pd_entry_t * new_pd); 238 239 /* A load of console goo. */ 240 #include "vga.h" 241 #if NVGA > 0 242 #include <dev/ic/mc6845reg.h> 243 #include <dev/ic/pcdisplayvar.h> 244 #include <dev/ic/vgareg.h> 245 #include <dev/ic/vgavar.h> 246 #endif 247 248 #include "com.h" 249 #if NCOM > 0 250 #include <dev/ic/comreg.h> 251 #include <dev/ic/comvar.h> 252 #endif 253 254 #include "sscom.h" 255 #if NSSCOM > 0 256 #include "opt_sscom.h" 257 #include <arm/s3c2xx0/sscom_var.h> 258 #endif 259 260 /* 261 * Define the default console speed for the board. This is generally 262 * what the firmware provided with the board defaults to. 263 */ 264 #ifndef CONSPEED 265 #define CONSPEED B115200 /* TTYDEF_SPEED */ 266 #endif 267 #ifndef CONMODE 268 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 269 #endif 270 271 int comcnspeed = CONSPEED; 272 int comcnmode = CONMODE; 273 274 struct bus_space bootstrap_bs_tag; 275 276 /* 277 * void cpu_reboot(int howto, char *bootstr) 278 * 279 * Reboots the system 280 * 281 * Deal with any syncing, unmounting, dumping and shutdown hooks, 282 * then reset the CPU. 283 */ 284 void 285 cpu_reboot(int howto, char *bootstr) 286 { 287 #ifdef DIAGNOSTIC 288 /* info */ 289 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 290 #endif 291 292 cpu_reset_address = (u_int)s3c2800_softreset; 293 294 /* 295 * If we are still cold then hit the air brakes 296 * and crash to earth fast 297 */ 298 if (cold) { 299 doshutdownhooks(); 300 printf("The operating system has halted.\n"); 301 printf("Please press any key to reboot.\n\n"); 302 cngetc(); 303 printf("rebooting...\n"); 304 cpu_reset(); 305 /* NOTREACHED */ 306 } 307 /* Disable console buffering */ 308 309 /* 310 * If RB_NOSYNC was not specified sync the discs. 311 * Note: Unless cold is set to 1 here, syslogd will die during the 312 * unmount. It looks like syslogd is getting woken up only to find 313 * that it cannot page part of the binary in as the filesystem has 314 * been unmounted. 315 */ 316 if (!(howto & RB_NOSYNC)) 317 bootsync(); 318 319 /* Say NO to interrupts */ 320 splhigh(); 321 322 /* Do a dump if requested. */ 323 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 324 dumpsys(); 325 326 /* Run any shutdown hooks */ 327 doshutdownhooks(); 328 329 /* Make sure IRQ's are disabled */ 330 IRQdisable; 331 332 if (howto & RB_HALT) { 333 printf("The operating system has halted.\n"); 334 printf("Please press any key to reboot.\n\n"); 335 cngetc(); 336 } 337 printf("rebooting...\n"); 338 cpu_reset(); 339 /* NOTREACHED */ 340 } 341 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v)) 342 343 /* 344 * u_int initarm(...) 345 * 346 * Initial entry point on startup. This gets called before main() is 347 * entered. 348 * It should be responsible for setting up everything that must be 349 * in place when main is called. 350 * This includes 351 * Taking a copy of the boot configuration structure. 352 * Initialising the physical console so characters can be printed. 353 * Setting up page tables for the kernel 354 * Relocating the kernel to the bottom of physical memory 355 */ 356 357 u_int 358 initarm(void *arg) 359 { 360 int loop; 361 int loop1; 362 u_int l1pagetable; 363 extern int etext asm("_etext"); 364 extern int end asm("_end"); 365 pv_addr_t kernel_l1pt; 366 pv_addr_t kernel_ptpt; 367 struct s3c2xx0_softc temp_softc; /* used to initialize IO regs */ 368 int progress_counter = 0; 369 #ifdef MEMORY_DISK_DYNAMIC 370 void *md_root_start, *md_root_rom; 371 #endif 372 373 #define LEDSTEP() __LED(progress_counter++) 374 375 #define pdatc (*(volatile uint8_t *)(S3C2800_GPIO_BASE+GPIO_PDATC)) 376 #define __LED(x) (pdatc = (pdatc & ~0x07) | (~(x) & 0x07)) 377 378 LEDSTEP(); 379 /* 380 * Heads up ... Setup the CPU / MMU / TLB functions 381 */ 382 if (set_cpufuncs()) 383 panic("cpu not recognized!"); 384 385 LEDSTEP(); 386 /* 387 * prepare fake bus space tag 388 */ 389 bootstrap_bs_tag = s3c2xx0_bs_tag; 390 bootstrap_bs_tag.bs_map = bootstrap_bs_map; 391 temp_softc.sc_iot = &bootstrap_bs_tag; 392 s3c2xx0_softc = &temp_softc; 393 394 395 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_GPIO_BASE, 396 S3C2800_GPIO_SIZE, 0, &temp_softc.sc_gpio_ioh); 397 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_INTCTL_BASE, 398 S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_intctl_ioh); 399 400 #undef __LED 401 #define __LED(x) bus_space_write_1( &bootstrap_bs_tag, temp_softc.sc_gpio_ioh, \ 402 GPIO_PDATC, (~(x) & 0x07) | \ 403 (bus_space_read_1( &bootstrap_bs_tag, \ 404 temp_softc.sc_gpio_ioh, GPIO_PDATC ) & ~0x07) ) 405 406 LEDSTEP(); 407 408 /* Disable all peripheral interrupts */ 409 bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_intctl_ioh, 410 INTCTL_INTMSK, 0); 411 412 consinit(); 413 printf("consinit done\n"); 414 415 #ifdef KGDB 416 LEDSTEP(); 417 kgdb_port_init(); 418 #endif 419 LEDSTEP(); 420 421 /* Talk to the user */ 422 printf("\nNetBSD/evbarm (SMDK2800) booting ...\n"); 423 424 /* 425 * Ok we have the following memory map 426 * 427 * Physical Address Range Description 428 * ----------------------- ---------------------------------- 429 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB) 430 * 0x02000000 - 0x020fffff AMD flash Memory (1MB) 431 * or (depend on DIPSW setting) 432 * 0x00000000 - 0x000fffff AMD flash Memory (1MB) 433 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB) 434 * 435 * 0x08000000 - 0x09ffffff SDRAM (32MB) 436 * 0x20000000 - 0x3fffffff PCI space 437 * 438 * The initarm() has the responsibility for creating the kernel 439 * page tables. 440 * It must also set up various memory pointers that are used 441 * by pmap etc. 442 */ 443 444 /* Fake bootconfig structure for the benefit of pmap.c */ 445 /* XXX must make the memory description h/w independent */ 446 bootconfig.dramblocks = 1; 447 bootconfig.dram[0].address = SDRAM_START; 448 bootconfig.dram[0].pages = SDRAM_SIZE / NBPG; 449 450 /* 451 * Set up the variables that define the availablilty of 452 * physical memory. For now, we're going to set 453 * physical_freestart to 0x08200000 (where the kernel 454 * was loaded), and allocate the memory we need downwards. 455 * If we get too close to the bottom of SDRAM, we 456 * will panic. We will update physical_freestart and 457 * physical_freeend later to reflect what pmap_bootstrap() 458 * wants to see. 459 * 460 * XXX pmap_bootstrap() needs an enema. 461 */ 462 physical_start = bootconfig.dram[0].address; 463 physical_end = physical_start + (bootconfig.dram[0].pages * NBPG); 464 #ifdef MEMORY_DISK_DYNAMIC 465 /* Reserve for ram disk */ 466 printf("Reserve %d bytes for memory disk\n", MD_ROOT_SIZE * L1_S_SIZE); 467 physical_end -= MD_ROOT_SIZE * L1_S_SIZE; 468 #endif 469 470 physical_freestart = 0x08000000UL; /* XXX */ 471 physical_freeend = 0x08200000UL; 472 473 physmem = (physical_end - physical_start) / NBPG; 474 475 /* Tell the user about the memory */ 476 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 477 physical_start, physical_end - 1); 478 479 /* 480 * XXX 481 * Okay, the kernel starts 2MB in from the bottom of physical 482 * memory. We are going to allocate our bootstrap pages downwards 483 * from there. 484 * 485 * We need to allocate some fixed page tables to get the kernel 486 * going. We allocate one page directory and a number of page 487 * tables and store the physical addresses in the kernel_pt_table 488 * array. 489 * 490 * The kernel page directory must be on a 16K boundary. The page 491 * tables must be on 4K bounaries. What we do is allocate the 492 * page directory on the first 16K boundary that we encounter, and 493 * the page tables on 4K boundaries otherwise. Since we allocate 494 * at least 3 L2 page tables, we are guaranteed to encounter at 495 * least one 16K aligned region. 496 */ 497 498 #ifdef VERBOSE_INIT_ARM 499 printf("Allocating page tables\n"); 500 #endif 501 502 free_pages = (physical_freeend - physical_freestart) / NBPG; 503 504 #ifdef VERBOSE_INIT_ARM 505 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 506 physical_freestart, free_pages, free_pages); 507 #endif 508 509 /* Define a macro to simplify memory allocation */ 510 #define valloc_pages(var, np) \ 511 alloc_pages((var).pv_pa, (np)); \ 512 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 513 514 #define alloc_pages(var, np) \ 515 physical_freeend -= ((np) * NBPG); \ 516 if (physical_freeend < physical_freestart) \ 517 panic("initarm: out of memory"); \ 518 (var) = physical_freeend; \ 519 free_pages -= (np); \ 520 memset((char *)(var), 0, ((np) * NBPG)); 521 522 loop1 = 0; 523 kernel_l1pt.pv_pa = 0; 524 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 525 /* Are we 16KB aligned for an L1 ? */ 526 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 527 && kernel_l1pt.pv_pa == 0) { 528 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / NBPG); 529 } else { 530 alloc_pages(kernel_pt_table[loop1].pv_pa, 531 L2_TABLE_SIZE / NBPG); 532 kernel_pt_table[loop1].pv_va = 533 kernel_pt_table[loop1].pv_pa; 534 ++loop1; 535 } 536 } 537 538 /* This should never be able to happen but better confirm that. */ 539 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0) 540 panic("initarm: Failed to align the kernel page directory\n"); 541 542 /* 543 * Allocate a page for the system page mapped to V0x00000000 544 * This page will just contain the system vectors and can be 545 * shared by all processes. 546 */ 547 alloc_pages(systempage.pv_pa, 1); 548 549 /* Allocate a page for the page table to map kernel page tables. */ 550 valloc_pages(kernel_ptpt, L2_TABLE_SIZE / NBPG); 551 552 /* Allocate stacks for all modes */ 553 valloc_pages(irqstack, IRQ_STACK_SIZE); 554 valloc_pages(abtstack, ABT_STACK_SIZE); 555 valloc_pages(undstack, UND_STACK_SIZE); 556 valloc_pages(kernelstack, UPAGES); 557 558 #ifdef VERBOSE_INIT_ARM 559 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 560 irqstack.pv_va); 561 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 562 abtstack.pv_va); 563 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 564 undstack.pv_va); 565 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 566 kernelstack.pv_va); 567 #endif 568 569 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG); 570 571 LEDSTEP(); 572 573 /* 574 * Ok we have allocated physical pages for the primary kernel 575 * page tables 576 */ 577 578 #ifdef VERBOSE_INIT_ARM 579 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 580 #endif 581 582 /* 583 * Now we start construction of the L1 page table 584 * We start by mapping the L2 page tables into the L1. 585 * This means that we can replace L1 mappings later on if necessary 586 */ 587 l1pagetable = kernel_l1pt.pv_pa; 588 589 /* Map the L2 pages tables in the L1 page table */ 590 pmap_link_l2pt(l1pagetable, 0x00000000, 591 &kernel_pt_table[KERNEL_PT_SYS]); 592 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 593 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 594 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 595 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 596 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 597 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 598 pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt); 599 600 /* update the top of the kernel VM */ 601 pmap_curmaxkvaddr = 602 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 603 604 #ifdef VERBOSE_INIT_ARM 605 printf("Mapping kernel\n"); 606 #endif 607 608 /* Now we fill in the L2 pagetable for the kernel static code/data */ 609 { 610 size_t textsize = (uintptr_t) & etext - KERNEL_TEXT_BASE; 611 size_t totalsize = (uintptr_t) & end - KERNEL_TEXT_BASE; 612 u_int logical; 613 614 textsize = (textsize + PGOFSET) & ~PGOFSET; 615 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 616 617 logical = 0x00200000; /* offset of kernel in RAM */ 618 619 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 620 physical_start + logical, textsize, 621 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 622 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 623 physical_start + logical, totalsize - textsize, 624 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 625 } 626 627 #ifdef VERBOSE_INIT_ARM 628 printf("Constructing L2 page tables\n"); 629 #endif 630 631 /* Map the stack pages */ 632 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 633 IRQ_STACK_SIZE * NBPG, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 634 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 635 ABT_STACK_SIZE * NBPG, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 636 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 637 UND_STACK_SIZE * NBPG, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 638 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 639 UPAGES * NBPG, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 640 641 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 642 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 643 644 /* Map the page table that maps the kernel pages */ 645 pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa, 646 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 647 648 /* 649 * Map entries in the page table used to map PTE's 650 * Basically every kernel page table gets mapped here 651 */ 652 /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */ 653 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) { 654 pmap_map_entry(l1pagetable, 655 PTE_BASE + ((KERNEL_BASE + 656 (loop * 0x00400000)) >> (PGSHIFT - 2)), 657 kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa, 658 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 659 } 660 pmap_map_entry(l1pagetable, 661 PTE_BASE + (PTE_BASE >> (PGSHIFT - 2)), 662 kernel_ptpt.pv_pa, VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 663 pmap_map_entry(l1pagetable, 664 PTE_BASE + (0x00000000 >> (PGSHIFT - 2)), 665 kernel_pt_table[KERNEL_PT_SYS].pv_pa, 666 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 667 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 668 pmap_map_entry(l1pagetable, 669 PTE_BASE + ((KERNEL_VM_BASE + 670 (loop * 0x00400000)) >> (PGSHIFT - 2)), 671 kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa, 672 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 673 674 /* Map the vector page. */ 675 #if 1 676 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 677 * cache-clean code there. */ 678 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 679 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 680 #else 681 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 682 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 683 #endif 684 685 #if 0 686 /* Map the core memory needed before autoconfig */ 687 loop = 0; 688 while (l1_sec_table[loop].size) { 689 vm_size_t sz; 690 691 #ifdef VERBOSE_INIT_ARM 692 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa, 693 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1, 694 l1_sec_table[loop].va); 695 #endif 696 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE) 697 pmap_map_section(l1pagetable, 698 l1_sec_table[loop].va + sz, 699 l1_sec_table[loop].pa + sz, 700 l1_sec_table[loop].prot, 701 l1_sec_table[loop].cache); 702 ++loop; 703 } 704 #endif 705 706 #ifdef MEMORY_DISK_DYNAMIC 707 /* Map ram for MD root This will overwrite old page table */ 708 bootstrap_bs_map(&bootstrap_bs_tag, physical_end, 709 MD_ROOT_SIZE * L1_S_SIZE, 0, (bus_space_handle_t *) & md_root_start); 710 /* map MD root image on ROM */ 711 bootstrap_bs_map(&bootstrap_bs_tag, MD_ROOT_START, 712 MD_ROOT_SIZE * L1_S_SIZE, 0, (bus_space_handle_t *) & md_root_rom); 713 714 #endif 715 /* 716 * map integrated peripherals at same address in l1pagetable 717 * so that we can continue to use console. 718 */ 719 copy_io_area_map((pd_entry_t *)l1pagetable); 720 721 /* 722 * Now we have the real page tables in place so we can switch to them. 723 * Once this is done we will be running with the REAL kernel page 724 * tables. 725 */ 726 727 /* 728 * Update the physical_freestart/physical_freeend/free_pages 729 * variables. 730 */ 731 { 732 physical_freestart = physical_start + 733 (((((uintptr_t) & end) + PGOFSET) & ~PGOFSET) - 734 KERNEL_BASE); 735 physical_freeend = physical_end; 736 free_pages = (physical_freeend - physical_freestart) / NBPG; 737 } 738 739 /* Switch tables */ 740 #ifdef VERBOSE_INIT_ARM 741 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 742 physical_freestart, free_pages, free_pages); 743 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 744 #endif 745 LEDSTEP(); 746 setttb(kernel_l1pt.pv_pa); 747 cpu_tlb_flushID(); 748 749 #ifdef VERBOSE_INIT_ARM 750 printf("done!\n"); 751 #endif 752 753 #ifdef MEMORY_DISK_DYNAMIC 754 memcpy(md_root_start, md_root_rom, MD_ROOT_SIZE * L1_S_SIZE); 755 md_root_setconf(md_root_start, MD_ROOT_SIZE * L1_S_SIZE); 756 #endif 757 758 #if 0 759 /* 760 * The IFPGA registers have just moved. 761 * Detach the diagnostic serial port and reattach at the new address. 762 */ 763 plcomcndetach(); 764 /* 765 * XXX this should only be done in main() but it useful to 766 * have output earlier ... 767 */ 768 consinit(); 769 #endif 770 771 LEDSTEP(); 772 #ifdef VERBOSE_INIT_ARM 773 printf("bootstrap done.\n"); 774 #endif 775 776 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 777 778 /* 779 * Pages were allocated during the secondary bootstrap for the 780 * stacks for different CPU modes. 781 * We must now set the r13 registers in the different CPU modes to 782 * point to these stacks. 783 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 784 * of the stack memory. 785 */ 786 printf("init subsystems: stacks "); 787 788 set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG); 789 set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG); 790 set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG); 791 792 LEDSTEP(); 793 794 /* 795 * Well we should set a data abort handler. 796 * Once things get going this will change as we will need a proper 797 * handler. 798 * Until then we will use a handler that just panics but tells us 799 * why. 800 * Initialisation of the vectors will just panic on a data abort. 801 * This just fills in a slighly better one. 802 */ 803 printf("vectors "); 804 data_abort_handler_address = (u_int)data_abort_handler; 805 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 806 undefined_handler_address = (u_int)undefinedinstruction_bounce; 807 808 /* Initialise the undefined instruction handlers */ 809 printf("undefined "); 810 undefined_init(); 811 812 LEDSTEP(); 813 814 /* Load memory into UVM. */ 815 printf("page "); 816 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 817 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 818 atop(physical_freestart), atop(physical_freeend), 819 VM_FREELIST_DEFAULT); 820 821 LEDSTEP(); 822 /* Boot strap pmap telling it where the kernel page table is */ 823 printf("pmap "); 824 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt); 825 826 LEDSTEP(); 827 828 /* Setup the IRQ system */ 829 printf("irq "); 830 /* XXX irq_init(); */ 831 832 printf("done.\n"); 833 834 boothowto |= RB_SINGLE | RB_KDB | RB_ASKNAME; 835 836 #ifdef IPKDB 837 /* Initialise ipkdb */ 838 ipkdb_init(); 839 if (boothowto & RB_KDB) 840 ipkdb_connect(0); 841 #endif 842 843 #ifdef KGDB 844 if (boothowto & RB_KDB) { 845 kgdb_debug_init = 1; 846 kgdb_connect(1); 847 } 848 #endif 849 850 #ifdef DDB 851 db_machine_init(); 852 853 /* Firmware doesn't load symbols. */ 854 ddb_init(0, NULL, NULL); 855 856 if (boothowto & RB_KDB) 857 Debugger(); 858 #endif 859 860 /* We return the new stack pointer address */ 861 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP); 862 } 863 #ifndef SSCOM_FREQ 864 /* our PCLK is 50MHz */ 865 #define SSCOM_FREQ 50000000 866 #endif 867 868 void 869 consinit(void) 870 { 871 static int consinit_done = 0; 872 bus_space_tag_t iot = s3c2xx0_softc->sc_iot; 873 874 if (consinit_done != 0) 875 return; 876 877 consinit_done = 1; 878 879 #if NSSCOM > 0 880 #ifdef SSCOM0CONSOLE 881 if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed, 882 SSCOM_FREQ, comcnmode)) 883 return; 884 #endif 885 #ifdef SSCOM1CONSOLE 886 if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed, 887 SSCOM_FREQ, comcnmode)) 888 return; 889 #endif 890 #endif /* NSSCOM */ 891 #if NCOM>0 && defined(CONCOMADDR) 892 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed, 893 COM_FREQ, comcnmode)) 894 panic("can't init serial console @%x", CONCOMADDR); 895 return; 896 #endif 897 898 consinit_done = 0; 899 } 900 901 902 #ifdef KGDB 903 904 #if (NSSCOM > 0) 905 906 #ifdef KGDB_DEVNAME 907 const char kgdb_devname[] = KGDB_DEVNAME; 908 #else 909 const char kgdb_devname[] = ""; 910 #endif 911 912 #ifndef KGDB_DEVMODE 913 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */ 914 #endif 915 int kgdb_sscom_mode = KGDB_DEVMODE; 916 917 #endif /* NSSCOM */ 918 919 void 920 kgdb_port_init(void) 921 { 922 #if (NSSCOM > 0) 923 int unit = -1; 924 925 if (strcmp(kgdb_devname, "sscom0") == 0) 926 unit = 0; 927 else if (strcmp(kgdb_devname, "sscom1") == 0) 928 unit = 1; 929 930 if (unit >= 0) { 931 s3c2800_sscom_kgdb_attach(s3c2xx0_softc->sc_iot, 932 unit, kgdb_rate, SSCOM_FREQ, kgdb_sscom_mode); 933 } 934 #endif 935 } 936 #endif 937 938 static __inline 939 pd_entry_t * 940 read_ttb(void) 941 { 942 long ttb; 943 944 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb)); 945 946 947 return (pd_entry_t *)(ttb & ~((1 << 14) - 1)); 948 } 949 950 951 static __inline void 952 writeback_dcache_line(vaddr_t va) 953 { 954 /* writeback Dcache line */ 955 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9 956 * assume write-through cache, and always flush Dcache instead of 957 * cleaning it. Since Boot loader maps page table with write-back 958 * cached, we really need to clean Dcache. */ 959 asm("mcr p15, 0, %0, c7, c10, 1" 960 : : "r"(va)); 961 } 962 963 static __inline void 964 clean_dcache_line(vaddr_t va) 965 { 966 /* writeback and invalidate Dcache line */ 967 asm("mcr p15, 0, %0, c7, c14, 1" 968 : : "r"(va)); 969 } 970 971 static vaddr_t section_free = SMDK2800_VBASE_FREE; 972 973 /* 974 * simple memory mapping function used in early bootstrap stage 975 * before pmap is initialized. 976 * This assumes only peripheral registers to map. they are mapped to 977 * fixed address with section mapping. 978 */ 979 static int 980 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 981 int flag, bus_space_handle_t * bshp) 982 { 983 long offset, sec; 984 int modified = 0; 985 pd_entry_t *pagedir = read_ttb(); 986 /* This assumes PA==VA for page directory */ 987 988 if (S3C2800_PERIPHERALS <= bpa && bpa < S3C2800_PERIPHERALS + 0x200000) { 989 offset = bpa - S3C2800_PERIPHERALS; 990 if (offset < 0 || 2 * L1_S_SIZE < offset) 991 panic("bootstrap_bs_map: can't map"); 992 sec = (SMDK2800_IO_AREA_VBASE + offset) >> L1_S_SHIFT; 993 994 /* already mapped? */ 995 if ((pagedir[sec] & L1_S_FRAME) != (bpa & L1_S_FRAME)) { 996 pmap_map_section((vaddr_t)pagedir, sec << L1_S_SHIFT, 997 bpa & L1_S_FRAME, 998 VM_PROT_READ | VM_PROT_WRITE, 999 PTE_NOCACHE); 1000 1001 writeback_dcache_line((vaddr_t)&pagedir[sec]); 1002 modified = 1; 1003 } 1004 *bshp = (bus_space_handle_t)(SMDK2800_IO_AREA_VBASE + offset); 1005 } else { 1006 vaddr_t va; 1007 bus_addr_t pa; 1008 int cacheable = flag & BUS_SPACE_MAP_CACHEABLE; 1009 1010 1011 size = (size + L1_S_OFFSET) & ~L1_S_OFFSET; 1012 pa = bpa & ~L1_S_OFFSET; 1013 offset = bpa - pa; 1014 1015 va = section_free; 1016 while (size) { 1017 pmap_map_section((vaddr_t)pagedir, va, 1018 pa, VM_PROT_READ | VM_PROT_WRITE, 1019 cacheable ? PTE_CACHE : PTE_NOCACHE); 1020 writeback_dcache_line((vaddr_t)& pagedir[va >> L1_S_SHIFT]); 1021 va += L1_S_SIZE; 1022 pa += L1_S_SIZE; 1023 size -= L1_S_SIZE; 1024 } 1025 1026 *bshp = (bus_space_handle_t)(section_free + offset); 1027 section_free = va; 1028 } 1029 1030 1031 if (modified) { 1032 1033 cpu_drain_writebuf(); 1034 cpu_tlb_flushD(); 1035 } 1036 return (0); 1037 } 1038 1039 static void 1040 copy_io_area_map(pd_entry_t * new_pd) 1041 { 1042 pd_entry_t *cur_pd = read_ttb(); 1043 vaddr_t sec; 1044 1045 for (sec = SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT; 1046 sec < (section_free >> L1_S_SHIFT); ++sec) { 1047 new_pd[sec] = cur_pd[sec]; 1048 } 1049 } 1050
Indexes created Tue Sep 30 20:09:53 GMT 2025