smdk2800_machdep.c revision 1.10
1 /* $NetBSD: smdk2800_machdep.c,v 1.10 2003/05/17 23:47:01 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Fujitsu Component Limited 5 * Copyright (c) 2002 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 /* 36 * Copyright (c) 2001,2002 ARM Ltd 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. The name of the company may not be used to endorse or promote 48 * products derived from this software without specific prior written 49 * permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND 52 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 53 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 54 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD 55 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 56 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 57 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 58 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 59 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 60 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 61 * POSSIBILITY OF SUCH DAMAGE. 62 * 63 */ 64 65 /* 66 * Copyright (c) 1997,1998 Mark Brinicombe. 67 * Copyright (c) 1997,1998 Causality Limited. 68 * All rights reserved. 69 * 70 * Redistribution and use in source and binary forms, with or without 71 * modification, are permitted provided that the following conditions 72 * are met: 73 * 1. Redistributions of source code must retain the above copyright 74 * notice, this list of conditions and the following disclaimer. 75 * 2. Redistributions in binary form must reproduce the above copyright 76 * notice, this list of conditions and the following disclaimer in the 77 * documentation and/or other materials provided with the distribution. 78 * 3. All advertising materials mentioning features or use of this software 79 * must display the following acknowledgement: 80 * This product includes software developed by Mark Brinicombe 81 * for the NetBSD Project. 82 * 4. The name of the company nor the name of the author may be used to 83 * endorse or promote products derived from this software without specific 84 * prior written permission. 85 * 86 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 87 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 88 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 89 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 90 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 91 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 92 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 93 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 94 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 95 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 96 * SUCH DAMAGE. 97 * 98 * Machine dependant functions for kernel setup for integrator board 99 * 100 * Created : 24/11/97 101 */ 102 103 /* 104 * Machine dependant functions for kernel setup for Samsung SMDK2800 105 * derived from integrator_machdep.c 106 */ 107 108 #include "opt_ddb.h" 109 #include "opt_kgdb.h" 110 #include "opt_ipkdb.h" 111 #include "opt_pmap_debug.h" 112 #include "opt_md.h" 113 #include "pci.h" 114 115 #include <sys/param.h> 116 #include <sys/device.h> 117 #include <sys/systm.h> 118 #include <sys/kernel.h> 119 #include <sys/exec.h> 120 #include <sys/proc.h> 121 #include <sys/msgbuf.h> 122 #include <sys/reboot.h> 123 #include <sys/termios.h> 124 #include <sys/ksyms.h> 125 126 #include <uvm/uvm_extern.h> 127 128 #include <dev/cons.h> 129 #include <dev/md.h> 130 131 #include <machine/db_machdep.h> 132 #include <ddb/db_sym.h> 133 #include <ddb/db_extern.h> 134 #ifdef KGDB 135 #include <sys/kgdb.h> 136 #endif 137 138 #include <machine/bootconfig.h> 139 #include <machine/bus.h> 140 #include <machine/cpu.h> 141 #include <machine/frame.h> 142 #include <machine/intr.h> 143 #include <arm/undefined.h> 144 145 #include <arm/arm32/machdep.h> 146 147 #include <arm/s3c2xx0/s3c2800reg.h> 148 #include <arm/s3c2xx0/s3c2800var.h> 149 150 #include "ksyms.h" 151 152 #ifndef SDRAM_START 153 #define SDRAM_START S3C2800_DBANK0_START 154 #endif 155 #ifndef SDRAM_SIZE 156 #define SDRAM_SIZE (32*1024*1024) 157 #endif 158 159 /* 160 * Address to map I/O registers in early initialize stage. 161 */ 162 #define SMDK2800_IO_AREA_VBASE 0xfd000000 163 #define SMDK2800_VBASE_FREE 0xfd200000 164 165 /* Kernel text starts 2MB in from the bottom of the kernel address space. */ 166 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000) 167 168 /* Memory disk support */ 169 #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR) 170 #define DO_MEMORY_DISK 171 /* We have memory disk image outside of the kernel on ROM. */ 172 #ifdef MEMORY_DISK_ROOT_ROM 173 /* map the image directory and use read-only */ 174 #else 175 /* copy the image to RAM */ 176 #endif 177 #endif 178 179 180 /* 181 * Address to call from cpu_reset() to reset the machine. 182 * This is machine architecture dependant as it varies depending 183 * on where the ROM appears when you turn the MMU off. 184 */ 185 u_int cpu_reset_address = (u_int)0; 186 187 /* Define various stack sizes in pages */ 188 #define IRQ_STACK_SIZE 1 189 #define ABT_STACK_SIZE 1 190 #ifdef IPKDB 191 #define UND_STACK_SIZE 2 192 #else 193 #define UND_STACK_SIZE 1 194 #endif 195 196 BootConfig bootconfig; /* Boot config storage */ 197 char *boot_args = NULL; 198 char *boot_file = NULL; 199 200 vm_offset_t physical_start; 201 vm_offset_t physical_freestart; 202 vm_offset_t physical_freeend; 203 vm_offset_t physical_end; 204 u_int free_pages; 205 vm_offset_t pagetables_start; 206 int physmem = 0; 207 208 /*int debug_flags;*/ 209 #ifndef PMAP_STATIC_L1S 210 int max_processes = 64; /* Default number */ 211 #endif /* !PMAP_STATIC_L1S */ 212 213 /* Physical and virtual addresses for some global pages */ 214 pv_addr_t systempage; 215 pv_addr_t irqstack; 216 pv_addr_t undstack; 217 pv_addr_t abtstack; 218 pv_addr_t kernelstack; 219 220 vm_offset_t msgbufphys; 221 222 extern u_int data_abort_handler_address; 223 extern u_int prefetch_abort_handler_address; 224 extern u_int undefined_handler_address; 225 226 #ifdef PMAP_DEBUG 227 extern int pmap_debug_level; 228 #endif 229 230 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */ 231 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */ 232 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */ 233 234 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 235 236 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 237 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 238 239 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 240 241 struct user *proc0paddr; 242 243 /* Prototypes */ 244 245 void consinit(void); 246 void kgdb_port_init(void); 247 248 static int 249 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 250 int cacheable, bus_space_handle_t * bshp); 251 static void map_builtin_peripherals(void); 252 static void copy_io_area_map(pd_entry_t * new_pd); 253 254 /* A load of console goo. */ 255 #include "vga.h" 256 #if NVGA > 0 257 #include <dev/ic/mc6845reg.h> 258 #include <dev/ic/pcdisplayvar.h> 259 #include <dev/ic/vgareg.h> 260 #include <dev/ic/vgavar.h> 261 #endif 262 263 #include "com.h" 264 #if NCOM > 0 265 #include <dev/ic/comreg.h> 266 #include <dev/ic/comvar.h> 267 #endif 268 269 #include "sscom.h" 270 #if NSSCOM > 0 271 #include "opt_sscom.h" 272 #include <arm/s3c2xx0/sscom_var.h> 273 #endif 274 275 /* 276 * Define the default console speed for the board. This is generally 277 * what the firmware provided with the board defaults to. 278 */ 279 #ifndef CONSPEED 280 #define CONSPEED B115200 /* TTYDEF_SPEED */ 281 #endif 282 #ifndef CONMODE 283 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 284 #endif 285 286 int comcnspeed = CONSPEED; 287 int comcnmode = CONMODE; 288 289 struct bus_space bootstrap_bs_tag; 290 291 /* 292 * void cpu_reboot(int howto, char *bootstr) 293 * 294 * Reboots the system 295 * 296 * Deal with any syncing, unmounting, dumping and shutdown hooks, 297 * then reset the CPU. 298 */ 299 void 300 cpu_reboot(int howto, char *bootstr) 301 { 302 303 cpu_reset_address = vtophys((u_int)s3c2800_softreset); 304 305 /* 306 * If we are still cold then hit the air brakes 307 * and crash to earth fast 308 */ 309 if (cold) { 310 doshutdownhooks(); 311 printf("The operating system has halted.\n"); 312 printf("Please press any key to reboot.\n\n"); 313 cngetc(); 314 printf("rebooting...\n"); 315 cpu_reset(); 316 /* NOTREACHED */ 317 } 318 /* Disable console buffering */ 319 320 /* 321 * If RB_NOSYNC was not specified sync the discs. 322 * Note: Unless cold is set to 1 here, syslogd will die during the 323 * unmount. It looks like syslogd is getting woken up only to find 324 * that it cannot page part of the binary in as the filesystem has 325 * been unmounted. 326 */ 327 if (!(howto & RB_NOSYNC)) 328 bootsync(); 329 330 /* Say NO to interrupts */ 331 splhigh(); 332 333 /* Do a dump if requested. */ 334 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 335 dumpsys(); 336 337 /* Run any shutdown hooks */ 338 doshutdownhooks(); 339 340 /* Make sure IRQ's are disabled */ 341 IRQdisable; 342 343 if (howto & RB_HALT) { 344 printf("The operating system has halted.\n"); 345 printf("Please press any key to reboot.\n\n"); 346 cngetc(); 347 } 348 printf("rebooting...\n"); 349 cpu_reset(); 350 /* NOTREACHED */ 351 } 352 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v)) 353 354 /* 355 * u_int initarm(...) 356 * 357 * Initial entry point on startup. This gets called before main() is 358 * entered. 359 * It should be responsible for setting up everything that must be 360 * in place when main is called. 361 * This includes 362 * Taking a copy of the boot configuration structure. 363 * Initialising the physical console so characters can be printed. 364 * Setting up page tables for the kernel 365 * Relocating the kernel to the bottom of physical memory 366 */ 367 368 u_int 369 initarm(void *arg) 370 { 371 int loop; 372 int loop1; 373 u_int l1pagetable; 374 extern int etext asm("_etext"); 375 extern int end asm("_end"); 376 pv_addr_t kernel_l1pt; 377 struct s3c2800_softc temp_softc; /* used to initialize IO regs */ 378 int progress_counter = 0; 379 380 #ifdef DO_MEMORY_DISK 381 vm_offset_t md_root_start; 382 #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE) 383 #endif 384 385 #define gpio_read8(reg) bus_space_read_1(temp_softc.sc_sx.sc_iot, \ 386 temp_softc.sc_sx.sc_gpio_ioh, (reg)) 387 388 #define LEDSTEP() __LED(progress_counter++) 389 390 #define pdatc (*(volatile uint8_t *)(S3C2800_GPIO_BASE+GPIO_PDATC)) 391 #define __LED(x) (pdatc = (pdatc & ~0x07) | (~(x) & 0x07)) 392 393 LEDSTEP(); 394 /* 395 * Heads up ... Setup the CPU / MMU / TLB functions 396 */ 397 if (set_cpufuncs()) 398 panic("cpu not recognized!"); 399 400 LEDSTEP(); 401 402 map_builtin_peripherals(); 403 404 /* 405 * prepare fake bus space tag 406 */ 407 bootstrap_bs_tag = s3c2xx0_bs_tag; 408 bootstrap_bs_tag.bs_map = bootstrap_bs_map; 409 s3c2xx0_softc = &temp_softc.sc_sx; 410 s3c2xx0_softc->sc_iot = &bootstrap_bs_tag; 411 412 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_GPIO_BASE, 413 S3C2800_GPIO_SIZE, 0, &temp_softc.sc_sx.sc_gpio_ioh); 414 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_INTCTL_BASE, 415 S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_sx.sc_intctl_ioh); 416 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_CLKMAN_BASE, 417 S3C2800_CLKMAN_SIZE, 0, &temp_softc.sc_sx.sc_clkman_ioh); 418 419 #undef __LED 420 #define __LED(x) \ 421 bus_space_write_1(&bootstrap_bs_tag, \ 422 temp_softc.sc_sx.sc_gpio_ioh, \ 423 GPIO_PDATC, (~(x) & 0x07) | \ 424 (bus_space_read_1(&bootstrap_bs_tag, \ 425 temp_softc.sc_sx.sc_gpio_ioh, GPIO_PDATC ) & ~0x07)) 426 427 LEDSTEP(); 428 429 /* Disable all peripheral interrupts */ 430 bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_sx.sc_intctl_ioh, 431 INTCTL_INTMSK, 0); 432 433 s3c2800_clock_freq(&temp_softc); 434 435 consinit(); 436 #ifdef VERBOSE_INIT_ARM 437 printf("consinit done\n"); 438 #endif 439 440 #ifdef KGDB 441 LEDSTEP(); 442 kgdb_port_init(); 443 #endif 444 LEDSTEP(); 445 446 #ifdef VERBOSE_INIT_ARM 447 /* Talk to the user */ 448 printf("\nNetBSD/evbarm (SMDK2800) booting ...\n"); 449 #endif 450 451 /* 452 * Ok we have the following memory map 453 * 454 * Physical Address Range Description 455 * ----------------------- ---------------------------------- 456 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB) 457 * 0x02000000 - 0x020fffff AMD flash Memory (1MB) 458 * or (depend on DIPSW setting) 459 * 0x00000000 - 0x000fffff AMD flash Memory (1MB) 460 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB) 461 * 462 * 0x08000000 - 0x09ffffff SDRAM (32MB) 463 * 0x20000000 - 0x3fffffff PCI space 464 * 465 * The initarm() has the responsibility for creating the kernel 466 * page tables. 467 * It must also set up various memory pointers that are used 468 * by pmap etc. 469 */ 470 471 /* Fake bootconfig structure for the benefit of pmap.c */ 472 /* XXX must make the memory description h/w independent */ 473 bootconfig.dramblocks = 1; 474 bootconfig.dram[0].address = SDRAM_START; 475 bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE; 476 477 /* 478 * Set up the variables that define the availablilty of 479 * physical memory. For now, we're going to set 480 * physical_freestart to 0x08200000 (where the kernel 481 * was loaded), and allocate the memory we need downwards. 482 * If we get too close to the bottom of SDRAM, we 483 * will panic. We will update physical_freestart and 484 * physical_freeend later to reflect what pmap_bootstrap() 485 * wants to see. 486 * 487 * XXX pmap_bootstrap() needs an enema. 488 */ 489 physical_start = bootconfig.dram[0].address; 490 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 491 492 #if DO_MEMORY_DISK 493 #ifdef MEMORY_DISK_ROOT_ROM 494 md_root_start = MEMORY_DISK_ROOT_ADDR; 495 boothowto |= RB_RDONLY; 496 #else 497 /* Reserve physmem for ram disk */ 498 md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1)); 499 printf("Reserve %ld bytes for memory disk\n", 500 physical_end - md_root_start); 501 /* copy fs contents */ 502 memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR, 503 MD_ROOT_SIZE); 504 physical_end = md_root_start; 505 #endif 506 #endif 507 508 physical_freestart = 0x08000000UL; /* XXX */ 509 physical_freeend = 0x08200000UL; 510 511 physmem = (physical_end - physical_start) / PAGE_SIZE; 512 513 #ifdef VERBOSE_INIT_ARM 514 /* Tell the user about the memory */ 515 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 516 physical_start, physical_end - 1); 517 #endif 518 519 /* 520 * XXX 521 * Okay, the kernel starts 2MB in from the bottom of physical 522 * memory. We are going to allocate our bootstrap pages downwards 523 * from there. 524 * 525 * We need to allocate some fixed page tables to get the kernel 526 * going. We allocate one page directory and a number of page 527 * tables and store the physical addresses in the kernel_pt_table 528 * array. 529 * 530 * The kernel page directory must be on a 16K boundary. The page 531 * tables must be on 4K bounaries. What we do is allocate the 532 * page directory on the first 16K boundary that we encounter, and 533 * the page tables on 4K boundaries otherwise. Since we allocate 534 * at least 3 L2 page tables, we are guaranteed to encounter at 535 * least one 16K aligned region. 536 */ 537 538 #ifdef VERBOSE_INIT_ARM 539 printf("Allocating page tables\n"); 540 #endif 541 542 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 543 544 #ifdef VERBOSE_INIT_ARM 545 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 546 physical_freestart, free_pages, free_pages); 547 #endif 548 549 /* Define a macro to simplify memory allocation */ 550 #define valloc_pages(var, np) \ 551 alloc_pages((var).pv_pa, (np)); \ 552 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 553 554 #define alloc_pages(var, np) \ 555 physical_freeend -= ((np) * PAGE_SIZE); \ 556 if (physical_freeend < physical_freestart) \ 557 panic("initarm: out of memory"); \ 558 (var) = physical_freeend; \ 559 free_pages -= (np); \ 560 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 561 562 loop1 = 0; 563 kernel_l1pt.pv_pa = 0; 564 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 565 /* Are we 16KB aligned for an L1 ? */ 566 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 567 && kernel_l1pt.pv_pa == 0) { 568 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 569 } else { 570 valloc_pages(kernel_pt_table[loop1], 571 L2_TABLE_SIZE / PAGE_SIZE); 572 ++loop1; 573 } 574 } 575 576 /* This should never be able to happen but better confirm that. */ 577 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0) 578 panic("initarm: Failed to align the kernel page directory\n"); 579 580 /* 581 * Allocate a page for the system page mapped to V0x00000000 582 * This page will just contain the system vectors and can be 583 * shared by all processes. 584 */ 585 alloc_pages(systempage.pv_pa, 1); 586 587 /* Allocate stacks for all modes */ 588 valloc_pages(irqstack, IRQ_STACK_SIZE); 589 valloc_pages(abtstack, ABT_STACK_SIZE); 590 valloc_pages(undstack, UND_STACK_SIZE); 591 valloc_pages(kernelstack, UPAGES); 592 593 #ifdef VERBOSE_INIT_ARM 594 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 595 irqstack.pv_va); 596 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 597 abtstack.pv_va); 598 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 599 undstack.pv_va); 600 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 601 kernelstack.pv_va); 602 #endif 603 604 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 605 606 LEDSTEP(); 607 608 /* 609 * Ok we have allocated physical pages for the primary kernel 610 * page tables 611 */ 612 613 #ifdef VERBOSE_INIT_ARM 614 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 615 #endif 616 617 /* 618 * Now we start construction of the L1 page table 619 * We start by mapping the L2 page tables into the L1. 620 * This means that we can replace L1 mappings later on if necessary 621 */ 622 l1pagetable = kernel_l1pt.pv_pa; 623 624 /* Map the L2 pages tables in the L1 page table */ 625 pmap_link_l2pt(l1pagetable, 0x00000000, 626 &kernel_pt_table[KERNEL_PT_SYS]); 627 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 628 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 629 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 630 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 631 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 632 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 633 634 /* update the top of the kernel VM */ 635 pmap_curmaxkvaddr = 636 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 637 638 #ifdef VERBOSE_INIT_ARM 639 printf("Mapping kernel\n"); 640 #endif 641 642 /* Now we fill in the L2 pagetable for the kernel static code/data */ 643 { 644 size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE; 645 size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE; 646 u_int logical; 647 648 textsize = (textsize + PGOFSET) & ~PGOFSET; 649 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 650 651 logical = 0x00200000; /* offset of kernel in RAM */ 652 653 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 654 physical_start + logical, textsize, 655 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 656 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 657 physical_start + logical, totalsize - textsize, 658 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 659 } 660 661 #ifdef VERBOSE_INIT_ARM 662 printf("Constructing L2 page tables\n"); 663 #endif 664 665 /* Map the stack pages */ 666 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 667 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 668 PTE_CACHE); 669 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 670 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 671 PTE_CACHE); 672 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 673 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 674 PTE_CACHE); 675 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 676 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 677 678 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 679 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 680 681 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 682 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 683 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 684 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 685 } 686 687 /* Map the vector page. */ 688 #if 1 689 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 690 * cache-clean code there. */ 691 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 692 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 693 #else 694 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 695 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 696 #endif 697 698 #if 0 699 /* Map the core memory needed before autoconfig */ 700 loop = 0; 701 while (l1_sec_table[loop].size) { 702 vm_size_t sz; 703 704 #ifdef VERBOSE_INIT_ARM 705 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa, 706 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1, 707 l1_sec_table[loop].va); 708 #endif 709 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE) 710 pmap_map_section(l1pagetable, 711 l1_sec_table[loop].va + sz, 712 l1_sec_table[loop].pa + sz, 713 l1_sec_table[loop].prot, 714 l1_sec_table[loop].cache); 715 ++loop; 716 } 717 #endif 718 719 #ifdef MEMORY_DISK_DYNAMIC 720 /* map MD root image */ 721 bootstrap_bs_map(&bootstrap_bs_tag, md_root_start, MD_ROOT_SIZE, 722 BUS_SPACE_MAP_CACHEABLE | BUS_SPACE_MAP_LINEAR, 723 (bus_space_handle_t *)&md_root_start); 724 725 md_root_setconf((void *)md_root_start, MD_ROOT_SIZE); 726 #endif /* MEMORY_DISK_DYNAMIC */ 727 /* 728 * map integrated peripherals at same address in l1pagetable 729 * so that we can continue to use console. 730 */ 731 copy_io_area_map((pd_entry_t *)l1pagetable); 732 733 /* 734 * Now we have the real page tables in place so we can switch to them. 735 * Once this is done we will be running with the REAL kernel page 736 * tables. 737 */ 738 739 /* 740 * Update the physical_freestart/physical_freeend/free_pages 741 * variables. 742 */ 743 { 744 physical_freestart = physical_start + 745 (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE); 746 physical_freeend = physical_end; 747 free_pages = 748 (physical_freeend - physical_freestart) / PAGE_SIZE; 749 } 750 751 /* Switch tables */ 752 #ifdef VERBOSE_INIT_ARM 753 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 754 physical_freestart, free_pages, free_pages); 755 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 756 #endif 757 LEDSTEP(); 758 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 759 setttb(kernel_l1pt.pv_pa); 760 cpu_tlb_flushID(); 761 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 762 763 /* 764 * Moved from cpu_startup() as data_abort_handler() references 765 * this during uvm init 766 */ 767 proc0paddr = (struct user *)kernelstack.pv_va; 768 lwp0.l_addr = proc0paddr; 769 770 #ifdef VERBOSE_INIT_ARM 771 printf("done!\n"); 772 #endif 773 774 #if 0 775 /* 776 * The IFPGA registers have just moved. 777 * Detach the diagnostic serial port and reattach at the new address. 778 */ 779 plcomcndetach(); 780 /* 781 * XXX this should only be done in main() but it useful to 782 * have output earlier ... 783 */ 784 consinit(); 785 #endif 786 787 LEDSTEP(); 788 #ifdef VERBOSE_INIT_ARM 789 printf("bootstrap done.\n"); 790 #endif 791 792 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 793 794 /* 795 * Pages were allocated during the secondary bootstrap for the 796 * stacks for different CPU modes. 797 * We must now set the r13 registers in the different CPU modes to 798 * point to these stacks. 799 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 800 * of the stack memory. 801 */ 802 #ifdef VERBOSE_INIT_ARM 803 printf("init subsystems: stacks "); 804 #endif 805 806 set_stackptr(PSR_IRQ32_MODE, 807 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 808 set_stackptr(PSR_ABT32_MODE, 809 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 810 set_stackptr(PSR_UND32_MODE, 811 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 812 813 LEDSTEP(); 814 815 /* 816 * Well we should set a data abort handler. 817 * Once things get going this will change as we will need a proper 818 * handler. 819 * Until then we will use a handler that just panics but tells us 820 * why. 821 * Initialisation of the vectors will just panic on a data abort. 822 * This just fills in a slighly better one. 823 */ 824 #ifdef VERBOSE_INIT_ARM 825 printf("vectors "); 826 #endif 827 data_abort_handler_address = (u_int)data_abort_handler; 828 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 829 undefined_handler_address = (u_int)undefinedinstruction_bounce; 830 831 /* Initialise the undefined instruction handlers */ 832 #ifdef VERBOSE_INIT_ARM 833 printf("undefined "); 834 #endif 835 undefined_init(); 836 837 LEDSTEP(); 838 839 /* Load memory into UVM. */ 840 #ifdef VERBOSE_INIT_ARM 841 printf("page "); 842 #endif 843 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 844 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 845 atop(physical_freestart), atop(physical_freeend), 846 VM_FREELIST_DEFAULT); 847 848 LEDSTEP(); 849 /* Boot strap pmap telling it where the kernel page table is */ 850 #ifdef VERBOSE_INIT_ARM 851 printf("pmap "); 852 #endif 853 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE, 854 KERNEL_VM_BASE + KERNEL_VM_SIZE); 855 856 LEDSTEP(); 857 858 /* Setup the IRQ system */ 859 #ifdef VERBOSE_INIT_ARM 860 printf("irq "); 861 #endif 862 /* XXX irq_init(); */ 863 864 #ifdef VERBOSE_INIT_ARM 865 printf("done.\n"); 866 #endif 867 868 #ifdef BOOTHOWTO_INIT 869 boothowto |= BOOTHOWTO_INIT; 870 #endif 871 { 872 uint8_t gpio = ~gpio_read8(GPIO_PDATF); 873 874 if (gpio & (1<<5)) /* SW3 */ 875 boothowto ^= RB_SINGLE; 876 if (gpio & (1<<7)) /* SW7 */ 877 boothowto ^= RB_KDB; 878 #ifdef VERBOSE_INIT_ARM 879 printf( "sw: %x boothowto: %x\n", gpio, boothowto ); 880 #endif 881 } 882 883 #ifdef IPKDB 884 /* Initialise ipkdb */ 885 ipkdb_init(); 886 if (boothowto & RB_KDB) 887 ipkdb_connect(0); 888 #endif 889 890 #ifdef KGDB 891 if (boothowto & RB_KDB) { 892 kgdb_debug_init = 1; 893 kgdb_connect(1); 894 } 895 #endif 896 897 #if NKSYMS || defined(DDB) || defined(LKM) 898 /* Firmware doesn't load symbols. */ 899 ksyms_init(0, NULL, NULL); 900 #endif 901 902 #ifdef DDB 903 db_machine_init(); 904 if (boothowto & RB_KDB) 905 Debugger(); 906 #endif 907 908 /* We return the new stack pointer address */ 909 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP); 910 } 911 912 void 913 consinit(void) 914 { 915 static int consinit_done = 0; 916 bus_space_tag_t iot = s3c2xx0_softc->sc_iot; 917 int pclk = s3c2xx0_softc->sc_pclk; 918 919 if (consinit_done != 0) 920 return; 921 922 consinit_done = 1; 923 924 #if NSSCOM > 0 925 #ifdef SSCOM0CONSOLE 926 if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed, 927 pclk, comcnmode)) 928 return; 929 #endif 930 #ifdef SSCOM1CONSOLE 931 if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed, 932 pclk, comcnmode)) 933 return; 934 #endif 935 #endif /* NSSCOM */ 936 #if NCOM>0 && defined(CONCOMADDR) 937 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed, 938 COM_FREQ, comcnmode)) 939 panic("can't init serial console @%x", CONCOMADDR); 940 return; 941 #endif 942 943 consinit_done = 0; 944 } 945 946 947 #ifdef KGDB 948 949 #if (NSSCOM > 0) 950 951 #ifdef KGDB_DEVNAME 952 const char kgdb_devname[] = KGDB_DEVNAME; 953 #else 954 const char kgdb_devname[] = ""; 955 #endif 956 957 #ifndef KGDB_DEVMODE 958 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */ 959 #endif 960 int kgdb_sscom_mode = KGDB_DEVMODE; 961 962 #endif /* NSSCOM */ 963 964 void 965 kgdb_port_init(void) 966 { 967 #if (NSSCOM > 0) 968 int unit = -1; 969 int pclk = s3c2xx0_softc->sc_pclk; 970 971 if (strcmp(kgdb_devname, "sscom0") == 0) 972 unit = 0; 973 else if (strcmp(kgdb_devname, "sscom1") == 0) 974 unit = 1; 975 976 if (unit >= 0) { 977 s3c2800_sscom_kgdb_attach(s3c2xx0_softc->sc_iot, 978 unit, kgdb_rate, pclk, kgdb_sscom_mode); 979 } 980 #endif 981 } 982 #endif 983 984 static __inline 985 pd_entry_t * 986 read_ttb(void) 987 { 988 long ttb; 989 990 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb)); 991 992 993 return (pd_entry_t *)(ttb & ~((1 << 14) - 1)); 994 } 995 996 997 static __inline void 998 writeback_dcache_line(vaddr_t va) 999 { 1000 /* writeback Dcache line */ 1001 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9 1002 * assume write-through cache, and always flush Dcache instead of 1003 * cleaning it. Since Boot loader maps page table with write-back 1004 * cached, we really need to clean Dcache. */ 1005 asm("mcr p15, 0, %0, c7, c10, 1" 1006 : : "r"(va)); 1007 } 1008 1009 static __inline void 1010 clean_dcache_line(vaddr_t va) 1011 { 1012 /* writeback and invalidate Dcache line */ 1013 asm("mcr p15, 0, %0, c7, c14, 1" 1014 : : "r"(va)); 1015 } 1016 1017 static vaddr_t section_free = SMDK2800_VBASE_FREE; 1018 1019 static void 1020 map_builtin_peripherals(void) 1021 { 1022 pd_entry_t *pagedir = read_ttb(); 1023 int i, sec; 1024 1025 for (i=0; i < 2; ++i) { 1026 1027 pmap_map_section((vaddr_t)pagedir, 1028 SMDK2800_IO_AREA_VBASE + (i <<L1_S_SHIFT), 1029 S3C2800_PERIPHERALS + (i << L1_S_SHIFT), 1030 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 1031 1032 sec = (SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT) + i; 1033 writeback_dcache_line((vaddr_t)&pagedir[sec]); 1034 } 1035 1036 cpu_drain_writebuf(); 1037 cpu_tlb_flushD(); 1038 } 1039 1040 /* 1041 * simple memory mapping function used in early bootstrap stage 1042 * before pmap is initialized. 1043 * This assumes only peripheral registers to map. they are mapped to 1044 * fixed address with section mapping. 1045 */ 1046 static int 1047 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 1048 int flag, bus_space_handle_t * bshp) 1049 { 1050 long offset; 1051 int modified = 0; 1052 pd_entry_t *pagedir = read_ttb(); 1053 /* This assumes PA==VA for page directory */ 1054 1055 if (S3C2800_PERIPHERALS <= bpa && bpa < S3C2800_PERIPHERALS + 0x200000) { 1056 offset = bpa - S3C2800_PERIPHERALS; 1057 if (offset < 0 || 2 * L1_S_SIZE < offset) 1058 panic("bootstrap_bs_map: can't map"); 1059 *bshp = (bus_space_handle_t)(SMDK2800_IO_AREA_VBASE + offset); 1060 } else { 1061 vaddr_t va; 1062 bus_addr_t pa; 1063 int cacheable = flag & BUS_SPACE_MAP_CACHEABLE; 1064 1065 1066 size = (size + L1_S_OFFSET) & ~L1_S_OFFSET; 1067 pa = bpa & ~L1_S_OFFSET; 1068 offset = bpa - pa; 1069 1070 va = section_free; 1071 while (size) { 1072 pmap_map_section((vaddr_t)pagedir, va, 1073 pa, VM_PROT_READ | VM_PROT_WRITE, 1074 cacheable ? PTE_CACHE : PTE_NOCACHE); 1075 writeback_dcache_line((vaddr_t)& pagedir[va >> L1_S_SHIFT]); 1076 va += L1_S_SIZE; 1077 pa += L1_S_SIZE; 1078 size -= L1_S_SIZE; 1079 } 1080 1081 *bshp = (bus_space_handle_t)(section_free + offset); 1082 section_free = va; 1083 } 1084 1085 1086 if (modified) { 1087 1088 cpu_drain_writebuf(); 1089 cpu_tlb_flushD(); 1090 } 1091 return (0); 1092 } 1093 1094 static void 1095 copy_io_area_map(pd_entry_t * new_pd) 1096 { 1097 pd_entry_t *cur_pd = read_ttb(); 1098 int sec; 1099 1100 for (sec = SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT; 1101 sec < (section_free >> L1_S_SHIFT); ++sec) { 1102 new_pd[sec] = cur_pd[sec]; 1103 } 1104 } 1105
Indexes created Wed Oct 01 13:09:50 GMT 2025