smdk2800_machdep.c revision 1.11
1 /* $NetBSD: smdk2800_machdep.c,v 1.11 2003/05/21 22:48:23 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Fujitsu Component Limited 5 * Copyright (c) 2002 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 /* 36 * Copyright (c) 2001,2002 ARM Ltd 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. The name of the company may not be used to endorse or promote 48 * products derived from this software without specific prior written 49 * permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND 52 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 53 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 54 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD 55 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 56 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 57 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 58 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 59 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 60 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 61 * POSSIBILITY OF SUCH DAMAGE. 62 * 63 */ 64 65 /* 66 * Copyright (c) 1997,1998 Mark Brinicombe. 67 * Copyright (c) 1997,1998 Causality Limited. 68 * All rights reserved. 69 * 70 * Redistribution and use in source and binary forms, with or without 71 * modification, are permitted provided that the following conditions 72 * are met: 73 * 1. Redistributions of source code must retain the above copyright 74 * notice, this list of conditions and the following disclaimer. 75 * 2. Redistributions in binary form must reproduce the above copyright 76 * notice, this list of conditions and the following disclaimer in the 77 * documentation and/or other materials provided with the distribution. 78 * 3. All advertising materials mentioning features or use of this software 79 * must display the following acknowledgement: 80 * This product includes software developed by Mark Brinicombe 81 * for the NetBSD Project. 82 * 4. The name of the company nor the name of the author may be used to 83 * endorse or promote products derived from this software without specific 84 * prior written permission. 85 * 86 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 87 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 88 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 89 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 90 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 91 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 92 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 93 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 94 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 95 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 96 * SUCH DAMAGE. 97 * 98 * Machine dependant functions for kernel setup for integrator board 99 * 100 * Created : 24/11/97 101 */ 102 103 /* 104 * Machine dependant functions for kernel setup for Samsung SMDK2800 105 * derived from integrator_machdep.c 106 */ 107 108 #include "opt_ddb.h" 109 #include "opt_kgdb.h" 110 #include "opt_ipkdb.h" 111 #include "opt_pmap_debug.h" 112 #include "opt_md.h" 113 #include "pci.h" 114 115 #include <sys/param.h> 116 #include <sys/device.h> 117 #include <sys/systm.h> 118 #include <sys/kernel.h> 119 #include <sys/exec.h> 120 #include <sys/proc.h> 121 #include <sys/msgbuf.h> 122 #include <sys/reboot.h> 123 #include <sys/termios.h> 124 #include <sys/ksyms.h> 125 126 #include <uvm/uvm_extern.h> 127 128 #include <dev/cons.h> 129 #include <dev/md.h> 130 131 #include <machine/db_machdep.h> 132 #include <ddb/db_sym.h> 133 #include <ddb/db_extern.h> 134 #ifdef KGDB 135 #include <sys/kgdb.h> 136 #endif 137 138 #include <machine/bootconfig.h> 139 #include <machine/bus.h> 140 #include <machine/cpu.h> 141 #include <machine/frame.h> 142 #include <machine/intr.h> 143 #include <arm/undefined.h> 144 145 #include <arm/arm32/machdep.h> 146 147 #include <arm/s3c2xx0/s3c2800reg.h> 148 #include <arm/s3c2xx0/s3c2800var.h> 149 150 #include "ksyms.h" 151 152 #ifndef SDRAM_START 153 #define SDRAM_START S3C2800_DBANK0_START 154 #endif 155 #ifndef SDRAM_SIZE 156 #define SDRAM_SIZE (32*1024*1024) 157 #endif 158 159 /* 160 * Address to map I/O registers in early initialize stage. 161 */ 162 #define SMDK2800_IO_AREA_VBASE 0xfd000000 163 #define SMDK2800_VBASE_FREE 0xfd200000 164 165 /* Kernel text starts 2MB in from the bottom of the kernel address space. */ 166 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000) 167 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000) 168 169 /* Memory disk support */ 170 #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR) 171 #define DO_MEMORY_DISK 172 /* We have memory disk image outside of the kernel on ROM. */ 173 #ifdef MEMORY_DISK_ROOT_ROM 174 /* map the image directory and use read-only */ 175 #else 176 /* copy the image to RAM */ 177 #endif 178 #endif 179 180 181 /* 182 * Address to call from cpu_reset() to reset the machine. 183 * This is machine architecture dependant as it varies depending 184 * on where the ROM appears when you turn the MMU off. 185 */ 186 u_int cpu_reset_address = (u_int)0; 187 188 /* Define various stack sizes in pages */ 189 #define IRQ_STACK_SIZE 1 190 #define ABT_STACK_SIZE 1 191 #ifdef IPKDB 192 #define UND_STACK_SIZE 2 193 #else 194 #define UND_STACK_SIZE 1 195 #endif 196 197 BootConfig bootconfig; /* Boot config storage */ 198 char *boot_args = NULL; 199 char *boot_file = NULL; 200 201 vm_offset_t physical_start; 202 vm_offset_t physical_freestart; 203 vm_offset_t physical_freeend; 204 vm_offset_t physical_end; 205 u_int free_pages; 206 vm_offset_t pagetables_start; 207 int physmem = 0; 208 209 /*int debug_flags;*/ 210 #ifndef PMAP_STATIC_L1S 211 int max_processes = 64; /* Default number */ 212 #endif /* !PMAP_STATIC_L1S */ 213 214 /* Physical and virtual addresses for some global pages */ 215 pv_addr_t systempage; 216 pv_addr_t irqstack; 217 pv_addr_t undstack; 218 pv_addr_t abtstack; 219 pv_addr_t kernelstack; 220 221 vm_offset_t msgbufphys; 222 223 extern u_int data_abort_handler_address; 224 extern u_int prefetch_abort_handler_address; 225 extern u_int undefined_handler_address; 226 227 #ifdef PMAP_DEBUG 228 extern int pmap_debug_level; 229 #endif 230 231 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */ 232 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */ 233 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */ 234 235 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 236 237 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 238 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 239 240 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 241 242 struct user *proc0paddr; 243 244 /* Prototypes */ 245 246 void consinit(void); 247 void kgdb_port_init(void); 248 249 static int 250 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 251 int cacheable, bus_space_handle_t * bshp); 252 static void map_builtin_peripherals(void); 253 static void copy_io_area_map(pd_entry_t * new_pd); 254 255 /* A load of console goo. */ 256 #include "vga.h" 257 #if NVGA > 0 258 #include <dev/ic/mc6845reg.h> 259 #include <dev/ic/pcdisplayvar.h> 260 #include <dev/ic/vgareg.h> 261 #include <dev/ic/vgavar.h> 262 #endif 263 264 #include "com.h" 265 #if NCOM > 0 266 #include <dev/ic/comreg.h> 267 #include <dev/ic/comvar.h> 268 #endif 269 270 #include "sscom.h" 271 #if NSSCOM > 0 272 #include "opt_sscom.h" 273 #include <arm/s3c2xx0/sscom_var.h> 274 #endif 275 276 /* 277 * Define the default console speed for the board. This is generally 278 * what the firmware provided with the board defaults to. 279 */ 280 #ifndef CONSPEED 281 #define CONSPEED B115200 /* TTYDEF_SPEED */ 282 #endif 283 #ifndef CONMODE 284 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 285 #endif 286 287 int comcnspeed = CONSPEED; 288 int comcnmode = CONMODE; 289 290 struct bus_space bootstrap_bs_tag; 291 292 /* 293 * void cpu_reboot(int howto, char *bootstr) 294 * 295 * Reboots the system 296 * 297 * Deal with any syncing, unmounting, dumping and shutdown hooks, 298 * then reset the CPU. 299 */ 300 void 301 cpu_reboot(int howto, char *bootstr) 302 { 303 304 cpu_reset_address = vtophys((u_int)s3c2800_softreset); 305 306 /* 307 * If we are still cold then hit the air brakes 308 * and crash to earth fast 309 */ 310 if (cold) { 311 doshutdownhooks(); 312 printf("The operating system has halted.\n"); 313 printf("Please press any key to reboot.\n\n"); 314 cngetc(); 315 printf("rebooting...\n"); 316 cpu_reset(); 317 /* NOTREACHED */ 318 } 319 /* Disable console buffering */ 320 321 /* 322 * If RB_NOSYNC was not specified sync the discs. 323 * Note: Unless cold is set to 1 here, syslogd will die during the 324 * unmount. It looks like syslogd is getting woken up only to find 325 * that it cannot page part of the binary in as the filesystem has 326 * been unmounted. 327 */ 328 if (!(howto & RB_NOSYNC)) 329 bootsync(); 330 331 /* Say NO to interrupts */ 332 splhigh(); 333 334 /* Do a dump if requested. */ 335 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 336 dumpsys(); 337 338 /* Run any shutdown hooks */ 339 doshutdownhooks(); 340 341 /* Make sure IRQ's are disabled */ 342 IRQdisable; 343 344 if (howto & RB_HALT) { 345 printf("The operating system has halted.\n"); 346 printf("Please press any key to reboot.\n\n"); 347 cngetc(); 348 } 349 printf("rebooting...\n"); 350 cpu_reset(); 351 /* NOTREACHED */ 352 } 353 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v)) 354 355 /* 356 * u_int initarm(...) 357 * 358 * Initial entry point on startup. This gets called before main() is 359 * entered. 360 * It should be responsible for setting up everything that must be 361 * in place when main is called. 362 * This includes 363 * Taking a copy of the boot configuration structure. 364 * Initialising the physical console so characters can be printed. 365 * Setting up page tables for the kernel 366 * Relocating the kernel to the bottom of physical memory 367 */ 368 369 u_int 370 initarm(void *arg) 371 { 372 int loop; 373 int loop1; 374 u_int l1pagetable; 375 extern int etext asm("_etext"); 376 extern int end asm("_end"); 377 pv_addr_t kernel_l1pt; 378 struct s3c2800_softc temp_softc; /* used to initialize IO regs */ 379 int progress_counter = 0; 380 381 #ifdef DO_MEMORY_DISK 382 vm_offset_t md_root_start; 383 #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE) 384 #endif 385 386 #define gpio_read8(reg) bus_space_read_1(temp_softc.sc_sx.sc_iot, \ 387 temp_softc.sc_sx.sc_gpio_ioh, (reg)) 388 389 #define LEDSTEP() __LED(progress_counter++) 390 391 #define pdatc (*(volatile uint8_t *)(S3C2800_GPIO_BASE+GPIO_PDATC)) 392 #define __LED(x) (pdatc = (pdatc & ~0x07) | (~(x) & 0x07)) 393 394 LEDSTEP(); 395 /* 396 * Heads up ... Setup the CPU / MMU / TLB functions 397 */ 398 if (set_cpufuncs()) 399 panic("cpu not recognized!"); 400 401 LEDSTEP(); 402 403 map_builtin_peripherals(); 404 405 /* 406 * prepare fake bus space tag 407 */ 408 bootstrap_bs_tag = s3c2xx0_bs_tag; 409 bootstrap_bs_tag.bs_map = bootstrap_bs_map; 410 s3c2xx0_softc = &temp_softc.sc_sx; 411 s3c2xx0_softc->sc_iot = &bootstrap_bs_tag; 412 413 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_GPIO_BASE, 414 S3C2800_GPIO_SIZE, 0, &temp_softc.sc_sx.sc_gpio_ioh); 415 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_INTCTL_BASE, 416 S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_sx.sc_intctl_ioh); 417 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_CLKMAN_BASE, 418 S3C2800_CLKMAN_SIZE, 0, &temp_softc.sc_sx.sc_clkman_ioh); 419 420 #undef __LED 421 #define __LED(x) \ 422 bus_space_write_1(&bootstrap_bs_tag, \ 423 temp_softc.sc_sx.sc_gpio_ioh, \ 424 GPIO_PDATC, (~(x) & 0x07) | \ 425 (bus_space_read_1(&bootstrap_bs_tag, \ 426 temp_softc.sc_sx.sc_gpio_ioh, GPIO_PDATC ) & ~0x07)) 427 428 LEDSTEP(); 429 430 /* Disable all peripheral interrupts */ 431 bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_sx.sc_intctl_ioh, 432 INTCTL_INTMSK, 0); 433 434 s3c2800_clock_freq(&temp_softc); 435 436 consinit(); 437 #ifdef VERBOSE_INIT_ARM 438 printf("consinit done\n"); 439 #endif 440 441 #ifdef KGDB 442 LEDSTEP(); 443 kgdb_port_init(); 444 #endif 445 LEDSTEP(); 446 447 #ifdef VERBOSE_INIT_ARM 448 /* Talk to the user */ 449 printf("\nNetBSD/evbarm (SMDK2800) booting ...\n"); 450 #endif 451 452 /* 453 * Ok we have the following memory map 454 * 455 * Physical Address Range Description 456 * ----------------------- ---------------------------------- 457 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB) 458 * 0x02000000 - 0x020fffff AMD flash Memory (1MB) 459 * or (depend on DIPSW setting) 460 * 0x00000000 - 0x000fffff AMD flash Memory (1MB) 461 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB) 462 * 463 * 0x08000000 - 0x09ffffff SDRAM (32MB) 464 * 0x20000000 - 0x3fffffff PCI space 465 * 466 * The initarm() has the responsibility for creating the kernel 467 * page tables. 468 * It must also set up various memory pointers that are used 469 * by pmap etc. 470 */ 471 472 /* Fake bootconfig structure for the benefit of pmap.c */ 473 /* XXX must make the memory description h/w independent */ 474 bootconfig.dramblocks = 1; 475 bootconfig.dram[0].address = SDRAM_START; 476 bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE; 477 478 /* 479 * Set up the variables that define the availablilty of 480 * physical memory. For now, we're going to set 481 * physical_freestart to 0x08200000 (where the kernel 482 * was loaded), and allocate the memory we need downwards. 483 * If we get too close to the bottom of SDRAM, we 484 * will panic. We will update physical_freestart and 485 * physical_freeend later to reflect what pmap_bootstrap() 486 * wants to see. 487 * 488 * XXX pmap_bootstrap() needs an enema. 489 */ 490 physical_start = bootconfig.dram[0].address; 491 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 492 493 #if DO_MEMORY_DISK 494 #ifdef MEMORY_DISK_ROOT_ROM 495 md_root_start = MEMORY_DISK_ROOT_ADDR; 496 boothowto |= RB_RDONLY; 497 #else 498 /* Reserve physmem for ram disk */ 499 md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1)); 500 printf("Reserve %ld bytes for memory disk\n", 501 physical_end - md_root_start); 502 /* copy fs contents */ 503 memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR, 504 MD_ROOT_SIZE); 505 physical_end = md_root_start; 506 #endif 507 #endif 508 509 physical_freestart = 0x08000000UL; /* XXX */ 510 physical_freeend = 0x08200000UL; 511 512 physmem = (physical_end - physical_start) / PAGE_SIZE; 513 514 #ifdef VERBOSE_INIT_ARM 515 /* Tell the user about the memory */ 516 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 517 physical_start, physical_end - 1); 518 #endif 519 520 /* 521 * XXX 522 * Okay, the kernel starts 2MB in from the bottom of physical 523 * memory. We are going to allocate our bootstrap pages downwards 524 * from there. 525 * 526 * We need to allocate some fixed page tables to get the kernel 527 * going. We allocate one page directory and a number of page 528 * tables and store the physical addresses in the kernel_pt_table 529 * array. 530 * 531 * The kernel page directory must be on a 16K boundary. The page 532 * tables must be on 4K bounaries. What we do is allocate the 533 * page directory on the first 16K boundary that we encounter, and 534 * the page tables on 4K boundaries otherwise. Since we allocate 535 * at least 3 L2 page tables, we are guaranteed to encounter at 536 * least one 16K aligned region. 537 */ 538 539 #ifdef VERBOSE_INIT_ARM 540 printf("Allocating page tables\n"); 541 #endif 542 543 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 544 545 #ifdef VERBOSE_INIT_ARM 546 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 547 physical_freestart, free_pages, free_pages); 548 #endif 549 550 /* Define a macro to simplify memory allocation */ 551 #define valloc_pages(var, np) \ 552 alloc_pages((var).pv_pa, (np)); \ 553 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 554 555 #define alloc_pages(var, np) \ 556 physical_freeend -= ((np) * PAGE_SIZE); \ 557 if (physical_freeend < physical_freestart) \ 558 panic("initarm: out of memory"); \ 559 (var) = physical_freeend; \ 560 free_pages -= (np); \ 561 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 562 563 loop1 = 0; 564 kernel_l1pt.pv_pa = 0; 565 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 566 /* Are we 16KB aligned for an L1 ? */ 567 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 568 && kernel_l1pt.pv_pa == 0) { 569 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 570 } else { 571 valloc_pages(kernel_pt_table[loop1], 572 L2_TABLE_SIZE / PAGE_SIZE); 573 ++loop1; 574 } 575 } 576 577 /* This should never be able to happen but better confirm that. */ 578 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0) 579 panic("initarm: Failed to align the kernel page directory\n"); 580 581 /* 582 * Allocate a page for the system page mapped to V0x00000000 583 * This page will just contain the system vectors and can be 584 * shared by all processes. 585 */ 586 alloc_pages(systempage.pv_pa, 1); 587 588 /* Allocate stacks for all modes */ 589 valloc_pages(irqstack, IRQ_STACK_SIZE); 590 valloc_pages(abtstack, ABT_STACK_SIZE); 591 valloc_pages(undstack, UND_STACK_SIZE); 592 valloc_pages(kernelstack, UPAGES); 593 594 #ifdef VERBOSE_INIT_ARM 595 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 596 irqstack.pv_va); 597 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 598 abtstack.pv_va); 599 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 600 undstack.pv_va); 601 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 602 kernelstack.pv_va); 603 #endif 604 605 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 606 607 LEDSTEP(); 608 609 /* 610 * Ok we have allocated physical pages for the primary kernel 611 * page tables 612 */ 613 614 #ifdef VERBOSE_INIT_ARM 615 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 616 #endif 617 618 /* 619 * Now we start construction of the L1 page table 620 * We start by mapping the L2 page tables into the L1. 621 * This means that we can replace L1 mappings later on if necessary 622 */ 623 l1pagetable = kernel_l1pt.pv_pa; 624 625 /* Map the L2 pages tables in the L1 page table */ 626 pmap_link_l2pt(l1pagetable, 0x00000000, 627 &kernel_pt_table[KERNEL_PT_SYS]); 628 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 629 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 630 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 631 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 632 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 633 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 634 635 /* update the top of the kernel VM */ 636 pmap_curmaxkvaddr = 637 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 638 639 #ifdef VERBOSE_INIT_ARM 640 printf("Mapping kernel\n"); 641 #endif 642 643 /* Now we fill in the L2 pagetable for the kernel static code/data */ 644 { 645 size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE; 646 size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE; 647 u_int logical; 648 649 textsize = (textsize + PGOFSET) & ~PGOFSET; 650 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 651 652 logical = 0x00200000; /* offset of kernel in RAM */ 653 654 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 655 physical_start + logical, textsize, 656 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 657 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 658 physical_start + logical, totalsize - textsize, 659 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 660 } 661 662 #ifdef VERBOSE_INIT_ARM 663 printf("Constructing L2 page tables\n"); 664 #endif 665 666 /* Map the stack pages */ 667 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 668 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 669 PTE_CACHE); 670 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 671 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 672 PTE_CACHE); 673 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 674 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 675 PTE_CACHE); 676 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 677 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 678 679 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 680 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 681 682 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 683 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 684 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 685 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 686 } 687 688 /* Map the vector page. */ 689 #if 1 690 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 691 * cache-clean code there. */ 692 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 693 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 694 #else 695 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 696 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 697 #endif 698 699 #if 0 700 /* Map the core memory needed before autoconfig */ 701 loop = 0; 702 while (l1_sec_table[loop].size) { 703 vm_size_t sz; 704 705 #ifdef VERBOSE_INIT_ARM 706 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa, 707 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1, 708 l1_sec_table[loop].va); 709 #endif 710 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE) 711 pmap_map_section(l1pagetable, 712 l1_sec_table[loop].va + sz, 713 l1_sec_table[loop].pa + sz, 714 l1_sec_table[loop].prot, 715 l1_sec_table[loop].cache); 716 ++loop; 717 } 718 #endif 719 720 #ifdef MEMORY_DISK_DYNAMIC 721 /* map MD root image */ 722 bootstrap_bs_map(&bootstrap_bs_tag, md_root_start, MD_ROOT_SIZE, 723 BUS_SPACE_MAP_CACHEABLE | BUS_SPACE_MAP_LINEAR, 724 (bus_space_handle_t *)&md_root_start); 725 726 md_root_setconf((void *)md_root_start, MD_ROOT_SIZE); 727 #endif /* MEMORY_DISK_DYNAMIC */ 728 /* 729 * map integrated peripherals at same address in l1pagetable 730 * so that we can continue to use console. 731 */ 732 copy_io_area_map((pd_entry_t *)l1pagetable); 733 734 /* 735 * Now we have the real page tables in place so we can switch to them. 736 * Once this is done we will be running with the REAL kernel page 737 * tables. 738 */ 739 740 /* 741 * Update the physical_freestart/physical_freeend/free_pages 742 * variables. 743 */ 744 { 745 physical_freestart = physical_start + 746 (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE); 747 physical_freeend = physical_end; 748 free_pages = 749 (physical_freeend - physical_freestart) / PAGE_SIZE; 750 } 751 752 /* Switch tables */ 753 #ifdef VERBOSE_INIT_ARM 754 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 755 physical_freestart, free_pages, free_pages); 756 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 757 #endif 758 LEDSTEP(); 759 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 760 setttb(kernel_l1pt.pv_pa); 761 cpu_tlb_flushID(); 762 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 763 764 /* 765 * Moved from cpu_startup() as data_abort_handler() references 766 * this during uvm init 767 */ 768 proc0paddr = (struct user *)kernelstack.pv_va; 769 lwp0.l_addr = proc0paddr; 770 771 #ifdef VERBOSE_INIT_ARM 772 printf("done!\n"); 773 #endif 774 775 #if 0 776 /* 777 * The IFPGA registers have just moved. 778 * Detach the diagnostic serial port and reattach at the new address. 779 */ 780 plcomcndetach(); 781 /* 782 * XXX this should only be done in main() but it useful to 783 * have output earlier ... 784 */ 785 consinit(); 786 #endif 787 788 LEDSTEP(); 789 #ifdef VERBOSE_INIT_ARM 790 printf("bootstrap done.\n"); 791 #endif 792 793 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 794 795 /* 796 * Pages were allocated during the secondary bootstrap for the 797 * stacks for different CPU modes. 798 * We must now set the r13 registers in the different CPU modes to 799 * point to these stacks. 800 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 801 * of the stack memory. 802 */ 803 #ifdef VERBOSE_INIT_ARM 804 printf("init subsystems: stacks "); 805 #endif 806 807 set_stackptr(PSR_IRQ32_MODE, 808 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 809 set_stackptr(PSR_ABT32_MODE, 810 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 811 set_stackptr(PSR_UND32_MODE, 812 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 813 814 LEDSTEP(); 815 816 /* 817 * Well we should set a data abort handler. 818 * Once things get going this will change as we will need a proper 819 * handler. 820 * Until then we will use a handler that just panics but tells us 821 * why. 822 * Initialisation of the vectors will just panic on a data abort. 823 * This just fills in a slighly better one. 824 */ 825 #ifdef VERBOSE_INIT_ARM 826 printf("vectors "); 827 #endif 828 data_abort_handler_address = (u_int)data_abort_handler; 829 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 830 undefined_handler_address = (u_int)undefinedinstruction_bounce; 831 832 /* Initialise the undefined instruction handlers */ 833 #ifdef VERBOSE_INIT_ARM 834 printf("undefined "); 835 #endif 836 undefined_init(); 837 838 LEDSTEP(); 839 840 /* Load memory into UVM. */ 841 #ifdef VERBOSE_INIT_ARM 842 printf("page "); 843 #endif 844 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 845 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 846 atop(physical_freestart), atop(physical_freeend), 847 VM_FREELIST_DEFAULT); 848 849 LEDSTEP(); 850 /* Boot strap pmap telling it where the kernel page table is */ 851 #ifdef VERBOSE_INIT_ARM 852 printf("pmap "); 853 #endif 854 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE, 855 KERNEL_VM_BASE + KERNEL_VM_SIZE); 856 857 LEDSTEP(); 858 859 /* Setup the IRQ system */ 860 #ifdef VERBOSE_INIT_ARM 861 printf("irq "); 862 #endif 863 /* XXX irq_init(); */ 864 865 #ifdef VERBOSE_INIT_ARM 866 printf("done.\n"); 867 #endif 868 869 #ifdef BOOTHOWTO_INIT 870 boothowto |= BOOTHOWTO_INIT; 871 #endif 872 { 873 uint8_t gpio = ~gpio_read8(GPIO_PDATF); 874 875 if (gpio & (1<<5)) /* SW3 */ 876 boothowto ^= RB_SINGLE; 877 if (gpio & (1<<7)) /* SW7 */ 878 boothowto ^= RB_KDB; 879 #ifdef VERBOSE_INIT_ARM 880 printf( "sw: %x boothowto: %x\n", gpio, boothowto ); 881 #endif 882 } 883 884 #ifdef IPKDB 885 /* Initialise ipkdb */ 886 ipkdb_init(); 887 if (boothowto & RB_KDB) 888 ipkdb_connect(0); 889 #endif 890 891 #ifdef KGDB 892 if (boothowto & RB_KDB) { 893 kgdb_debug_init = 1; 894 kgdb_connect(1); 895 } 896 #endif 897 898 #if NKSYMS || defined(DDB) || defined(LKM) 899 /* Firmware doesn't load symbols. */ 900 ksyms_init(0, NULL, NULL); 901 #endif 902 903 #ifdef DDB 904 db_machine_init(); 905 if (boothowto & RB_KDB) 906 Debugger(); 907 #endif 908 909 /* We return the new stack pointer address */ 910 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP); 911 } 912 913 void 914 consinit(void) 915 { 916 static int consinit_done = 0; 917 bus_space_tag_t iot = s3c2xx0_softc->sc_iot; 918 int pclk = s3c2xx0_softc->sc_pclk; 919 920 if (consinit_done != 0) 921 return; 922 923 consinit_done = 1; 924 925 #if NSSCOM > 0 926 #ifdef SSCOM0CONSOLE 927 if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed, 928 pclk, comcnmode)) 929 return; 930 #endif 931 #ifdef SSCOM1CONSOLE 932 if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed, 933 pclk, comcnmode)) 934 return; 935 #endif 936 #endif /* NSSCOM */ 937 #if NCOM>0 && defined(CONCOMADDR) 938 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed, 939 COM_FREQ, comcnmode)) 940 panic("can't init serial console @%x", CONCOMADDR); 941 return; 942 #endif 943 944 consinit_done = 0; 945 } 946 947 948 #ifdef KGDB 949 950 #if (NSSCOM > 0) 951 952 #ifdef KGDB_DEVNAME 953 const char kgdb_devname[] = KGDB_DEVNAME; 954 #else 955 const char kgdb_devname[] = ""; 956 #endif 957 958 #ifndef KGDB_DEVMODE 959 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */ 960 #endif 961 int kgdb_sscom_mode = KGDB_DEVMODE; 962 963 #endif /* NSSCOM */ 964 965 void 966 kgdb_port_init(void) 967 { 968 #if (NSSCOM > 0) 969 int unit = -1; 970 int pclk = s3c2xx0_softc->sc_pclk; 971 972 if (strcmp(kgdb_devname, "sscom0") == 0) 973 unit = 0; 974 else if (strcmp(kgdb_devname, "sscom1") == 0) 975 unit = 1; 976 977 if (unit >= 0) { 978 s3c2800_sscom_kgdb_attach(s3c2xx0_softc->sc_iot, 979 unit, kgdb_rate, pclk, kgdb_sscom_mode); 980 } 981 #endif 982 } 983 #endif 984 985 static __inline 986 pd_entry_t * 987 read_ttb(void) 988 { 989 long ttb; 990 991 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb)); 992 993 994 return (pd_entry_t *)(ttb & ~((1 << 14) - 1)); 995 } 996 997 998 static __inline void 999 writeback_dcache_line(vaddr_t va) 1000 { 1001 /* writeback Dcache line */ 1002 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9 1003 * assume write-through cache, and always flush Dcache instead of 1004 * cleaning it. Since Boot loader maps page table with write-back 1005 * cached, we really need to clean Dcache. */ 1006 asm("mcr p15, 0, %0, c7, c10, 1" 1007 : : "r"(va)); 1008 } 1009 1010 static __inline void 1011 clean_dcache_line(vaddr_t va) 1012 { 1013 /* writeback and invalidate Dcache line */ 1014 asm("mcr p15, 0, %0, c7, c14, 1" 1015 : : "r"(va)); 1016 } 1017 1018 static vaddr_t section_free = SMDK2800_VBASE_FREE; 1019 1020 static void 1021 map_builtin_peripherals(void) 1022 { 1023 pd_entry_t *pagedir = read_ttb(); 1024 int i, sec; 1025 1026 for (i=0; i < 2; ++i) { 1027 1028 pmap_map_section((vaddr_t)pagedir, 1029 SMDK2800_IO_AREA_VBASE + (i <<L1_S_SHIFT), 1030 S3C2800_PERIPHERALS + (i << L1_S_SHIFT), 1031 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 1032 1033 sec = (SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT) + i; 1034 writeback_dcache_line((vaddr_t)&pagedir[sec]); 1035 } 1036 1037 cpu_drain_writebuf(); 1038 cpu_tlb_flushD(); 1039 } 1040 1041 /* 1042 * simple memory mapping function used in early bootstrap stage 1043 * before pmap is initialized. 1044 * This assumes only peripheral registers to map. they are mapped to 1045 * fixed address with section mapping. 1046 */ 1047 static int 1048 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 1049 int flag, bus_space_handle_t * bshp) 1050 { 1051 long offset; 1052 int modified = 0; 1053 pd_entry_t *pagedir = read_ttb(); 1054 /* This assumes PA==VA for page directory */ 1055 1056 if (S3C2800_PERIPHERALS <= bpa && bpa < S3C2800_PERIPHERALS + 0x200000) { 1057 offset = bpa - S3C2800_PERIPHERALS; 1058 if (offset < 0 || 2 * L1_S_SIZE < offset) 1059 panic("bootstrap_bs_map: can't map"); 1060 *bshp = (bus_space_handle_t)(SMDK2800_IO_AREA_VBASE + offset); 1061 } else { 1062 vaddr_t va; 1063 bus_addr_t pa; 1064 int cacheable = flag & BUS_SPACE_MAP_CACHEABLE; 1065 1066 1067 size = (size + L1_S_OFFSET) & ~L1_S_OFFSET; 1068 pa = bpa & ~L1_S_OFFSET; 1069 offset = bpa - pa; 1070 1071 va = section_free; 1072 while (size) { 1073 pmap_map_section((vaddr_t)pagedir, va, 1074 pa, VM_PROT_READ | VM_PROT_WRITE, 1075 cacheable ? PTE_CACHE : PTE_NOCACHE); 1076 writeback_dcache_line((vaddr_t)& pagedir[va >> L1_S_SHIFT]); 1077 va += L1_S_SIZE; 1078 pa += L1_S_SIZE; 1079 size -= L1_S_SIZE; 1080 } 1081 1082 *bshp = (bus_space_handle_t)(section_free + offset); 1083 section_free = va; 1084 } 1085 1086 1087 if (modified) { 1088 1089 cpu_drain_writebuf(); 1090 cpu_tlb_flushD(); 1091 } 1092 return (0); 1093 } 1094 1095 static void 1096 copy_io_area_map(pd_entry_t * new_pd) 1097 { 1098 pd_entry_t *cur_pd = read_ttb(); 1099 int sec; 1100 1101 for (sec = SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT; 1102 sec < (section_free >> L1_S_SHIFT); ++sec) { 1103 new_pd[sec] = cur_pd[sec]; 1104 } 1105 } 1106
Indexes created Wed Oct 01 07:09:59 GMT 2025