smdk2800_machdep.c revision 1.12 1 /* $NetBSD: smdk2800_machdep.c,v 1.12 2003/05/22 05:47:10 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 2002 Fujitsu Component Limited
5 * Copyright (c) 2002 Genetec Corporation
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of The Fujitsu Component Limited nor the name of
17 * Genetec corporation may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35 /*
36 * Copyright (c) 2001,2002 ARM Ltd
37 * All rights reserved.
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 * 1. Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * 2. Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in the
46 * documentation and/or other materials provided with the distribution.
47 * 3. The name of the company may not be used to endorse or promote
48 * products derived from this software without specific prior written
49 * permission.
50 *
51 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND
52 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
53 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
54 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD
55 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
56 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
57 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
58 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
59 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
60 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
61 * POSSIBILITY OF SUCH DAMAGE.
62 *
63 */
64
65 /*
66 * Copyright (c) 1997,1998 Mark Brinicombe.
67 * Copyright (c) 1997,1998 Causality Limited.
68 * All rights reserved.
69 *
70 * Redistribution and use in source and binary forms, with or without
71 * modification, are permitted provided that the following conditions
72 * are met:
73 * 1. Redistributions of source code must retain the above copyright
74 * notice, this list of conditions and the following disclaimer.
75 * 2. Redistributions in binary form must reproduce the above copyright
76 * notice, this list of conditions and the following disclaimer in the
77 * documentation and/or other materials provided with the distribution.
78 * 3. All advertising materials mentioning features or use of this software
79 * must display the following acknowledgement:
80 * This product includes software developed by Mark Brinicombe
81 * for the NetBSD Project.
82 * 4. The name of the company nor the name of the author may be used to
83 * endorse or promote products derived from this software without specific
84 * prior written permission.
85 *
86 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
87 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
88 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
89 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
90 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
91 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
92 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
93 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
94 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
95 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
96 * SUCH DAMAGE.
97 *
98 * Machine dependant functions for kernel setup for integrator board
99 *
100 * Created : 24/11/97
101 */
102
103 /*
104 * Machine dependant functions for kernel setup for Samsung SMDK2800
105 * derived from integrator_machdep.c
106 */
107
108 #include "opt_ddb.h"
109 #include "opt_kgdb.h"
110 #include "opt_ipkdb.h"
111 #include "opt_pmap_debug.h"
112 #include "opt_md.h"
113 #include "pci.h"
114
115 #include <sys/param.h>
116 #include <sys/device.h>
117 #include <sys/systm.h>
118 #include <sys/kernel.h>
119 #include <sys/exec.h>
120 #include <sys/proc.h>
121 #include <sys/msgbuf.h>
122 #include <sys/reboot.h>
123 #include <sys/termios.h>
124 #include <sys/ksyms.h>
125
126 #include <uvm/uvm_extern.h>
127
128 #include <dev/cons.h>
129 #include <dev/md.h>
130
131 #include <machine/db_machdep.h>
132 #include <ddb/db_sym.h>
133 #include <ddb/db_extern.h>
134 #ifdef KGDB
135 #include <sys/kgdb.h>
136 #endif
137
138 #include <machine/bootconfig.h>
139 #include <machine/bus.h>
140 #include <machine/cpu.h>
141 #include <machine/frame.h>
142 #include <machine/intr.h>
143 #include <arm/undefined.h>
144
145 #include <arm/arm32/machdep.h>
146
147 #include <arm/s3c2xx0/s3c2800reg.h>
148 #include <arm/s3c2xx0/s3c2800var.h>
149
150 #include "ksyms.h"
151
152 #ifndef SDRAM_START
153 #define SDRAM_START S3C2800_DBANK0_START
154 #endif
155 #ifndef SDRAM_SIZE
156 #define SDRAM_SIZE (32*1024*1024)
157 #endif
158
159 /*
160 * Address to map I/O registers in early initialize stage.
161 */
162 #define SMDK2800_IO_AREA_VBASE 0xfd000000
163 #define SMDK2800_VBASE_FREE 0xfd200000
164
165 /* Kernel text starts 2MB in from the bottom of the kernel address space. */
166 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
167 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
168
169 /*
170 * The range 0xc1000000 - 0xccffffff is available for kernel VM space
171 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
172 */
173 #define KERNEL_VM_SIZE 0x0C000000
174
175 /* Memory disk support */
176 #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR)
177 #define DO_MEMORY_DISK
178 /* We have memory disk image outside of the kernel on ROM. */
179 #ifdef MEMORY_DISK_ROOT_ROM
180 /* map the image directory and use read-only */
181 #else
182 /* copy the image to RAM */
183 #endif
184 #endif
185
186
187 /*
188 * Address to call from cpu_reset() to reset the machine.
189 * This is machine architecture dependant as it varies depending
190 * on where the ROM appears when you turn the MMU off.
191 */
192 u_int cpu_reset_address = (u_int)0;
193
194 /* Define various stack sizes in pages */
195 #define IRQ_STACK_SIZE 1
196 #define ABT_STACK_SIZE 1
197 #ifdef IPKDB
198 #define UND_STACK_SIZE 2
199 #else
200 #define UND_STACK_SIZE 1
201 #endif
202
203 BootConfig bootconfig; /* Boot config storage */
204 char *boot_args = NULL;
205 char *boot_file = NULL;
206
207 vm_offset_t physical_start;
208 vm_offset_t physical_freestart;
209 vm_offset_t physical_freeend;
210 vm_offset_t physical_end;
211 u_int free_pages;
212 vm_offset_t pagetables_start;
213 int physmem = 0;
214
215 /*int debug_flags;*/
216 #ifndef PMAP_STATIC_L1S
217 int max_processes = 64; /* Default number */
218 #endif /* !PMAP_STATIC_L1S */
219
220 /* Physical and virtual addresses for some global pages */
221 pv_addr_t systempage;
222 pv_addr_t irqstack;
223 pv_addr_t undstack;
224 pv_addr_t abtstack;
225 pv_addr_t kernelstack;
226
227 vm_offset_t msgbufphys;
228
229 extern u_int data_abort_handler_address;
230 extern u_int prefetch_abort_handler_address;
231 extern u_int undefined_handler_address;
232
233 #ifdef PMAP_DEBUG
234 extern int pmap_debug_level;
235 #endif
236
237 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
238 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
239 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */
240
241 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
242
243 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
244 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
245
246 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
247
248 struct user *proc0paddr;
249
250 /* Prototypes */
251
252 void consinit(void);
253 void kgdb_port_init(void);
254
255 static int
256 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
257 int cacheable, bus_space_handle_t * bshp);
258 static void map_builtin_peripherals(void);
259 static void copy_io_area_map(pd_entry_t * new_pd);
260
261 /* A load of console goo. */
262 #include "vga.h"
263 #if NVGA > 0
264 #include <dev/ic/mc6845reg.h>
265 #include <dev/ic/pcdisplayvar.h>
266 #include <dev/ic/vgareg.h>
267 #include <dev/ic/vgavar.h>
268 #endif
269
270 #include "com.h"
271 #if NCOM > 0
272 #include <dev/ic/comreg.h>
273 #include <dev/ic/comvar.h>
274 #endif
275
276 #include "sscom.h"
277 #if NSSCOM > 0
278 #include "opt_sscom.h"
279 #include <arm/s3c2xx0/sscom_var.h>
280 #endif
281
282 /*
283 * Define the default console speed for the board. This is generally
284 * what the firmware provided with the board defaults to.
285 */
286 #ifndef CONSPEED
287 #define CONSPEED B115200 /* TTYDEF_SPEED */
288 #endif
289 #ifndef CONMODE
290 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
291 #endif
292
293 int comcnspeed = CONSPEED;
294 int comcnmode = CONMODE;
295
296 struct bus_space bootstrap_bs_tag;
297
298 /*
299 * void cpu_reboot(int howto, char *bootstr)
300 *
301 * Reboots the system
302 *
303 * Deal with any syncing, unmounting, dumping and shutdown hooks,
304 * then reset the CPU.
305 */
306 void
307 cpu_reboot(int howto, char *bootstr)
308 {
309
310 cpu_reset_address = vtophys((u_int)s3c2800_softreset);
311
312 /*
313 * If we are still cold then hit the air brakes
314 * and crash to earth fast
315 */
316 if (cold) {
317 doshutdownhooks();
318 printf("The operating system has halted.\n");
319 printf("Please press any key to reboot.\n\n");
320 cngetc();
321 printf("rebooting...\n");
322 cpu_reset();
323 /* NOTREACHED */
324 }
325 /* Disable console buffering */
326
327 /*
328 * If RB_NOSYNC was not specified sync the discs.
329 * Note: Unless cold is set to 1 here, syslogd will die during the
330 * unmount. It looks like syslogd is getting woken up only to find
331 * that it cannot page part of the binary in as the filesystem has
332 * been unmounted.
333 */
334 if (!(howto & RB_NOSYNC))
335 bootsync();
336
337 /* Say NO to interrupts */
338 splhigh();
339
340 /* Do a dump if requested. */
341 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
342 dumpsys();
343
344 /* Run any shutdown hooks */
345 doshutdownhooks();
346
347 /* Make sure IRQ's are disabled */
348 IRQdisable;
349
350 if (howto & RB_HALT) {
351 printf("The operating system has halted.\n");
352 printf("Please press any key to reboot.\n\n");
353 cngetc();
354 }
355 printf("rebooting...\n");
356 cpu_reset();
357 /* NOTREACHED */
358 }
359 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v))
360
361 /*
362 * u_int initarm(...)
363 *
364 * Initial entry point on startup. This gets called before main() is
365 * entered.
366 * It should be responsible for setting up everything that must be
367 * in place when main is called.
368 * This includes
369 * Taking a copy of the boot configuration structure.
370 * Initialising the physical console so characters can be printed.
371 * Setting up page tables for the kernel
372 * Relocating the kernel to the bottom of physical memory
373 */
374
375 u_int
376 initarm(void *arg)
377 {
378 int loop;
379 int loop1;
380 u_int l1pagetable;
381 extern int etext asm("_etext");
382 extern int end asm("_end");
383 pv_addr_t kernel_l1pt;
384 struct s3c2800_softc temp_softc; /* used to initialize IO regs */
385 int progress_counter = 0;
386
387 #ifdef DO_MEMORY_DISK
388 vm_offset_t md_root_start;
389 #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE)
390 #endif
391
392 #define gpio_read8(reg) bus_space_read_1(temp_softc.sc_sx.sc_iot, \
393 temp_softc.sc_sx.sc_gpio_ioh, (reg))
394
395 #define LEDSTEP() __LED(progress_counter++)
396
397 #define pdatc (*(volatile uint8_t *)(S3C2800_GPIO_BASE+GPIO_PDATC))
398 #define __LED(x) (pdatc = (pdatc & ~0x07) | (~(x) & 0x07))
399
400 LEDSTEP();
401 /*
402 * Heads up ... Setup the CPU / MMU / TLB functions
403 */
404 if (set_cpufuncs())
405 panic("cpu not recognized!");
406
407 LEDSTEP();
408
409 map_builtin_peripherals();
410
411 /*
412 * prepare fake bus space tag
413 */
414 bootstrap_bs_tag = s3c2xx0_bs_tag;
415 bootstrap_bs_tag.bs_map = bootstrap_bs_map;
416 s3c2xx0_softc = &temp_softc.sc_sx;
417 s3c2xx0_softc->sc_iot = &bootstrap_bs_tag;
418
419 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_GPIO_BASE,
420 S3C2800_GPIO_SIZE, 0, &temp_softc.sc_sx.sc_gpio_ioh);
421 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_INTCTL_BASE,
422 S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_sx.sc_intctl_ioh);
423 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_CLKMAN_BASE,
424 S3C2800_CLKMAN_SIZE, 0, &temp_softc.sc_sx.sc_clkman_ioh);
425
426 #undef __LED
427 #define __LED(x) \
428 bus_space_write_1(&bootstrap_bs_tag, \
429 temp_softc.sc_sx.sc_gpio_ioh, \
430 GPIO_PDATC, (~(x) & 0x07) | \
431 (bus_space_read_1(&bootstrap_bs_tag, \
432 temp_softc.sc_sx.sc_gpio_ioh, GPIO_PDATC ) & ~0x07))
433
434 LEDSTEP();
435
436 /* Disable all peripheral interrupts */
437 bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_sx.sc_intctl_ioh,
438 INTCTL_INTMSK, 0);
439
440 s3c2800_clock_freq(&temp_softc);
441
442 consinit();
443 #ifdef VERBOSE_INIT_ARM
444 printf("consinit done\n");
445 #endif
446
447 #ifdef KGDB
448 LEDSTEP();
449 kgdb_port_init();
450 #endif
451 LEDSTEP();
452
453 #ifdef VERBOSE_INIT_ARM
454 /* Talk to the user */
455 printf("\nNetBSD/evbarm (SMDK2800) booting ...\n");
456 #endif
457
458 /*
459 * Ok we have the following memory map
460 *
461 * Physical Address Range Description
462 * ----------------------- ----------------------------------
463 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB)
464 * 0x02000000 - 0x020fffff AMD flash Memory (1MB)
465 * or (depend on DIPSW setting)
466 * 0x00000000 - 0x000fffff AMD flash Memory (1MB)
467 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB)
468 *
469 * 0x08000000 - 0x09ffffff SDRAM (32MB)
470 * 0x20000000 - 0x3fffffff PCI space
471 *
472 * The initarm() has the responsibility for creating the kernel
473 * page tables.
474 * It must also set up various memory pointers that are used
475 * by pmap etc.
476 */
477
478 /* Fake bootconfig structure for the benefit of pmap.c */
479 /* XXX must make the memory description h/w independent */
480 bootconfig.dramblocks = 1;
481 bootconfig.dram[0].address = SDRAM_START;
482 bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE;
483
484 /*
485 * Set up the variables that define the availablilty of
486 * physical memory. For now, we're going to set
487 * physical_freestart to 0x08200000 (where the kernel
488 * was loaded), and allocate the memory we need downwards.
489 * If we get too close to the bottom of SDRAM, we
490 * will panic. We will update physical_freestart and
491 * physical_freeend later to reflect what pmap_bootstrap()
492 * wants to see.
493 *
494 * XXX pmap_bootstrap() needs an enema.
495 */
496 physical_start = bootconfig.dram[0].address;
497 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
498
499 #if DO_MEMORY_DISK
500 #ifdef MEMORY_DISK_ROOT_ROM
501 md_root_start = MEMORY_DISK_ROOT_ADDR;
502 boothowto |= RB_RDONLY;
503 #else
504 /* Reserve physmem for ram disk */
505 md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1));
506 printf("Reserve %ld bytes for memory disk\n",
507 physical_end - md_root_start);
508 /* copy fs contents */
509 memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR,
510 MD_ROOT_SIZE);
511 physical_end = md_root_start;
512 #endif
513 #endif
514
515 physical_freestart = 0x08000000UL; /* XXX */
516 physical_freeend = 0x08200000UL;
517
518 physmem = (physical_end - physical_start) / PAGE_SIZE;
519
520 #ifdef VERBOSE_INIT_ARM
521 /* Tell the user about the memory */
522 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
523 physical_start, physical_end - 1);
524 #endif
525
526 /*
527 * XXX
528 * Okay, the kernel starts 2MB in from the bottom of physical
529 * memory. We are going to allocate our bootstrap pages downwards
530 * from there.
531 *
532 * We need to allocate some fixed page tables to get the kernel
533 * going. We allocate one page directory and a number of page
534 * tables and store the physical addresses in the kernel_pt_table
535 * array.
536 *
537 * The kernel page directory must be on a 16K boundary. The page
538 * tables must be on 4K bounaries. What we do is allocate the
539 * page directory on the first 16K boundary that we encounter, and
540 * the page tables on 4K boundaries otherwise. Since we allocate
541 * at least 3 L2 page tables, we are guaranteed to encounter at
542 * least one 16K aligned region.
543 */
544
545 #ifdef VERBOSE_INIT_ARM
546 printf("Allocating page tables\n");
547 #endif
548
549 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
550
551 #ifdef VERBOSE_INIT_ARM
552 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
553 physical_freestart, free_pages, free_pages);
554 #endif
555
556 /* Define a macro to simplify memory allocation */
557 #define valloc_pages(var, np) \
558 alloc_pages((var).pv_pa, (np)); \
559 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
560
561 #define alloc_pages(var, np) \
562 physical_freeend -= ((np) * PAGE_SIZE); \
563 if (physical_freeend < physical_freestart) \
564 panic("initarm: out of memory"); \
565 (var) = physical_freeend; \
566 free_pages -= (np); \
567 memset((char *)(var), 0, ((np) * PAGE_SIZE));
568
569 loop1 = 0;
570 kernel_l1pt.pv_pa = 0;
571 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
572 /* Are we 16KB aligned for an L1 ? */
573 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
574 && kernel_l1pt.pv_pa == 0) {
575 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
576 } else {
577 valloc_pages(kernel_pt_table[loop1],
578 L2_TABLE_SIZE / PAGE_SIZE);
579 ++loop1;
580 }
581 }
582
583 /* This should never be able to happen but better confirm that. */
584 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
585 panic("initarm: Failed to align the kernel page directory\n");
586
587 /*
588 * Allocate a page for the system page mapped to V0x00000000
589 * This page will just contain the system vectors and can be
590 * shared by all processes.
591 */
592 alloc_pages(systempage.pv_pa, 1);
593
594 /* Allocate stacks for all modes */
595 valloc_pages(irqstack, IRQ_STACK_SIZE);
596 valloc_pages(abtstack, ABT_STACK_SIZE);
597 valloc_pages(undstack, UND_STACK_SIZE);
598 valloc_pages(kernelstack, UPAGES);
599
600 #ifdef VERBOSE_INIT_ARM
601 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
602 irqstack.pv_va);
603 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
604 abtstack.pv_va);
605 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
606 undstack.pv_va);
607 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
608 kernelstack.pv_va);
609 #endif
610
611 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
612
613 LEDSTEP();
614
615 /*
616 * Ok we have allocated physical pages for the primary kernel
617 * page tables
618 */
619
620 #ifdef VERBOSE_INIT_ARM
621 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
622 #endif
623
624 /*
625 * Now we start construction of the L1 page table
626 * We start by mapping the L2 page tables into the L1.
627 * This means that we can replace L1 mappings later on if necessary
628 */
629 l1pagetable = kernel_l1pt.pv_pa;
630
631 /* Map the L2 pages tables in the L1 page table */
632 pmap_link_l2pt(l1pagetable, 0x00000000,
633 &kernel_pt_table[KERNEL_PT_SYS]);
634 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
635 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
636 &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
637 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
638 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
639 &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
640
641 /* update the top of the kernel VM */
642 pmap_curmaxkvaddr =
643 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
644
645 #ifdef VERBOSE_INIT_ARM
646 printf("Mapping kernel\n");
647 #endif
648
649 /* Now we fill in the L2 pagetable for the kernel static code/data */
650 {
651 size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE;
652 size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE;
653 u_int logical;
654
655 textsize = (textsize + PGOFSET) & ~PGOFSET;
656 totalsize = (totalsize + PGOFSET) & ~PGOFSET;
657
658 logical = 0x00200000; /* offset of kernel in RAM */
659
660 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
661 physical_start + logical, textsize,
662 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
663 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
664 physical_start + logical, totalsize - textsize,
665 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
666 }
667
668 #ifdef VERBOSE_INIT_ARM
669 printf("Constructing L2 page tables\n");
670 #endif
671
672 /* Map the stack pages */
673 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
674 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
675 PTE_CACHE);
676 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
677 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
678 PTE_CACHE);
679 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
680 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
681 PTE_CACHE);
682 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
683 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
684
685 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
686 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
687
688 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
689 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
690 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
691 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
692 }
693
694 /* Map the vector page. */
695 #if 1
696 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the
697 * cache-clean code there. */
698 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
699 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
700 #else
701 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
702 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
703 #endif
704
705 #if 0
706 /* Map the core memory needed before autoconfig */
707 loop = 0;
708 while (l1_sec_table[loop].size) {
709 vm_size_t sz;
710
711 #ifdef VERBOSE_INIT_ARM
712 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
713 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
714 l1_sec_table[loop].va);
715 #endif
716 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
717 pmap_map_section(l1pagetable,
718 l1_sec_table[loop].va + sz,
719 l1_sec_table[loop].pa + sz,
720 l1_sec_table[loop].prot,
721 l1_sec_table[loop].cache);
722 ++loop;
723 }
724 #endif
725
726 #ifdef MEMORY_DISK_DYNAMIC
727 /* map MD root image */
728 bootstrap_bs_map(&bootstrap_bs_tag, md_root_start, MD_ROOT_SIZE,
729 BUS_SPACE_MAP_CACHEABLE | BUS_SPACE_MAP_LINEAR,
730 (bus_space_handle_t *)&md_root_start);
731
732 md_root_setconf((void *)md_root_start, MD_ROOT_SIZE);
733 #endif /* MEMORY_DISK_DYNAMIC */
734 /*
735 * map integrated peripherals at same address in l1pagetable
736 * so that we can continue to use console.
737 */
738 copy_io_area_map((pd_entry_t *)l1pagetable);
739
740 /*
741 * Now we have the real page tables in place so we can switch to them.
742 * Once this is done we will be running with the REAL kernel page
743 * tables.
744 */
745
746 /*
747 * Update the physical_freestart/physical_freeend/free_pages
748 * variables.
749 */
750 {
751 physical_freestart = physical_start +
752 (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE);
753 physical_freeend = physical_end;
754 free_pages =
755 (physical_freeend - physical_freestart) / PAGE_SIZE;
756 }
757
758 /* Switch tables */
759 #ifdef VERBOSE_INIT_ARM
760 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
761 physical_freestart, free_pages, free_pages);
762 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
763 #endif
764 LEDSTEP();
765 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
766 setttb(kernel_l1pt.pv_pa);
767 cpu_tlb_flushID();
768 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
769
770 /*
771 * Moved from cpu_startup() as data_abort_handler() references
772 * this during uvm init
773 */
774 proc0paddr = (struct user *)kernelstack.pv_va;
775 lwp0.l_addr = proc0paddr;
776
777 #ifdef VERBOSE_INIT_ARM
778 printf("done!\n");
779 #endif
780
781 #if 0
782 /*
783 * The IFPGA registers have just moved.
784 * Detach the diagnostic serial port and reattach at the new address.
785 */
786 plcomcndetach();
787 /*
788 * XXX this should only be done in main() but it useful to
789 * have output earlier ...
790 */
791 consinit();
792 #endif
793
794 LEDSTEP();
795 #ifdef VERBOSE_INIT_ARM
796 printf("bootstrap done.\n");
797 #endif
798
799 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
800
801 /*
802 * Pages were allocated during the secondary bootstrap for the
803 * stacks for different CPU modes.
804 * We must now set the r13 registers in the different CPU modes to
805 * point to these stacks.
806 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
807 * of the stack memory.
808 */
809 #ifdef VERBOSE_INIT_ARM
810 printf("init subsystems: stacks ");
811 #endif
812
813 set_stackptr(PSR_IRQ32_MODE,
814 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
815 set_stackptr(PSR_ABT32_MODE,
816 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
817 set_stackptr(PSR_UND32_MODE,
818 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
819
820 LEDSTEP();
821
822 /*
823 * Well we should set a data abort handler.
824 * Once things get going this will change as we will need a proper
825 * handler.
826 * Until then we will use a handler that just panics but tells us
827 * why.
828 * Initialisation of the vectors will just panic on a data abort.
829 * This just fills in a slighly better one.
830 */
831 #ifdef VERBOSE_INIT_ARM
832 printf("vectors ");
833 #endif
834 data_abort_handler_address = (u_int)data_abort_handler;
835 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
836 undefined_handler_address = (u_int)undefinedinstruction_bounce;
837
838 /* Initialise the undefined instruction handlers */
839 #ifdef VERBOSE_INIT_ARM
840 printf("undefined ");
841 #endif
842 undefined_init();
843
844 LEDSTEP();
845
846 /* Load memory into UVM. */
847 #ifdef VERBOSE_INIT_ARM
848 printf("page ");
849 #endif
850 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
851 uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
852 atop(physical_freestart), atop(physical_freeend),
853 VM_FREELIST_DEFAULT);
854
855 LEDSTEP();
856 /* Boot strap pmap telling it where the kernel page table is */
857 #ifdef VERBOSE_INIT_ARM
858 printf("pmap ");
859 #endif
860 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
861 KERNEL_VM_BASE + KERNEL_VM_SIZE);
862
863 LEDSTEP();
864
865 /* Setup the IRQ system */
866 #ifdef VERBOSE_INIT_ARM
867 printf("irq ");
868 #endif
869 /* XXX irq_init(); */
870
871 #ifdef VERBOSE_INIT_ARM
872 printf("done.\n");
873 #endif
874
875 #ifdef BOOTHOWTO_INIT
876 boothowto |= BOOTHOWTO_INIT;
877 #endif
878 {
879 uint8_t gpio = ~gpio_read8(GPIO_PDATF);
880
881 if (gpio & (1<<5)) /* SW3 */
882 boothowto ^= RB_SINGLE;
883 if (gpio & (1<<7)) /* SW7 */
884 boothowto ^= RB_KDB;
885 #ifdef VERBOSE_INIT_ARM
886 printf( "sw: %x boothowto: %x\n", gpio, boothowto );
887 #endif
888 }
889
890 #ifdef IPKDB
891 /* Initialise ipkdb */
892 ipkdb_init();
893 if (boothowto & RB_KDB)
894 ipkdb_connect(0);
895 #endif
896
897 #ifdef KGDB
898 if (boothowto & RB_KDB) {
899 kgdb_debug_init = 1;
900 kgdb_connect(1);
901 }
902 #endif
903
904 #if NKSYMS || defined(DDB) || defined(LKM)
905 /* Firmware doesn't load symbols. */
906 ksyms_init(0, NULL, NULL);
907 #endif
908
909 #ifdef DDB
910 db_machine_init();
911 if (boothowto & RB_KDB)
912 Debugger();
913 #endif
914
915 /* We return the new stack pointer address */
916 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP);
917 }
918
919 void
920 consinit(void)
921 {
922 static int consinit_done = 0;
923 bus_space_tag_t iot = s3c2xx0_softc->sc_iot;
924 int pclk = s3c2xx0_softc->sc_pclk;
925
926 if (consinit_done != 0)
927 return;
928
929 consinit_done = 1;
930
931 #if NSSCOM > 0
932 #ifdef SSCOM0CONSOLE
933 if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed,
934 pclk, comcnmode))
935 return;
936 #endif
937 #ifdef SSCOM1CONSOLE
938 if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed,
939 pclk, comcnmode))
940 return;
941 #endif
942 #endif /* NSSCOM */
943 #if NCOM>0 && defined(CONCOMADDR)
944 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed,
945 COM_FREQ, comcnmode))
946 panic("can't init serial console @%x", CONCOMADDR);
947 return;
948 #endif
949
950 consinit_done = 0;
951 }
952
953
954 #ifdef KGDB
955
956 #if (NSSCOM > 0)
957
958 #ifdef KGDB_DEVNAME
959 const char kgdb_devname[] = KGDB_DEVNAME;
960 #else
961 const char kgdb_devname[] = "";
962 #endif
963
964 #ifndef KGDB_DEVMODE
965 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */
966 #endif
967 int kgdb_sscom_mode = KGDB_DEVMODE;
968
969 #endif /* NSSCOM */
970
971 void
972 kgdb_port_init(void)
973 {
974 #if (NSSCOM > 0)
975 int unit = -1;
976 int pclk = s3c2xx0_softc->sc_pclk;
977
978 if (strcmp(kgdb_devname, "sscom0") == 0)
979 unit = 0;
980 else if (strcmp(kgdb_devname, "sscom1") == 0)
981 unit = 1;
982
983 if (unit >= 0) {
984 s3c2800_sscom_kgdb_attach(s3c2xx0_softc->sc_iot,
985 unit, kgdb_rate, pclk, kgdb_sscom_mode);
986 }
987 #endif
988 }
989 #endif
990
991 static __inline
992 pd_entry_t *
993 read_ttb(void)
994 {
995 long ttb;
996
997 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb));
998
999
1000 return (pd_entry_t *)(ttb & ~((1 << 14) - 1));
1001 }
1002
1003
1004 static __inline void
1005 writeback_dcache_line(vaddr_t va)
1006 {
1007 /* writeback Dcache line */
1008 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9
1009 * assume write-through cache, and always flush Dcache instead of
1010 * cleaning it. Since Boot loader maps page table with write-back
1011 * cached, we really need to clean Dcache. */
1012 asm("mcr p15, 0, %0, c7, c10, 1"
1013 : : "r"(va));
1014 }
1015
1016 static __inline void
1017 clean_dcache_line(vaddr_t va)
1018 {
1019 /* writeback and invalidate Dcache line */
1020 asm("mcr p15, 0, %0, c7, c14, 1"
1021 : : "r"(va));
1022 }
1023
1024 static vaddr_t section_free = SMDK2800_VBASE_FREE;
1025
1026 static void
1027 map_builtin_peripherals(void)
1028 {
1029 pd_entry_t *pagedir = read_ttb();
1030 int i, sec;
1031
1032 for (i=0; i < 2; ++i) {
1033
1034 pmap_map_section((vaddr_t)pagedir,
1035 SMDK2800_IO_AREA_VBASE + (i <<L1_S_SHIFT),
1036 S3C2800_PERIPHERALS + (i << L1_S_SHIFT),
1037 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
1038
1039 sec = (SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT) + i;
1040 writeback_dcache_line((vaddr_t)&pagedir[sec]);
1041 }
1042
1043 cpu_drain_writebuf();
1044 cpu_tlb_flushD();
1045 }
1046
1047 /*
1048 * simple memory mapping function used in early bootstrap stage
1049 * before pmap is initialized.
1050 * This assumes only peripheral registers to map. they are mapped to
1051 * fixed address with section mapping.
1052 */
1053 static int
1054 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
1055 int flag, bus_space_handle_t * bshp)
1056 {
1057 long offset;
1058 int modified = 0;
1059 pd_entry_t *pagedir = read_ttb();
1060 /* This assumes PA==VA for page directory */
1061
1062 if (S3C2800_PERIPHERALS <= bpa && bpa < S3C2800_PERIPHERALS + 0x200000) {
1063 offset = bpa - S3C2800_PERIPHERALS;
1064 if (offset < 0 || 2 * L1_S_SIZE < offset)
1065 panic("bootstrap_bs_map: can't map");
1066 *bshp = (bus_space_handle_t)(SMDK2800_IO_AREA_VBASE + offset);
1067 } else {
1068 vaddr_t va;
1069 bus_addr_t pa;
1070 int cacheable = flag & BUS_SPACE_MAP_CACHEABLE;
1071
1072
1073 size = (size + L1_S_OFFSET) & ~L1_S_OFFSET;
1074 pa = bpa & ~L1_S_OFFSET;
1075 offset = bpa - pa;
1076
1077 va = section_free;
1078 while (size) {
1079 pmap_map_section((vaddr_t)pagedir, va,
1080 pa, VM_PROT_READ | VM_PROT_WRITE,
1081 cacheable ? PTE_CACHE : PTE_NOCACHE);
1082 writeback_dcache_line((vaddr_t)& pagedir[va >> L1_S_SHIFT]);
1083 va += L1_S_SIZE;
1084 pa += L1_S_SIZE;
1085 size -= L1_S_SIZE;
1086 }
1087
1088 *bshp = (bus_space_handle_t)(section_free + offset);
1089 section_free = va;
1090 }
1091
1092
1093 if (modified) {
1094
1095 cpu_drain_writebuf();
1096 cpu_tlb_flushD();
1097 }
1098 return (0);
1099 }
1100
1101 static void
1102 copy_io_area_map(pd_entry_t * new_pd)
1103 {
1104 pd_entry_t *cur_pd = read_ttb();
1105 int sec;
1106
1107 for (sec = SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT;
1108 sec < (section_free >> L1_S_SHIFT); ++sec) {
1109 new_pd[sec] = cur_pd[sec];
1110 }
1111 }
1112