smdk2800_machdep.c revision 1.14
1 /* $NetBSD: smdk2800_machdep.c,v 1.14 2003/06/15 17:33:45 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Fujitsu Component Limited 5 * Copyright (c) 2002 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 /* 36 * Copyright (c) 2001,2002 ARM Ltd 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. The name of the company may not be used to endorse or promote 48 * products derived from this software without specific prior written 49 * permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND 52 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 53 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 54 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD 55 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 56 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 57 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 58 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 59 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 60 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 61 * POSSIBILITY OF SUCH DAMAGE. 62 * 63 */ 64 65 /* 66 * Copyright (c) 1997,1998 Mark Brinicombe. 67 * Copyright (c) 1997,1998 Causality Limited. 68 * All rights reserved. 69 * 70 * Redistribution and use in source and binary forms, with or without 71 * modification, are permitted provided that the following conditions 72 * are met: 73 * 1. Redistributions of source code must retain the above copyright 74 * notice, this list of conditions and the following disclaimer. 75 * 2. Redistributions in binary form must reproduce the above copyright 76 * notice, this list of conditions and the following disclaimer in the 77 * documentation and/or other materials provided with the distribution. 78 * 3. All advertising materials mentioning features or use of this software 79 * must display the following acknowledgement: 80 * This product includes software developed by Mark Brinicombe 81 * for the NetBSD Project. 82 * 4. The name of the company nor the name of the author may be used to 83 * endorse or promote products derived from this software without specific 84 * prior written permission. 85 * 86 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 87 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 88 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 89 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 90 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 91 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 92 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 93 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 94 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 95 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 96 * SUCH DAMAGE. 97 * 98 * Machine dependant functions for kernel setup for integrator board 99 * 100 * Created : 24/11/97 101 */ 102 103 /* 104 * Machine dependant functions for kernel setup for Samsung SMDK2800 105 * derived from integrator_machdep.c 106 */ 107 108 #include "opt_ddb.h" 109 #include "opt_kgdb.h" 110 #include "opt_ipkdb.h" 111 #include "opt_pmap_debug.h" 112 #include "opt_md.h" 113 #include "pci.h" 114 115 #include <sys/param.h> 116 #include <sys/device.h> 117 #include <sys/systm.h> 118 #include <sys/kernel.h> 119 #include <sys/exec.h> 120 #include <sys/proc.h> 121 #include <sys/msgbuf.h> 122 #include <sys/reboot.h> 123 #include <sys/termios.h> 124 #include <sys/ksyms.h> 125 126 #include <uvm/uvm_extern.h> 127 128 #include <dev/cons.h> 129 #include <dev/md.h> 130 131 #include <machine/db_machdep.h> 132 #include <ddb/db_sym.h> 133 #include <ddb/db_extern.h> 134 #ifdef KGDB 135 #include <sys/kgdb.h> 136 #endif 137 138 #include <machine/bootconfig.h> 139 #include <machine/bus.h> 140 #include <machine/cpu.h> 141 #include <machine/frame.h> 142 #include <machine/intr.h> 143 #include <arm/undefined.h> 144 145 #include <arm/arm32/machdep.h> 146 147 #include <arm/s3c2xx0/s3c2800reg.h> 148 #include <arm/s3c2xx0/s3c2800var.h> 149 150 #include "ksyms.h" 151 152 #ifndef SDRAM_START 153 #define SDRAM_START S3C2800_DBANK0_START 154 #endif 155 #ifndef SDRAM_SIZE 156 #define SDRAM_SIZE (32*1024*1024) 157 #endif 158 159 /* 160 * Address to map I/O registers in early initialize stage. 161 */ 162 #define SMDK2800_IO_AREA_VBASE 0xfd000000 163 #define SMDK2800_VBASE_FREE 0xfd200000 164 165 /* Kernel text starts 2MB in from the bottom of the kernel address space. */ 166 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000) 167 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000) 168 169 /* 170 * The range 0xc1000000 - 0xccffffff is available for kernel VM space 171 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff 172 */ 173 #define KERNEL_VM_SIZE 0x0C000000 174 175 /* Memory disk support */ 176 #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR) 177 #define DO_MEMORY_DISK 178 /* We have memory disk image outside of the kernel on ROM. */ 179 #ifdef MEMORY_DISK_ROOT_ROM 180 /* map the image directory and use read-only */ 181 #else 182 /* copy the image to RAM */ 183 #endif 184 #endif 185 186 187 /* 188 * Address to call from cpu_reset() to reset the machine. 189 * This is machine architecture dependant as it varies depending 190 * on where the ROM appears when you turn the MMU off. 191 */ 192 u_int cpu_reset_address = (u_int)0; 193 194 /* Define various stack sizes in pages */ 195 #define IRQ_STACK_SIZE 1 196 #define ABT_STACK_SIZE 1 197 #ifdef IPKDB 198 #define UND_STACK_SIZE 2 199 #else 200 #define UND_STACK_SIZE 1 201 #endif 202 203 BootConfig bootconfig; /* Boot config storage */ 204 char *boot_args = NULL; 205 char *boot_file = NULL; 206 207 vm_offset_t physical_start; 208 vm_offset_t physical_freestart; 209 vm_offset_t physical_freeend; 210 vm_offset_t physical_end; 211 u_int free_pages; 212 vm_offset_t pagetables_start; 213 int physmem = 0; 214 215 /*int debug_flags;*/ 216 #ifndef PMAP_STATIC_L1S 217 int max_processes = 64; /* Default number */ 218 #endif /* !PMAP_STATIC_L1S */ 219 220 /* Physical and virtual addresses for some global pages */ 221 pv_addr_t systempage; 222 pv_addr_t irqstack; 223 pv_addr_t undstack; 224 pv_addr_t abtstack; 225 pv_addr_t kernelstack; 226 227 vm_offset_t msgbufphys; 228 229 extern u_int data_abort_handler_address; 230 extern u_int prefetch_abort_handler_address; 231 extern u_int undefined_handler_address; 232 233 #ifdef PMAP_DEBUG 234 extern int pmap_debug_level; 235 #endif 236 237 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */ 238 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */ 239 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */ 240 241 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 242 243 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 244 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 245 246 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 247 248 struct user *proc0paddr; 249 250 /* Prototypes */ 251 252 void consinit(void); 253 void kgdb_port_init(void); 254 255 static int 256 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 257 int cacheable, bus_space_handle_t * bshp); 258 static void map_builtin_peripherals(void); 259 static void copy_io_area_map(pd_entry_t * new_pd); 260 261 /* A load of console goo. */ 262 #include "vga.h" 263 #if NVGA > 0 264 #include <dev/ic/mc6845reg.h> 265 #include <dev/ic/pcdisplayvar.h> 266 #include <dev/ic/vgareg.h> 267 #include <dev/ic/vgavar.h> 268 #endif 269 270 #include "com.h" 271 #if NCOM > 0 272 #include <dev/ic/comreg.h> 273 #include <dev/ic/comvar.h> 274 #endif 275 276 #include "sscom.h" 277 #if NSSCOM > 0 278 #include "opt_sscom.h" 279 #include <arm/s3c2xx0/sscom_var.h> 280 #endif 281 282 /* 283 * Define the default console speed for the board. This is generally 284 * what the firmware provided with the board defaults to. 285 */ 286 #ifndef CONSPEED 287 #define CONSPEED B115200 /* TTYDEF_SPEED */ 288 #endif 289 #ifndef CONMODE 290 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 291 #endif 292 293 int comcnspeed = CONSPEED; 294 int comcnmode = CONMODE; 295 296 struct bus_space bootstrap_bs_tag; 297 298 /* 299 * void cpu_reboot(int howto, char *bootstr) 300 * 301 * Reboots the system 302 * 303 * Deal with any syncing, unmounting, dumping and shutdown hooks, 304 * then reset the CPU. 305 */ 306 void 307 cpu_reboot(int howto, char *bootstr) 308 { 309 310 cpu_reset_address = vtophys((u_int)s3c2800_softreset); 311 312 /* 313 * If we are still cold then hit the air brakes 314 * and crash to earth fast 315 */ 316 if (cold) { 317 doshutdownhooks(); 318 printf("The operating system has halted.\n"); 319 printf("Please press any key to reboot.\n\n"); 320 cngetc(); 321 printf("rebooting...\n"); 322 cpu_reset(); 323 /* NOTREACHED */ 324 } 325 /* Disable console buffering */ 326 327 /* 328 * If RB_NOSYNC was not specified sync the discs. 329 * Note: Unless cold is set to 1 here, syslogd will die during the 330 * unmount. It looks like syslogd is getting woken up only to find 331 * that it cannot page part of the binary in as the filesystem has 332 * been unmounted. 333 */ 334 if (!(howto & RB_NOSYNC)) 335 bootsync(); 336 337 /* Say NO to interrupts */ 338 splhigh(); 339 340 /* Do a dump if requested. */ 341 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 342 dumpsys(); 343 344 /* Run any shutdown hooks */ 345 doshutdownhooks(); 346 347 /* Make sure IRQ's are disabled */ 348 IRQdisable; 349 350 if (howto & RB_HALT) { 351 printf("The operating system has halted.\n"); 352 printf("Please press any key to reboot.\n\n"); 353 cngetc(); 354 } 355 printf("rebooting...\n"); 356 cpu_reset(); 357 /* NOTREACHED */ 358 } 359 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v)) 360 361 /* 362 * u_int initarm(...) 363 * 364 * Initial entry point on startup. This gets called before main() is 365 * entered. 366 * It should be responsible for setting up everything that must be 367 * in place when main is called. 368 * This includes 369 * Taking a copy of the boot configuration structure. 370 * Initialising the physical console so characters can be printed. 371 * Setting up page tables for the kernel 372 * Relocating the kernel to the bottom of physical memory 373 */ 374 375 u_int 376 initarm(void *arg) 377 { 378 int loop; 379 int loop1; 380 u_int l1pagetable; 381 extern int etext asm("_etext"); 382 extern int end asm("_end"); 383 pv_addr_t kernel_l1pt; 384 struct s3c2800_softc temp_softc; /* used to initialize IO regs */ 385 int progress_counter = 0; 386 387 #ifdef DO_MEMORY_DISK 388 vm_offset_t md_root_start; 389 #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE) 390 #endif 391 392 #define gpio_read8(reg) bus_space_read_1(temp_softc.sc_sx.sc_iot, \ 393 temp_softc.sc_sx.sc_gpio_ioh, (reg)) 394 395 #define LEDSTEP() __LED(progress_counter++) 396 397 #define pdatc (*(volatile uint8_t *)(S3C2800_GPIO_BASE+GPIO_PDATC)) 398 #define __LED(x) (pdatc = (pdatc & ~0x07) | (~(x) & 0x07)) 399 400 LEDSTEP(); 401 /* 402 * Heads up ... Setup the CPU / MMU / TLB functions 403 */ 404 if (set_cpufuncs()) 405 panic("cpu not recognized!"); 406 407 LEDSTEP(); 408 409 map_builtin_peripherals(); 410 411 /* 412 * prepare fake bus space tag 413 */ 414 bootstrap_bs_tag = s3c2xx0_bs_tag; 415 bootstrap_bs_tag.bs_map = bootstrap_bs_map; 416 s3c2xx0_softc = &temp_softc.sc_sx; 417 s3c2xx0_softc->sc_iot = &bootstrap_bs_tag; 418 419 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_GPIO_BASE, 420 S3C2800_GPIO_SIZE, 0, &temp_softc.sc_sx.sc_gpio_ioh); 421 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_INTCTL_BASE, 422 S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_sx.sc_intctl_ioh); 423 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_CLKMAN_BASE, 424 S3C2800_CLKMAN_SIZE, 0, &temp_softc.sc_sx.sc_clkman_ioh); 425 426 #undef __LED 427 #define __LED(x) \ 428 bus_space_write_1(&bootstrap_bs_tag, \ 429 temp_softc.sc_sx.sc_gpio_ioh, \ 430 GPIO_PDATC, (~(x) & 0x07) | \ 431 (bus_space_read_1(&bootstrap_bs_tag, \ 432 temp_softc.sc_sx.sc_gpio_ioh, GPIO_PDATC ) & ~0x07)) 433 434 LEDSTEP(); 435 436 /* Disable all peripheral interrupts */ 437 bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_sx.sc_intctl_ioh, 438 INTCTL_INTMSK, 0); 439 440 s3c2800_clock_freq(&temp_softc); 441 442 consinit(); 443 #ifdef VERBOSE_INIT_ARM 444 printf("consinit done\n"); 445 #endif 446 447 #ifdef KGDB 448 LEDSTEP(); 449 kgdb_port_init(); 450 #endif 451 LEDSTEP(); 452 453 #ifdef VERBOSE_INIT_ARM 454 /* Talk to the user */ 455 printf("\nNetBSD/evbarm (SMDK2800) booting ...\n"); 456 #endif 457 458 /* 459 * Ok we have the following memory map 460 * 461 * Physical Address Range Description 462 * ----------------------- ---------------------------------- 463 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB) 464 * 0x02000000 - 0x020fffff AMD flash Memory (1MB) 465 * or (depend on DIPSW setting) 466 * 0x00000000 - 0x000fffff AMD flash Memory (1MB) 467 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB) 468 * 469 * 0x08000000 - 0x09ffffff SDRAM (32MB) 470 * 0x20000000 - 0x3fffffff PCI space 471 * 472 * The initarm() has the responsibility for creating the kernel 473 * page tables. 474 * It must also set up various memory pointers that are used 475 * by pmap etc. 476 */ 477 478 /* Fake bootconfig structure for the benefit of pmap.c */ 479 /* XXX must make the memory description h/w independent */ 480 bootconfig.dramblocks = 1; 481 bootconfig.dram[0].address = SDRAM_START; 482 bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE; 483 484 /* 485 * Set up the variables that define the availablilty of 486 * physical memory. For now, we're going to set 487 * physical_freestart to 0x08200000 (where the kernel 488 * was loaded), and allocate the memory we need downwards. 489 * If we get too close to the bottom of SDRAM, we 490 * will panic. We will update physical_freestart and 491 * physical_freeend later to reflect what pmap_bootstrap() 492 * wants to see. 493 * 494 * XXX pmap_bootstrap() needs an enema. 495 */ 496 physical_start = bootconfig.dram[0].address; 497 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 498 499 #if DO_MEMORY_DISK 500 #ifdef MEMORY_DISK_ROOT_ROM 501 md_root_start = MEMORY_DISK_ROOT_ADDR; 502 boothowto |= RB_RDONLY; 503 #else 504 /* Reserve physmem for ram disk */ 505 md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1)); 506 printf("Reserve %ld bytes for memory disk\n", 507 physical_end - md_root_start); 508 /* copy fs contents */ 509 memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR, 510 MD_ROOT_SIZE); 511 physical_end = md_root_start; 512 #endif 513 #endif 514 515 physical_freestart = 0x08000000UL; /* XXX */ 516 physical_freeend = 0x08200000UL; 517 518 physmem = (physical_end - physical_start) / PAGE_SIZE; 519 520 #ifdef VERBOSE_INIT_ARM 521 /* Tell the user about the memory */ 522 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 523 physical_start, physical_end - 1); 524 #endif 525 526 /* 527 * XXX 528 * Okay, the kernel starts 2MB in from the bottom of physical 529 * memory. We are going to allocate our bootstrap pages downwards 530 * from there. 531 * 532 * We need to allocate some fixed page tables to get the kernel 533 * going. We allocate one page directory and a number of page 534 * tables and store the physical addresses in the kernel_pt_table 535 * array. 536 * 537 * The kernel page directory must be on a 16K boundary. The page 538 * tables must be on 4K bounaries. What we do is allocate the 539 * page directory on the first 16K boundary that we encounter, and 540 * the page tables on 4K boundaries otherwise. Since we allocate 541 * at least 3 L2 page tables, we are guaranteed to encounter at 542 * least one 16K aligned region. 543 */ 544 545 #ifdef VERBOSE_INIT_ARM 546 printf("Allocating page tables\n"); 547 #endif 548 549 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 550 551 #ifdef VERBOSE_INIT_ARM 552 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 553 physical_freestart, free_pages, free_pages); 554 #endif 555 556 /* Define a macro to simplify memory allocation */ 557 #define valloc_pages(var, np) \ 558 alloc_pages((var).pv_pa, (np)); \ 559 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 560 561 #define alloc_pages(var, np) \ 562 physical_freeend -= ((np) * PAGE_SIZE); \ 563 if (physical_freeend < physical_freestart) \ 564 panic("initarm: out of memory"); \ 565 (var) = physical_freeend; \ 566 free_pages -= (np); \ 567 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 568 569 loop1 = 0; 570 kernel_l1pt.pv_pa = 0; 571 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 572 /* Are we 16KB aligned for an L1 ? */ 573 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 574 && kernel_l1pt.pv_pa == 0) { 575 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 576 } else { 577 valloc_pages(kernel_pt_table[loop1], 578 L2_TABLE_SIZE / PAGE_SIZE); 579 ++loop1; 580 } 581 } 582 583 /* This should never be able to happen but better confirm that. */ 584 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0) 585 panic("initarm: Failed to align the kernel page directory\n"); 586 587 /* 588 * Allocate a page for the system page mapped to V0x00000000 589 * This page will just contain the system vectors and can be 590 * shared by all processes. 591 */ 592 alloc_pages(systempage.pv_pa, 1); 593 594 /* Allocate stacks for all modes */ 595 valloc_pages(irqstack, IRQ_STACK_SIZE); 596 valloc_pages(abtstack, ABT_STACK_SIZE); 597 valloc_pages(undstack, UND_STACK_SIZE); 598 valloc_pages(kernelstack, UPAGES); 599 600 #ifdef VERBOSE_INIT_ARM 601 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 602 irqstack.pv_va); 603 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 604 abtstack.pv_va); 605 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 606 undstack.pv_va); 607 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 608 kernelstack.pv_va); 609 #endif 610 611 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 612 613 LEDSTEP(); 614 615 /* 616 * Ok we have allocated physical pages for the primary kernel 617 * page tables 618 */ 619 620 #ifdef VERBOSE_INIT_ARM 621 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 622 #endif 623 624 /* 625 * Now we start construction of the L1 page table 626 * We start by mapping the L2 page tables into the L1. 627 * This means that we can replace L1 mappings later on if necessary 628 */ 629 l1pagetable = kernel_l1pt.pv_pa; 630 631 /* Map the L2 pages tables in the L1 page table */ 632 pmap_link_l2pt(l1pagetable, 0x00000000, 633 &kernel_pt_table[KERNEL_PT_SYS]); 634 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 635 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 636 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 637 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 638 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 639 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 640 641 /* update the top of the kernel VM */ 642 pmap_curmaxkvaddr = 643 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 644 645 #ifdef VERBOSE_INIT_ARM 646 printf("Mapping kernel\n"); 647 #endif 648 649 /* Now we fill in the L2 pagetable for the kernel static code/data */ 650 { 651 size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE; 652 size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE; 653 u_int logical; 654 655 textsize = (textsize + PGOFSET) & ~PGOFSET; 656 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 657 658 logical = 0x00200000; /* offset of kernel in RAM */ 659 660 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 661 physical_start + logical, textsize, 662 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 663 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 664 physical_start + logical, totalsize - textsize, 665 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 666 } 667 668 #ifdef VERBOSE_INIT_ARM 669 printf("Constructing L2 page tables\n"); 670 #endif 671 672 /* Map the stack pages */ 673 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 674 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 675 PTE_CACHE); 676 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 677 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 678 PTE_CACHE); 679 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 680 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 681 PTE_CACHE); 682 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 683 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 684 685 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 686 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 687 688 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 689 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 690 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 691 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 692 } 693 694 /* Map the vector page. */ 695 #if 1 696 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 697 * cache-clean code there. */ 698 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 699 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 700 #else 701 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 702 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 703 #endif 704 705 #ifdef MEMORY_DISK_DYNAMIC 706 /* map MD root image */ 707 bootstrap_bs_map(&bootstrap_bs_tag, md_root_start, MD_ROOT_SIZE, 708 BUS_SPACE_MAP_CACHEABLE | BUS_SPACE_MAP_LINEAR, 709 (bus_space_handle_t *)&md_root_start); 710 711 md_root_setconf((void *)md_root_start, MD_ROOT_SIZE); 712 #endif /* MEMORY_DISK_DYNAMIC */ 713 /* 714 * map integrated peripherals at same address in l1pagetable 715 * so that we can continue to use console. 716 */ 717 copy_io_area_map((pd_entry_t *)l1pagetable); 718 719 /* 720 * Now we have the real page tables in place so we can switch to them. 721 * Once this is done we will be running with the REAL kernel page 722 * tables. 723 */ 724 725 /* 726 * Update the physical_freestart/physical_freeend/free_pages 727 * variables. 728 */ 729 { 730 physical_freestart = physical_start + 731 (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE); 732 physical_freeend = physical_end; 733 free_pages = 734 (physical_freeend - physical_freestart) / PAGE_SIZE; 735 } 736 737 /* Switch tables */ 738 #ifdef VERBOSE_INIT_ARM 739 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 740 physical_freestart, free_pages, free_pages); 741 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 742 #endif 743 LEDSTEP(); 744 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 745 setttb(kernel_l1pt.pv_pa); 746 cpu_tlb_flushID(); 747 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 748 749 /* 750 * Moved from cpu_startup() as data_abort_handler() references 751 * this during uvm init 752 */ 753 proc0paddr = (struct user *)kernelstack.pv_va; 754 lwp0.l_addr = proc0paddr; 755 756 #ifdef VERBOSE_INIT_ARM 757 printf("done!\n"); 758 #endif 759 760 #if 0 761 /* 762 * The IFPGA registers have just moved. 763 * Detach the diagnostic serial port and reattach at the new address. 764 */ 765 plcomcndetach(); 766 /* 767 * XXX this should only be done in main() but it useful to 768 * have output earlier ... 769 */ 770 consinit(); 771 #endif 772 773 LEDSTEP(); 774 #ifdef VERBOSE_INIT_ARM 775 printf("bootstrap done.\n"); 776 #endif 777 778 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 779 780 /* 781 * Pages were allocated during the secondary bootstrap for the 782 * stacks for different CPU modes. 783 * We must now set the r13 registers in the different CPU modes to 784 * point to these stacks. 785 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 786 * of the stack memory. 787 */ 788 #ifdef VERBOSE_INIT_ARM 789 printf("init subsystems: stacks "); 790 #endif 791 792 set_stackptr(PSR_IRQ32_MODE, 793 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 794 set_stackptr(PSR_ABT32_MODE, 795 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 796 set_stackptr(PSR_UND32_MODE, 797 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 798 799 LEDSTEP(); 800 801 /* 802 * Well we should set a data abort handler. 803 * Once things get going this will change as we will need a proper 804 * handler. 805 * Until then we will use a handler that just panics but tells us 806 * why. 807 * Initialisation of the vectors will just panic on a data abort. 808 * This just fills in a slighly better one. 809 */ 810 #ifdef VERBOSE_INIT_ARM 811 printf("vectors "); 812 #endif 813 data_abort_handler_address = (u_int)data_abort_handler; 814 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 815 undefined_handler_address = (u_int)undefinedinstruction_bounce; 816 817 /* Initialise the undefined instruction handlers */ 818 #ifdef VERBOSE_INIT_ARM 819 printf("undefined "); 820 #endif 821 undefined_init(); 822 823 LEDSTEP(); 824 825 /* Load memory into UVM. */ 826 #ifdef VERBOSE_INIT_ARM 827 printf("page "); 828 #endif 829 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 830 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 831 atop(physical_freestart), atop(physical_freeend), 832 VM_FREELIST_DEFAULT); 833 834 LEDSTEP(); 835 /* Boot strap pmap telling it where the kernel page table is */ 836 #ifdef VERBOSE_INIT_ARM 837 printf("pmap "); 838 #endif 839 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE, 840 KERNEL_VM_BASE + KERNEL_VM_SIZE); 841 842 LEDSTEP(); 843 844 /* Setup the IRQ system */ 845 #ifdef VERBOSE_INIT_ARM 846 printf("irq "); 847 #endif 848 /* XXX irq_init(); */ 849 850 #ifdef VERBOSE_INIT_ARM 851 printf("done.\n"); 852 #endif 853 854 #ifdef BOOTHOWTO_INIT 855 boothowto |= BOOTHOWTO_INIT; 856 #endif 857 { 858 uint8_t gpio = ~gpio_read8(GPIO_PDATF); 859 860 if (gpio & (1<<5)) /* SW3 */ 861 boothowto ^= RB_SINGLE; 862 if (gpio & (1<<7)) /* SW7 */ 863 boothowto ^= RB_KDB; 864 #ifdef VERBOSE_INIT_ARM 865 printf( "sw: %x boothowto: %x\n", gpio, boothowto ); 866 #endif 867 } 868 869 #ifdef IPKDB 870 /* Initialise ipkdb */ 871 ipkdb_init(); 872 if (boothowto & RB_KDB) 873 ipkdb_connect(0); 874 #endif 875 876 #ifdef KGDB 877 if (boothowto & RB_KDB) { 878 kgdb_debug_init = 1; 879 kgdb_connect(1); 880 } 881 #endif 882 883 #if NKSYMS || defined(DDB) || defined(LKM) 884 /* Firmware doesn't load symbols. */ 885 ksyms_init(0, NULL, NULL); 886 #endif 887 888 #ifdef DDB 889 db_machine_init(); 890 if (boothowto & RB_KDB) 891 Debugger(); 892 #endif 893 894 /* We return the new stack pointer address */ 895 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP); 896 } 897 898 void 899 consinit(void) 900 { 901 static int consinit_done = 0; 902 bus_space_tag_t iot = s3c2xx0_softc->sc_iot; 903 int pclk = s3c2xx0_softc->sc_pclk; 904 905 if (consinit_done != 0) 906 return; 907 908 consinit_done = 1; 909 910 #if NSSCOM > 0 911 #ifdef SSCOM0CONSOLE 912 if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed, 913 pclk, comcnmode)) 914 return; 915 #endif 916 #ifdef SSCOM1CONSOLE 917 if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed, 918 pclk, comcnmode)) 919 return; 920 #endif 921 #endif /* NSSCOM */ 922 #if NCOM>0 && defined(CONCOMADDR) 923 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed, 924 COM_FREQ, COM_TYPE_NORMAL, comcnmode)) 925 panic("can't init serial console @%x", CONCOMADDR); 926 return; 927 #endif 928 929 consinit_done = 0; 930 } 931 932 933 #ifdef KGDB 934 935 #if (NSSCOM > 0) 936 937 #ifdef KGDB_DEVNAME 938 const char kgdb_devname[] = KGDB_DEVNAME; 939 #else 940 const char kgdb_devname[] = ""; 941 #endif 942 943 #ifndef KGDB_DEVMODE 944 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */ 945 #endif 946 int kgdb_sscom_mode = KGDB_DEVMODE; 947 948 #endif /* NSSCOM */ 949 950 void 951 kgdb_port_init(void) 952 { 953 #if (NSSCOM > 0) 954 int unit = -1; 955 int pclk = s3c2xx0_softc->sc_pclk; 956 957 if (strcmp(kgdb_devname, "sscom0") == 0) 958 unit = 0; 959 else if (strcmp(kgdb_devname, "sscom1") == 0) 960 unit = 1; 961 962 if (unit >= 0) { 963 s3c2800_sscom_kgdb_attach(s3c2xx0_softc->sc_iot, 964 unit, kgdb_rate, pclk, kgdb_sscom_mode); 965 } 966 #endif 967 } 968 #endif 969 970 static __inline 971 pd_entry_t * 972 read_ttb(void) 973 { 974 long ttb; 975 976 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb)); 977 978 979 return (pd_entry_t *)(ttb & ~((1 << 14) - 1)); 980 } 981 982 983 static __inline void 984 writeback_dcache_line(vaddr_t va) 985 { 986 /* writeback Dcache line */ 987 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9 988 * assume write-through cache, and always flush Dcache instead of 989 * cleaning it. Since Boot loader maps page table with write-back 990 * cached, we really need to clean Dcache. */ 991 asm("mcr p15, 0, %0, c7, c10, 1" 992 : : "r"(va)); 993 } 994 995 static __inline void 996 clean_dcache_line(vaddr_t va) 997 { 998 /* writeback and invalidate Dcache line */ 999 asm("mcr p15, 0, %0, c7, c14, 1" 1000 : : "r"(va)); 1001 } 1002 1003 static vaddr_t section_free = SMDK2800_VBASE_FREE; 1004 1005 static void 1006 map_builtin_peripherals(void) 1007 { 1008 pd_entry_t *pagedir = read_ttb(); 1009 int i, sec; 1010 1011 for (i=0; i < 2; ++i) { 1012 1013 pmap_map_section((vaddr_t)pagedir, 1014 SMDK2800_IO_AREA_VBASE + (i <<L1_S_SHIFT), 1015 S3C2800_PERIPHERALS + (i << L1_S_SHIFT), 1016 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 1017 1018 sec = (SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT) + i; 1019 writeback_dcache_line((vaddr_t)&pagedir[sec]); 1020 } 1021 1022 cpu_drain_writebuf(); 1023 cpu_tlb_flushD(); 1024 } 1025 1026 /* 1027 * simple memory mapping function used in early bootstrap stage 1028 * before pmap is initialized. 1029 * This assumes only peripheral registers to map. they are mapped to 1030 * fixed address with section mapping. 1031 */ 1032 static int 1033 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 1034 int flag, bus_space_handle_t * bshp) 1035 { 1036 long offset; 1037 int modified = 0; 1038 pd_entry_t *pagedir = read_ttb(); 1039 /* This assumes PA==VA for page directory */ 1040 1041 if (S3C2800_PERIPHERALS <= bpa && bpa < S3C2800_PERIPHERALS + 0x200000) { 1042 offset = bpa - S3C2800_PERIPHERALS; 1043 if (offset < 0 || 2 * L1_S_SIZE < offset) 1044 panic("bootstrap_bs_map: can't map"); 1045 *bshp = (bus_space_handle_t)(SMDK2800_IO_AREA_VBASE + offset); 1046 } else { 1047 vaddr_t va; 1048 bus_addr_t pa; 1049 int cacheable = flag & BUS_SPACE_MAP_CACHEABLE; 1050 1051 1052 size = (size + L1_S_OFFSET) & ~L1_S_OFFSET; 1053 pa = bpa & ~L1_S_OFFSET; 1054 offset = bpa - pa; 1055 1056 va = section_free; 1057 while (size) { 1058 pmap_map_section((vaddr_t)pagedir, va, 1059 pa, VM_PROT_READ | VM_PROT_WRITE, 1060 cacheable ? PTE_CACHE : PTE_NOCACHE); 1061 writeback_dcache_line((vaddr_t)& pagedir[va >> L1_S_SHIFT]); 1062 va += L1_S_SIZE; 1063 pa += L1_S_SIZE; 1064 size -= L1_S_SIZE; 1065 } 1066 1067 *bshp = (bus_space_handle_t)(section_free + offset); 1068 section_free = va; 1069 } 1070 1071 1072 if (modified) { 1073 1074 cpu_drain_writebuf(); 1075 cpu_tlb_flushD(); 1076 } 1077 return (0); 1078 } 1079 1080 static void 1081 copy_io_area_map(pd_entry_t * new_pd) 1082 { 1083 pd_entry_t *cur_pd = read_ttb(); 1084 int sec; 1085 1086 for (sec = SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT; 1087 sec < (section_free >> L1_S_SHIFT); ++sec) { 1088 new_pd[sec] = cur_pd[sec]; 1089 } 1090 } 1091
Indexes created Wed Oct 22 13:09:56 GMT 2025