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smdk2800_machdep.c revision 1.15
      1 /*	$NetBSD: smdk2800_machdep.c,v 1.15 2003/07/15 00:25:06 lukem Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2002 Fujitsu Component Limited
      5  * Copyright (c) 2002 Genetec Corporation
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. Neither the name of The Fujitsu Component Limited nor the name of
     17  *    Genetec corporation may not be used to endorse or promote products
     18  *    derived from this software without specific prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
     21  * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
     22  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     23  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     24  * DISCLAIMED.  IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
     25  * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     27  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
     28  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     29  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
     31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  * SUCH DAMAGE.
     33  */
     34 
     35 /*
     36  * Copyright (c) 2001,2002 ARM Ltd
     37  * All rights reserved.
     38  *
     39  * Redistribution and use in source and binary forms, with or without
     40  * modification, are permitted provided that the following conditions
     41  * are met:
     42  * 1. Redistributions of source code must retain the above copyright
     43  *    notice, this list of conditions and the following disclaimer.
     44  * 2. Redistributions in binary form must reproduce the above copyright
     45  *    notice, this list of conditions and the following disclaimer in the
     46  *    documentation and/or other materials provided with the distribution.
     47  * 3. The name of the company may not be used to endorse or promote
     48  *    products derived from this software without specific prior written
     49  *    permission.
     50  *
     51  * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND
     52  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     53  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     54  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ARM LTD
     55  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     56  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     57  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     58  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     59  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     60  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     61  * POSSIBILITY OF SUCH DAMAGE.
     62  *
     63  */
     64 
     65 /*
     66  * Copyright (c) 1997,1998 Mark Brinicombe.
     67  * Copyright (c) 1997,1998 Causality Limited.
     68  * All rights reserved.
     69  *
     70  * Redistribution and use in source and binary forms, with or without
     71  * modification, are permitted provided that the following conditions
     72  * are met:
     73  * 1. Redistributions of source code must retain the above copyright
     74  *    notice, this list of conditions and the following disclaimer.
     75  * 2. Redistributions in binary form must reproduce the above copyright
     76  *    notice, this list of conditions and the following disclaimer in the
     77  *    documentation and/or other materials provided with the distribution.
     78  * 3. All advertising materials mentioning features or use of this software
     79  *    must display the following acknowledgement:
     80  *	This product includes software developed by Mark Brinicombe
     81  *	for the NetBSD Project.
     82  * 4. The name of the company nor the name of the author may be used to
     83  *    endorse or promote products derived from this software without specific
     84  *    prior written permission.
     85  *
     86  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     87  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     88  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     89  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     90  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     91  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     92  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     93  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     94  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     95  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     96  * SUCH DAMAGE.
     97  *
     98  * Machine dependant functions for kernel setup for integrator board
     99  *
    100  * Created      : 24/11/97
    101  */
    102 
    103 /*
    104  * Machine dependant functions for kernel setup for Samsung SMDK2800
    105  * derived from integrator_machdep.c
    106  */
    107 
    108 #include <sys/cdefs.h>
    109 __KERNEL_RCSID(0, "$NetBSD: smdk2800_machdep.c,v 1.15 2003/07/15 00:25:06 lukem Exp $");
    110 
    111 #include "opt_ddb.h"
    112 #include "opt_kgdb.h"
    113 #include "opt_ipkdb.h"
    114 #include "opt_pmap_debug.h"
    115 #include "opt_md.h"
    116 #include "pci.h"
    117 
    118 #include <sys/param.h>
    119 #include <sys/device.h>
    120 #include <sys/systm.h>
    121 #include <sys/kernel.h>
    122 #include <sys/exec.h>
    123 #include <sys/proc.h>
    124 #include <sys/msgbuf.h>
    125 #include <sys/reboot.h>
    126 #include <sys/termios.h>
    127 #include <sys/ksyms.h>
    128 
    129 #include <uvm/uvm_extern.h>
    130 
    131 #include <dev/cons.h>
    132 #include <dev/md.h>
    133 
    134 #include <machine/db_machdep.h>
    135 #include <ddb/db_sym.h>
    136 #include <ddb/db_extern.h>
    137 #ifdef KGDB
    138 #include <sys/kgdb.h>
    139 #endif
    140 
    141 #include <machine/bootconfig.h>
    142 #include <machine/bus.h>
    143 #include <machine/cpu.h>
    144 #include <machine/frame.h>
    145 #include <machine/intr.h>
    146 #include <arm/undefined.h>
    147 
    148 #include <arm/arm32/machdep.h>
    149 
    150 #include <arm/s3c2xx0/s3c2800reg.h>
    151 #include <arm/s3c2xx0/s3c2800var.h>
    152 
    153 #include "ksyms.h"
    154 
    155 #ifndef	SDRAM_START
    156 #define	SDRAM_START	S3C2800_DBANK0_START
    157 #endif
    158 #ifndef	SDRAM_SIZE
    159 #define	SDRAM_SIZE	(32*1024*1024)
    160 #endif
    161 
    162 /*
    163  * Address to map I/O registers in early initialize stage.
    164  */
    165 #define	SMDK2800_IO_AREA_VBASE	0xfd000000
    166 #define SMDK2800_VBASE_FREE	0xfd200000
    167 
    168 /* Kernel text starts 2MB in from the bottom of the kernel address space. */
    169 #define	KERNEL_TEXT_BASE	(KERNEL_BASE + 0x00200000)
    170 #define	KERNEL_VM_BASE		(KERNEL_BASE + 0x01000000)
    171 
    172 /*
    173  * The range 0xc1000000 - 0xccffffff is available for kernel VM space
    174  * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
    175  */
    176 #define KERNEL_VM_SIZE		0x0C000000
    177 
    178 /* Memory disk support */
    179 #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR)
    180 #define DO_MEMORY_DISK
    181 /* We have memory disk image outside of the kernel on ROM. */
    182 #ifdef MEMORY_DISK_ROOT_ROM
    183 /* map the image directory and use read-only */
    184 #else
    185 /* copy the image to RAM */
    186 #endif
    187 #endif
    188 
    189 
    190 /*
    191  * Address to call from cpu_reset() to reset the machine.
    192  * This is machine architecture dependant as it varies depending
    193  * on where the ROM appears when you turn the MMU off.
    194  */
    195 u_int cpu_reset_address = (u_int)0;
    196 
    197 /* Define various stack sizes in pages */
    198 #define IRQ_STACK_SIZE	1
    199 #define ABT_STACK_SIZE	1
    200 #ifdef IPKDB
    201 #define UND_STACK_SIZE	2
    202 #else
    203 #define UND_STACK_SIZE	1
    204 #endif
    205 
    206 BootConfig bootconfig;		/* Boot config storage */
    207 char *boot_args = NULL;
    208 char *boot_file = NULL;
    209 
    210 vm_offset_t physical_start;
    211 vm_offset_t physical_freestart;
    212 vm_offset_t physical_freeend;
    213 vm_offset_t physical_end;
    214 u_int free_pages;
    215 vm_offset_t pagetables_start;
    216 int physmem = 0;
    217 
    218 /*int debug_flags;*/
    219 #ifndef PMAP_STATIC_L1S
    220 int max_processes = 64;		/* Default number */
    221 #endif				/* !PMAP_STATIC_L1S */
    222 
    223 /* Physical and virtual addresses for some global pages */
    224 pv_addr_t systempage;
    225 pv_addr_t irqstack;
    226 pv_addr_t undstack;
    227 pv_addr_t abtstack;
    228 pv_addr_t kernelstack;
    229 
    230 vm_offset_t msgbufphys;
    231 
    232 extern u_int data_abort_handler_address;
    233 extern u_int prefetch_abort_handler_address;
    234 extern u_int undefined_handler_address;
    235 
    236 #ifdef PMAP_DEBUG
    237 extern int pmap_debug_level;
    238 #endif
    239 
    240 #define KERNEL_PT_SYS		0	/* L2 table for mapping zero page */
    241 #define KERNEL_PT_KERNEL	1	/* L2 table for mapping kernel */
    242 #define	KERNEL_PT_KERNEL_NUM	2	/* L2 tables for mapping kernel VM */
    243 
    244 #define KERNEL_PT_VMDATA	(KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
    245 
    246 #define	KERNEL_PT_VMDATA_NUM	4	/* start with 16MB of KVM */
    247 #define NUM_KERNEL_PTS		(KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
    248 
    249 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
    250 
    251 struct user *proc0paddr;
    252 
    253 /* Prototypes */
    254 
    255 void consinit(void);
    256 void kgdb_port_init(void);
    257 
    258 static int
    259 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
    260     int cacheable, bus_space_handle_t * bshp);
    261 static void map_builtin_peripherals(void);
    262 static void copy_io_area_map(pd_entry_t * new_pd);
    263 
    264 /* A load of console goo. */
    265 #include "vga.h"
    266 #if NVGA > 0
    267 #include <dev/ic/mc6845reg.h>
    268 #include <dev/ic/pcdisplayvar.h>
    269 #include <dev/ic/vgareg.h>
    270 #include <dev/ic/vgavar.h>
    271 #endif
    272 
    273 #include "com.h"
    274 #if NCOM > 0
    275 #include <dev/ic/comreg.h>
    276 #include <dev/ic/comvar.h>
    277 #endif
    278 
    279 #include "sscom.h"
    280 #if NSSCOM > 0
    281 #include "opt_sscom.h"
    282 #include <arm/s3c2xx0/sscom_var.h>
    283 #endif
    284 
    285 /*
    286  * Define the default console speed for the board.  This is generally
    287  * what the firmware provided with the board defaults to.
    288  */
    289 #ifndef CONSPEED
    290 #define CONSPEED B115200	/* TTYDEF_SPEED */
    291 #endif
    292 #ifndef CONMODE
    293 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8)   /* 8N1 */
    294 #endif
    295 
    296 int comcnspeed = CONSPEED;
    297 int comcnmode = CONMODE;
    298 
    299 struct bus_space bootstrap_bs_tag;
    300 
    301 /*
    302  * void cpu_reboot(int howto, char *bootstr)
    303  *
    304  * Reboots the system
    305  *
    306  * Deal with any syncing, unmounting, dumping and shutdown hooks,
    307  * then reset the CPU.
    308  */
    309 void
    310 cpu_reboot(int howto, char *bootstr)
    311 {
    312 
    313 	cpu_reset_address = vtophys((u_int)s3c2800_softreset);
    314 
    315 	/*
    316 	 * If we are still cold then hit the air brakes
    317 	 * and crash to earth fast
    318 	 */
    319 	if (cold) {
    320 		doshutdownhooks();
    321 		printf("The operating system has halted.\n");
    322 		printf("Please press any key to reboot.\n\n");
    323 		cngetc();
    324 		printf("rebooting...\n");
    325 		cpu_reset();
    326 		/* NOTREACHED */
    327 	}
    328 	/* Disable console buffering */
    329 
    330 	/*
    331 	 * If RB_NOSYNC was not specified sync the discs.
    332 	 * Note: Unless cold is set to 1 here, syslogd will die during the
    333 	 * unmount.  It looks like syslogd is getting woken up only to find
    334 	 * that it cannot page part of the binary in as the filesystem has
    335 	 * been unmounted.
    336 	 */
    337 	if (!(howto & RB_NOSYNC))
    338 		bootsync();
    339 
    340 	/* Say NO to interrupts */
    341 	splhigh();
    342 
    343 	/* Do a dump if requested. */
    344 	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
    345 		dumpsys();
    346 
    347 	/* Run any shutdown hooks */
    348 	doshutdownhooks();
    349 
    350 	/* Make sure IRQ's are disabled */
    351 	IRQdisable;
    352 
    353 	if (howto & RB_HALT) {
    354 		printf("The operating system has halted.\n");
    355 		printf("Please press any key to reboot.\n\n");
    356 		cngetc();
    357 	}
    358 	printf("rebooting...\n");
    359 	cpu_reset();
    360 	/* NOTREACHED */
    361 }
    362 #define ioreg_write8(a,v)  (*(volatile uint8_t *)(a)=(v))
    363 
    364 /*
    365  * u_int initarm(...)
    366  *
    367  * Initial entry point on startup. This gets called before main() is
    368  * entered.
    369  * It should be responsible for setting up everything that must be
    370  * in place when main is called.
    371  * This includes
    372  *   Taking a copy of the boot configuration structure.
    373  *   Initialising the physical console so characters can be printed.
    374  *   Setting up page tables for the kernel
    375  *   Relocating the kernel to the bottom of physical memory
    376  */
    377 
    378 u_int
    379 initarm(void *arg)
    380 {
    381 	int loop;
    382 	int loop1;
    383 	u_int l1pagetable;
    384 	extern int etext asm("_etext");
    385 	extern int end asm("_end");
    386 	pv_addr_t kernel_l1pt;
    387 	struct s3c2800_softc temp_softc;	/* used to initialize IO regs */
    388 	int progress_counter = 0;
    389 
    390 #ifdef DO_MEMORY_DISK
    391 	vm_offset_t md_root_start;
    392 #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE)
    393 #endif
    394 
    395 #define gpio_read8(reg) bus_space_read_1(temp_softc.sc_sx.sc_iot,  \
    396 					 temp_softc.sc_sx.sc_gpio_ioh, (reg))
    397 
    398 #define LEDSTEP()  __LED(progress_counter++)
    399 
    400 #define pdatc (*(volatile uint8_t *)(S3C2800_GPIO_BASE+GPIO_PDATC))
    401 #define __LED(x)  (pdatc = (pdatc & ~0x07) | (~(x) & 0x07))
    402 
    403 	LEDSTEP();
    404 	/*
    405 	 * Heads up ... Setup the CPU / MMU / TLB functions
    406 	 */
    407 	if (set_cpufuncs())
    408 		panic("cpu not recognized!");
    409 
    410 	LEDSTEP();
    411 
    412 	map_builtin_peripherals();
    413 
    414 	/*
    415 	 * prepare fake bus space tag
    416 	 */
    417 	bootstrap_bs_tag = s3c2xx0_bs_tag;
    418 	bootstrap_bs_tag.bs_map = bootstrap_bs_map;
    419 	s3c2xx0_softc = &temp_softc.sc_sx;
    420 	s3c2xx0_softc->sc_iot = &bootstrap_bs_tag;
    421 
    422 	bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_GPIO_BASE,
    423 	    S3C2800_GPIO_SIZE, 0, &temp_softc.sc_sx.sc_gpio_ioh);
    424 	bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_INTCTL_BASE,
    425 	    S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_sx.sc_intctl_ioh);
    426 	bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_CLKMAN_BASE,
    427 	    S3C2800_CLKMAN_SIZE, 0, &temp_softc.sc_sx.sc_clkman_ioh);
    428 
    429 #undef __LED
    430 #define __LED(x)							\
    431 	bus_space_write_1(&bootstrap_bs_tag,				\
    432 	    temp_softc.sc_sx.sc_gpio_ioh,				\
    433 	    GPIO_PDATC, (~(x) & 0x07) |					\
    434 	    (bus_space_read_1(&bootstrap_bs_tag,			\
    435 		temp_softc.sc_sx.sc_gpio_ioh, GPIO_PDATC ) & ~0x07))
    436 
    437 	LEDSTEP();
    438 
    439 	/* Disable all peripheral interrupts */
    440 	bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_sx.sc_intctl_ioh,
    441 	    INTCTL_INTMSK, 0);
    442 
    443 	s3c2800_clock_freq(&temp_softc);
    444 
    445 	consinit();
    446 #ifdef VERBOSE_INIT_ARM
    447 	printf("consinit done\n");
    448 #endif
    449 
    450 #ifdef KGDB
    451 	LEDSTEP();
    452 	kgdb_port_init();
    453 #endif
    454 	LEDSTEP();
    455 
    456 #ifdef VERBOSE_INIT_ARM
    457 	/* Talk to the user */
    458 	printf("\nNetBSD/evbarm (SMDK2800) booting ...\n");
    459 #endif
    460 
    461 	/*
    462 	 * Ok we have the following memory map
    463 	 *
    464 	 * Physical Address Range     Description
    465 	 * -----------------------    ----------------------------------
    466 	 * 0x00000000 - 0x00ffffff    Intel flash Memory   (16MB)
    467 	 * 0x02000000 - 0x020fffff    AMD flash Memory   (1MB)
    468 	 * or 			       (depend on DIPSW setting)
    469 	 * 0x00000000 - 0x000fffff    AMD flash Memory   (1MB)
    470 	 * 0x02000000 - 0x02ffffff    Intel flash Memory   (16MB)
    471 	 *
    472 	 * 0x08000000 - 0x09ffffff    SDRAM (32MB)
    473 	 * 0x20000000 - 0x3fffffff    PCI space
    474 	 *
    475 	 * The initarm() has the responsibility for creating the kernel
    476 	 * page tables.
    477 	 * It must also set up various memory pointers that are used
    478 	 * by pmap etc.
    479 	 */
    480 
    481 	/* Fake bootconfig structure for the benefit of pmap.c */
    482 	/* XXX must make the memory description h/w independent */
    483 	bootconfig.dramblocks = 1;
    484 	bootconfig.dram[0].address = SDRAM_START;
    485 	bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE;
    486 
    487 	/*
    488 	 * Set up the variables that define the availablilty of
    489 	 * physical memory.  For now, we're going to set
    490 	 * physical_freestart to 0x08200000 (where the kernel
    491 	 * was loaded), and allocate the memory we need downwards.
    492 	 * If we get too close to the bottom of SDRAM, we
    493 	 * will panic.  We will update physical_freestart and
    494 	 * physical_freeend later to reflect what pmap_bootstrap()
    495 	 * wants to see.
    496 	 *
    497 	 * XXX pmap_bootstrap() needs an enema.
    498 	 */
    499 	physical_start = bootconfig.dram[0].address;
    500 	physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
    501 
    502 #if DO_MEMORY_DISK
    503 #ifdef MEMORY_DISK_ROOT_ROM
    504 	md_root_start = MEMORY_DISK_ROOT_ADDR;
    505 	boothowto |= RB_RDONLY;
    506 #else
    507 	/* Reserve physmem for ram disk */
    508 	md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1));
    509 	printf("Reserve %ld bytes for memory disk\n",
    510 	    physical_end - md_root_start);
    511 	/* copy fs contents */
    512 	memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR,
    513 	    MD_ROOT_SIZE);
    514 	physical_end = md_root_start;
    515 #endif
    516 #endif
    517 
    518 	physical_freestart = 0x08000000UL;	/* XXX */
    519 	physical_freeend = 0x08200000UL;
    520 
    521 	physmem = (physical_end - physical_start) / PAGE_SIZE;
    522 
    523 #ifdef VERBOSE_INIT_ARM
    524 	/* Tell the user about the memory */
    525 	printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
    526 	    physical_start, physical_end - 1);
    527 #endif
    528 
    529 	/*
    530 	 * XXX
    531 	 * Okay, the kernel starts 2MB in from the bottom of physical
    532 	 * memory.  We are going to allocate our bootstrap pages downwards
    533 	 * from there.
    534 	 *
    535 	 * We need to allocate some fixed page tables to get the kernel
    536 	 * going.  We allocate one page directory and a number of page
    537 	 * tables and store the physical addresses in the kernel_pt_table
    538 	 * array.
    539 	 *
    540 	 * The kernel page directory must be on a 16K boundary.  The page
    541 	 * tables must be on 4K bounaries.  What we do is allocate the
    542 	 * page directory on the first 16K boundary that we encounter, and
    543 	 * the page tables on 4K boundaries otherwise.  Since we allocate
    544 	 * at least 3 L2 page tables, we are guaranteed to encounter at
    545 	 * least one 16K aligned region.
    546 	 */
    547 
    548 #ifdef VERBOSE_INIT_ARM
    549 	printf("Allocating page tables\n");
    550 #endif
    551 
    552 	free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
    553 
    554 #ifdef VERBOSE_INIT_ARM
    555 	printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
    556 	    physical_freestart, free_pages, free_pages);
    557 #endif
    558 
    559 	/* Define a macro to simplify memory allocation */
    560 #define	valloc_pages(var, np)				\
    561 	alloc_pages((var).pv_pa, (np));			\
    562 	(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
    563 
    564 #define alloc_pages(var, np)				\
    565 	physical_freeend -= ((np) * PAGE_SIZE);		\
    566 	if (physical_freeend < physical_freestart)	\
    567 		panic("initarm: out of memory");	\
    568 	(var) = physical_freeend;			\
    569 	free_pages -= (np);				\
    570 	memset((char *)(var), 0, ((np) * PAGE_SIZE));
    571 
    572 	loop1 = 0;
    573 	kernel_l1pt.pv_pa = 0;
    574 	for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
    575 		/* Are we 16KB aligned for an L1 ? */
    576 		if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
    577 		    && kernel_l1pt.pv_pa == 0) {
    578 			valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
    579 		} else {
    580 			valloc_pages(kernel_pt_table[loop1],
    581 			    L2_TABLE_SIZE / PAGE_SIZE);
    582 			++loop1;
    583 		}
    584 	}
    585 
    586 	/* This should never be able to happen but better confirm that. */
    587 	if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
    588 		panic("initarm: Failed to align the kernel page directory\n");
    589 
    590 	/*
    591 	 * Allocate a page for the system page mapped to V0x00000000
    592 	 * This page will just contain the system vectors and can be
    593 	 * shared by all processes.
    594 	 */
    595 	alloc_pages(systempage.pv_pa, 1);
    596 
    597 	/* Allocate stacks for all modes */
    598 	valloc_pages(irqstack, IRQ_STACK_SIZE);
    599 	valloc_pages(abtstack, ABT_STACK_SIZE);
    600 	valloc_pages(undstack, UND_STACK_SIZE);
    601 	valloc_pages(kernelstack, UPAGES);
    602 
    603 #ifdef VERBOSE_INIT_ARM
    604 	printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
    605 	    irqstack.pv_va);
    606 	printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
    607 	    abtstack.pv_va);
    608 	printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
    609 	    undstack.pv_va);
    610 	printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
    611 	    kernelstack.pv_va);
    612 #endif
    613 
    614 	alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
    615 
    616 	LEDSTEP();
    617 
    618 	/*
    619 	 * Ok we have allocated physical pages for the primary kernel
    620 	 * page tables
    621 	 */
    622 
    623 #ifdef VERBOSE_INIT_ARM
    624 	printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
    625 #endif
    626 
    627 	/*
    628 	 * Now we start construction of the L1 page table
    629 	 * We start by mapping the L2 page tables into the L1.
    630 	 * This means that we can replace L1 mappings later on if necessary
    631 	 */
    632 	l1pagetable = kernel_l1pt.pv_pa;
    633 
    634 	/* Map the L2 pages tables in the L1 page table */
    635 	pmap_link_l2pt(l1pagetable, 0x00000000,
    636 	    &kernel_pt_table[KERNEL_PT_SYS]);
    637 	for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
    638 		pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
    639 		    &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
    640 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
    641 		pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
    642 		    &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
    643 
    644 	/* update the top of the kernel VM */
    645 	pmap_curmaxkvaddr =
    646 	    KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
    647 
    648 #ifdef VERBOSE_INIT_ARM
    649 	printf("Mapping kernel\n");
    650 #endif
    651 
    652 	/* Now we fill in the L2 pagetable for the kernel static code/data */
    653 	{
    654 		size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE;
    655 		size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE;
    656 		u_int logical;
    657 
    658 		textsize = (textsize + PGOFSET) & ~PGOFSET;
    659 		totalsize = (totalsize + PGOFSET) & ~PGOFSET;
    660 
    661 		logical = 0x00200000;	/* offset of kernel in RAM */
    662 
    663 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
    664 		    physical_start + logical, textsize,
    665 		    VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
    666 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
    667 		    physical_start + logical, totalsize - textsize,
    668 		    VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
    669 	}
    670 
    671 #ifdef VERBOSE_INIT_ARM
    672 	printf("Constructing L2 page tables\n");
    673 #endif
    674 
    675 	/* Map the stack pages */
    676 	pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
    677 	    IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
    678 	    PTE_CACHE);
    679 	pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
    680 	    ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
    681 	    PTE_CACHE);
    682 	pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
    683 	    UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
    684 	    PTE_CACHE);
    685 	pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
    686 	    UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
    687 
    688 	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
    689 	    L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
    690 
    691 	for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
    692 		pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
    693 		    kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
    694 		    VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
    695 	}
    696 
    697 	/* Map the vector page. */
    698 #if 1
    699 	/* MULTI-ICE requires that page 0 is NC/NB so that it can download the
    700 	 * cache-clean code there.  */
    701 	pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
    702 	    VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
    703 #else
    704 	pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
    705 	    VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
    706 #endif
    707 
    708 #ifdef MEMORY_DISK_DYNAMIC
    709 	/* map MD root image */
    710 	bootstrap_bs_map(&bootstrap_bs_tag, md_root_start, MD_ROOT_SIZE,
    711 			 BUS_SPACE_MAP_CACHEABLE | BUS_SPACE_MAP_LINEAR,
    712 			 (bus_space_handle_t *)&md_root_start);
    713 
    714 	md_root_setconf((void *)md_root_start, MD_ROOT_SIZE);
    715 #endif /* MEMORY_DISK_DYNAMIC */
    716 	/*
    717 	 * map integrated peripherals at same address in l1pagetable
    718 	 * so that we can continue to use console.
    719 	 */
    720 	copy_io_area_map((pd_entry_t *)l1pagetable);
    721 
    722 	/*
    723 	 * Now we have the real page tables in place so we can switch to them.
    724 	 * Once this is done we will be running with the REAL kernel page
    725 	 * tables.
    726 	 */
    727 
    728 	/*
    729 	 * Update the physical_freestart/physical_freeend/free_pages
    730 	 * variables.
    731 	 */
    732 	{
    733 		physical_freestart = physical_start +
    734 		    (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE);
    735 		physical_freeend = physical_end;
    736 		free_pages =
    737 		    (physical_freeend - physical_freestart) / PAGE_SIZE;
    738 	}
    739 
    740 	/* Switch tables */
    741 #ifdef VERBOSE_INIT_ARM
    742 	printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
    743 	    physical_freestart, free_pages, free_pages);
    744 	printf("switching to new L1 page table  @%#lx...", kernel_l1pt.pv_pa);
    745 #endif
    746 	LEDSTEP();
    747 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
    748 	setttb(kernel_l1pt.pv_pa);
    749 	cpu_tlb_flushID();
    750 	cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
    751 
    752 	/*
    753 	 * Moved from cpu_startup() as data_abort_handler() references
    754 	 * this during uvm init
    755 	 */
    756 	proc0paddr = (struct user *)kernelstack.pv_va;
    757 	lwp0.l_addr = proc0paddr;
    758 
    759 #ifdef VERBOSE_INIT_ARM
    760 	printf("done!\n");
    761 #endif
    762 
    763 #if 0
    764 	/*
    765 	 * The IFPGA registers have just moved.
    766 	 * Detach the diagnostic serial port and reattach at the new address.
    767 	 */
    768 	plcomcndetach();
    769 	/*
    770 	 * XXX this should only be done in main() but it useful to
    771 	 * have output earlier ...
    772 	 */
    773 	consinit();
    774 #endif
    775 
    776 	LEDSTEP();
    777 #ifdef VERBOSE_INIT_ARM
    778 	printf("bootstrap done.\n");
    779 #endif
    780 
    781 	arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
    782 
    783 	/*
    784 	 * Pages were allocated during the secondary bootstrap for the
    785 	 * stacks for different CPU modes.
    786 	 * We must now set the r13 registers in the different CPU modes to
    787 	 * point to these stacks.
    788 	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
    789 	 * of the stack memory.
    790 	 */
    791 #ifdef VERBOSE_INIT_ARM
    792 	printf("init subsystems: stacks ");
    793 #endif
    794 
    795 	set_stackptr(PSR_IRQ32_MODE,
    796 	    irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
    797 	set_stackptr(PSR_ABT32_MODE,
    798 	    abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
    799 	set_stackptr(PSR_UND32_MODE,
    800 	    undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
    801 
    802 	LEDSTEP();
    803 
    804 	/*
    805 	 * Well we should set a data abort handler.
    806 	 * Once things get going this will change as we will need a proper
    807 	 * handler.
    808 	 * Until then we will use a handler that just panics but tells us
    809 	 * why.
    810 	 * Initialisation of the vectors will just panic on a data abort.
    811 	 * This just fills in a slighly better one.
    812 	 */
    813 #ifdef VERBOSE_INIT_ARM
    814 	printf("vectors ");
    815 #endif
    816 	data_abort_handler_address = (u_int)data_abort_handler;
    817 	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
    818 	undefined_handler_address = (u_int)undefinedinstruction_bounce;
    819 
    820 	/* Initialise the undefined instruction handlers */
    821 #ifdef VERBOSE_INIT_ARM
    822 	printf("undefined ");
    823 #endif
    824 	undefined_init();
    825 
    826 	LEDSTEP();
    827 
    828 	/* Load memory into UVM. */
    829 #ifdef VERBOSE_INIT_ARM
    830 	printf("page ");
    831 #endif
    832 	uvm_setpagesize();	/* initialize PAGE_SIZE-dependent variables */
    833 	uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
    834 	    atop(physical_freestart), atop(physical_freeend),
    835 	    VM_FREELIST_DEFAULT);
    836 
    837 	LEDSTEP();
    838 	/* Boot strap pmap telling it where the kernel page table is */
    839 #ifdef VERBOSE_INIT_ARM
    840 	printf("pmap ");
    841 #endif
    842 	pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
    843 	    KERNEL_VM_BASE + KERNEL_VM_SIZE);
    844 
    845 	LEDSTEP();
    846 
    847 	/* Setup the IRQ system */
    848 #ifdef VERBOSE_INIT_ARM
    849 	printf("irq ");
    850 #endif
    851 	/* XXX irq_init(); */
    852 
    853 #ifdef VERBOSE_INIT_ARM
    854 	printf("done.\n");
    855 #endif
    856 
    857 #ifdef BOOTHOWTO_INIT
    858 	boothowto |= BOOTHOWTO_INIT;
    859 #endif
    860 	{
    861 		uint8_t  gpio = ~gpio_read8(GPIO_PDATF);
    862 
    863 		if (gpio & (1<<5)) /* SW3 */
    864 			boothowto ^= RB_SINGLE;
    865 		if (gpio & (1<<7)) /* SW7 */
    866 			boothowto ^= RB_KDB;
    867 #ifdef VERBOSE_INIT_ARM
    868 		printf( "sw: %x boothowto: %x\n", gpio, boothowto );
    869 #endif
    870 	}
    871 
    872 #ifdef IPKDB
    873 	/* Initialise ipkdb */
    874 	ipkdb_init();
    875 	if (boothowto & RB_KDB)
    876 		ipkdb_connect(0);
    877 #endif
    878 
    879 #ifdef KGDB
    880 	if (boothowto & RB_KDB) {
    881 		kgdb_debug_init = 1;
    882 		kgdb_connect(1);
    883 	}
    884 #endif
    885 
    886 #if NKSYMS || defined(DDB) || defined(LKM)
    887 	/* Firmware doesn't load symbols. */
    888 	ksyms_init(0, NULL, NULL);
    889 #endif
    890 
    891 #ifdef DDB
    892 	db_machine_init();
    893 	if (boothowto & RB_KDB)
    894 		Debugger();
    895 #endif
    896 
    897 	/* We return the new stack pointer address */
    898 	return (kernelstack.pv_va + USPACE_SVC_STACK_TOP);
    899 }
    900 
    901 void
    902 consinit(void)
    903 {
    904 	static int consinit_done = 0;
    905 	bus_space_tag_t iot = s3c2xx0_softc->sc_iot;
    906 	int pclk = s3c2xx0_softc->sc_pclk;
    907 
    908 	if (consinit_done != 0)
    909 		return;
    910 
    911 	consinit_done = 1;
    912 
    913 #if NSSCOM > 0
    914 #ifdef SSCOM0CONSOLE
    915 	if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed,
    916 		pclk, comcnmode))
    917 		return;
    918 #endif
    919 #ifdef SSCOM1CONSOLE
    920 	if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed,
    921 		pclk, comcnmode))
    922 		return;
    923 #endif
    924 #endif				/* NSSCOM */
    925 #if NCOM>0 && defined(CONCOMADDR)
    926 	if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed,
    927 		COM_FREQ, COM_TYPE_NORMAL, comcnmode))
    928 		panic("can't init serial console @%x", CONCOMADDR);
    929 	return;
    930 #endif
    931 
    932 	consinit_done = 0;
    933 }
    934 
    935 
    936 #ifdef KGDB
    937 
    938 #if (NSSCOM > 0)
    939 
    940 #ifdef KGDB_DEVNAME
    941 const char kgdb_devname[] = KGDB_DEVNAME;
    942 #else
    943 const char kgdb_devname[] = "";
    944 #endif
    945 
    946 #ifndef KGDB_DEVMODE
    947 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */
    948 #endif
    949 int kgdb_sscom_mode = KGDB_DEVMODE;
    950 
    951 #endif				/* NSSCOM */
    952 
    953 void
    954 kgdb_port_init(void)
    955 {
    956 #if (NSSCOM > 0)
    957 	int unit = -1;
    958 	int pclk = s3c2xx0_softc->sc_pclk;
    959 
    960 	if (strcmp(kgdb_devname, "sscom0") == 0)
    961 		unit = 0;
    962 	else if (strcmp(kgdb_devname, "sscom1") == 0)
    963 		unit = 1;
    964 
    965 	if (unit >= 0) {
    966 		s3c2800_sscom_kgdb_attach(s3c2xx0_softc->sc_iot,
    967 		    unit, kgdb_rate, pclk, kgdb_sscom_mode);
    968 	}
    969 #endif
    970 }
    971 #endif
    972 
    973 static __inline
    974        pd_entry_t *
    975 read_ttb(void)
    976 {
    977 	long ttb;
    978 
    979 	__asm __volatile("mrc	p15, 0, %0, c2, c0, 0" : "=r"(ttb));
    980 
    981 
    982 	return (pd_entry_t *)(ttb & ~((1 << 14) - 1));
    983 }
    984 
    985 
    986 static __inline void
    987 writeback_dcache_line(vaddr_t va)
    988 {
    989 	/* writeback Dcache line */
    990 	/* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9
    991 	 * assume write-through cache, and always flush Dcache instead of
    992 	 * cleaning it. Since Boot loader maps page table with write-back
    993 	 * cached, we really need to clean Dcache. */
    994 	asm("mcr	p15, 0, %0, c7, c10, 1"
    995 	    : :	"r"(va));
    996 }
    997 
    998 static __inline void
    999 clean_dcache_line(vaddr_t va)
   1000 {
   1001 	/* writeback and invalidate Dcache line */
   1002 	asm("mcr	p15, 0, %0, c7, c14, 1"
   1003 	    : : "r"(va));
   1004 }
   1005 
   1006 static vaddr_t section_free = SMDK2800_VBASE_FREE;
   1007 
   1008 static void
   1009 map_builtin_peripherals(void)
   1010 {
   1011 	pd_entry_t *pagedir = read_ttb();
   1012 	int i, sec;
   1013 
   1014 	for (i=0; i < 2; ++i) {
   1015 
   1016 		pmap_map_section((vaddr_t)pagedir,
   1017 		    SMDK2800_IO_AREA_VBASE + (i <<L1_S_SHIFT),
   1018 		    S3C2800_PERIPHERALS + (i << L1_S_SHIFT),
   1019 		    VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
   1020 
   1021 		sec = (SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT) + i;
   1022 		writeback_dcache_line((vaddr_t)&pagedir[sec]);
   1023 	}
   1024 
   1025 	cpu_drain_writebuf();
   1026 	cpu_tlb_flushD();
   1027 }
   1028 
   1029 /*
   1030  * simple memory mapping function used in early bootstrap stage
   1031  * before pmap is initialized.
   1032  * This assumes only peripheral registers to map. they are mapped to
   1033  * fixed address with section mapping.
   1034  */
   1035 static int
   1036 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
   1037     int flag, bus_space_handle_t * bshp)
   1038 {
   1039 	long offset;
   1040 	int modified = 0;
   1041 	pd_entry_t *pagedir = read_ttb();
   1042 	/* This assumes PA==VA for page directory */
   1043 
   1044 	if (S3C2800_PERIPHERALS <= bpa && bpa < S3C2800_PERIPHERALS + 0x200000) {
   1045 		offset = bpa - S3C2800_PERIPHERALS;
   1046 		if (offset < 0 || 2 * L1_S_SIZE < offset)
   1047 			panic("bootstrap_bs_map: can't map");
   1048 		*bshp = (bus_space_handle_t)(SMDK2800_IO_AREA_VBASE + offset);
   1049 	} else {
   1050 		vaddr_t va;
   1051 		bus_addr_t pa;
   1052 		int cacheable = flag & BUS_SPACE_MAP_CACHEABLE;
   1053 
   1054 
   1055 		size = (size + L1_S_OFFSET) & ~L1_S_OFFSET;
   1056 		pa = bpa & ~L1_S_OFFSET;
   1057 		offset = bpa - pa;
   1058 
   1059 		va = section_free;
   1060 		while (size) {
   1061 			pmap_map_section((vaddr_t)pagedir, va,
   1062 			    pa, VM_PROT_READ | VM_PROT_WRITE,
   1063 			    cacheable ? PTE_CACHE : PTE_NOCACHE);
   1064 			writeback_dcache_line((vaddr_t)& pagedir[va >> L1_S_SHIFT]);
   1065 			va += L1_S_SIZE;
   1066 			pa += L1_S_SIZE;
   1067 			size -= L1_S_SIZE;
   1068 		}
   1069 
   1070 		*bshp = (bus_space_handle_t)(section_free + offset);
   1071 		section_free = va;
   1072 	}
   1073 
   1074 
   1075 	if (modified) {
   1076 
   1077 		cpu_drain_writebuf();
   1078 		cpu_tlb_flushD();
   1079 	}
   1080 	return (0);
   1081 }
   1082 
   1083 static void
   1084 copy_io_area_map(pd_entry_t * new_pd)
   1085 {
   1086 	pd_entry_t *cur_pd = read_ttb();
   1087 	int sec;
   1088 
   1089 	for (sec = SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT;
   1090 	    sec < (section_free >> L1_S_SHIFT); ++sec) {
   1091 		new_pd[sec] = cur_pd[sec];
   1092 	}
   1093 }
   1094