smdk2800_machdep.c revision 1.2 1 /* $NetBSD: smdk2800_machdep.c,v 1.2 2003/04/02 03:49:26 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 2002 Fujitsu Component Limited
5 * Copyright (c) 2002 Genetec Corporation
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of The Fujitsu Component Limited nor the name of
17 * Genetec corporation may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35 /*
36 * Machine dependant functions for kernel setup for Samsung SMDK2800
37 * derived from integrator_machdep.c
38 */
39
40 /*
41 * Copyright (c) 2001,2002 ARM Ltd
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. The name of the company may not be used to endorse or promote
53 * products derived from this software without specific prior written
54 * permission.
55 *
56 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND
57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
58 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
59 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD
60 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
61 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
62 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
63 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
64 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
65 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
66 * POSSIBILITY OF SUCH DAMAGE.
67 *
68 */
69
70 /*
71 * Copyright (c) 1997,1998 Mark Brinicombe.
72 * Copyright (c) 1997,1998 Causality Limited.
73 * All rights reserved.
74 *
75 * Redistribution and use in source and binary forms, with or without
76 * modification, are permitted provided that the following conditions
77 * are met:
78 * 1. Redistributions of source code must retain the above copyright
79 * notice, this list of conditions and the following disclaimer.
80 * 2. Redistributions in binary form must reproduce the above copyright
81 * notice, this list of conditions and the following disclaimer in the
82 * documentation and/or other materials provided with the distribution.
83 * 3. All advertising materials mentioning features or use of this software
84 * must display the following acknowledgement:
85 * This product includes software developed by Mark Brinicombe
86 * for the NetBSD Project.
87 * 4. The name of the company nor the name of the author may be used to
88 * endorse or promote products derived from this software without specific
89 * prior written permission.
90 *
91 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
92 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
93 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
94 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
95 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
96 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
97 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
98 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
99 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
100 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
101 * SUCH DAMAGE.
102 *
103 * Machine dependant functions for kernel setup for integrator board
104 *
105 * Created : 24/11/97
106 */
107
108 #include "opt_ddb.h"
109 #include "opt_kgdb.h"
110 #include "opt_ipkdb.h"
111 #include "opt_pmap_debug.h"
112 #include "opt_md.h"
113 #include "pci.h"
114
115 #include <sys/param.h>
116 #include <sys/device.h>
117 #include <sys/systm.h>
118 #include <sys/kernel.h>
119 #include <sys/exec.h>
120 #include <sys/proc.h>
121 #include <sys/msgbuf.h>
122 #include <sys/reboot.h>
123 #include <sys/termios.h>
124
125 #include <uvm/uvm_extern.h>
126
127 #include <dev/cons.h>
128 #include <dev/md.h>
129
130 #include <machine/db_machdep.h>
131 #include <ddb/db_sym.h>
132 #include <ddb/db_extern.h>
133 #ifdef KGDB
134 #include <sys/kgdb.h>
135 #endif
136
137 #include <machine/bootconfig.h>
138 #include <machine/bus.h>
139 #include <machine/cpu.h>
140 #include <machine/frame.h>
141 #include <machine/intr.h>
142 #include <arm/undefined.h>
143
144 #include <arm/arm32/machdep.h>
145
146 #include <arm/s3c2xx0/s3c2800reg.h>
147 #include <arm/s3c2xx0/s3c2800var.h>
148
149 #ifndef SDRAM_START
150 #define SDRAM_START S3C2800_DBANK0_START
151 #endif
152 #ifndef SDRAM_SIZE
153 #define SDRAM_SIZE (32*1024*1024)
154 #endif
155
156 /*
157 * Address to map I/O registers in early initialize stage.
158 */
159 #define SMDK2800_IO_AREA_VBASE 0xfd000000
160 #define SMDK2800_VBASE_FREE 0xfd200000
161
162 /*
163 * Address to call from cpu_reset() to reset the machine.
164 * This is machine architecture dependant as it varies depending
165 * on where the ROM appears when you turn the MMU off.
166 */
167 u_int cpu_reset_address = (u_int)0;
168
169 /* Define various stack sizes in pages */
170 #define IRQ_STACK_SIZE 1
171 #define ABT_STACK_SIZE 1
172 #ifdef IPKDB
173 #define UND_STACK_SIZE 2
174 #else
175 #define UND_STACK_SIZE 1
176 #endif
177
178 BootConfig bootconfig; /* Boot config storage */
179 char *boot_args = NULL;
180 char *boot_file = NULL;
181
182 vm_offset_t physical_start;
183 vm_offset_t physical_freestart;
184 vm_offset_t physical_freeend;
185 vm_offset_t physical_end;
186 u_int free_pages;
187 vm_offset_t pagetables_start;
188 int physmem = 0;
189
190 /*int debug_flags;*/
191 #ifndef PMAP_STATIC_L1S
192 int max_processes = 64; /* Default number */
193 #endif /* !PMAP_STATIC_L1S */
194
195 /* Physical and virtual addresses for some global pages */
196 pv_addr_t systempage;
197 pv_addr_t irqstack;
198 pv_addr_t undstack;
199 pv_addr_t abtstack;
200 pv_addr_t kernelstack;
201
202 vm_offset_t msgbufphys;
203
204 extern u_int data_abort_handler_address;
205 extern u_int prefetch_abort_handler_address;
206 extern u_int undefined_handler_address;
207
208 #ifdef PMAP_DEBUG
209 extern int pmap_debug_level;
210 #endif
211
212 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
213 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
214 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */
215
216 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
217
218 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
219 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
220
221 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
222
223 struct user *proc0paddr;
224
225 #ifdef MEMORY_DISK_DYNAMIC
226 #define MD_ROOT_SIZE 4 /* in megabytes */
227 #define MD_ROOT_START 0x400000/* MD root image in ROM */
228 #endif
229
230
231 /* Prototypes */
232
233 void consinit(void);
234 void kgdb_port_init(void);
235
236 static int
237 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
238 int cacheable, bus_space_handle_t * bshp);
239 static void copy_io_area_map(pd_entry_t * new_pd);
240
241 /* A load of console goo. */
242 #include "vga.h"
243 #if NVGA > 0
244 #include <dev/ic/mc6845reg.h>
245 #include <dev/ic/pcdisplayvar.h>
246 #include <dev/ic/vgareg.h>
247 #include <dev/ic/vgavar.h>
248 #endif
249
250 #include "com.h"
251 #if NCOM > 0
252 #include <dev/ic/comreg.h>
253 #include <dev/ic/comvar.h>
254 #endif
255
256 #include "sscom.h"
257 #if NSSCOM > 0
258 #include "opt_sscom.h"
259 #include <arm/s3c2xx0/sscom_var.h>
260 #endif
261
262 /*
263 * Define the default console speed for the board. This is generally
264 * what the firmware provided with the board defaults to.
265 */
266 #ifndef CONSPEED
267 #define CONSPEED B115200 /* TTYDEF_SPEED */
268 #endif
269 #ifndef CONMODE
270 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
271 #endif
272
273 int comcnspeed = CONSPEED;
274 int comcnmode = CONMODE;
275
276 struct bus_space bootstrap_bs_tag;
277
278 /*
279 * void cpu_reboot(int howto, char *bootstr)
280 *
281 * Reboots the system
282 *
283 * Deal with any syncing, unmounting, dumping and shutdown hooks,
284 * then reset the CPU.
285 */
286 void
287 cpu_reboot(int howto, char *bootstr)
288 {
289 #ifdef DIAGNOSTIC
290 /* info */
291 printf("boot: howto=%08x curproc=%p\n", howto, curproc);
292 #endif
293
294 cpu_reset_address = (u_int)s3c2800_softreset;
295
296 /*
297 * If we are still cold then hit the air brakes
298 * and crash to earth fast
299 */
300 if (cold) {
301 doshutdownhooks();
302 printf("The operating system has halted.\n");
303 printf("Please press any key to reboot.\n\n");
304 cngetc();
305 printf("rebooting...\n");
306 cpu_reset();
307 /* NOTREACHED */
308 }
309 /* Disable console buffering */
310
311 /*
312 * If RB_NOSYNC was not specified sync the discs.
313 * Note: Unless cold is set to 1 here, syslogd will die during the
314 * unmount. It looks like syslogd is getting woken up only to find
315 * that it cannot page part of the binary in as the filesystem has
316 * been unmounted.
317 */
318 if (!(howto & RB_NOSYNC))
319 bootsync();
320
321 /* Say NO to interrupts */
322 splhigh();
323
324 /* Do a dump if requested. */
325 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
326 dumpsys();
327
328 /* Run any shutdown hooks */
329 doshutdownhooks();
330
331 /* Make sure IRQ's are disabled */
332 IRQdisable;
333
334 if (howto & RB_HALT) {
335 printf("The operating system has halted.\n");
336 printf("Please press any key to reboot.\n\n");
337 cngetc();
338 }
339 printf("rebooting...\n");
340 cpu_reset();
341 /* NOTREACHED */
342 }
343 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v))
344
345 /*
346 * u_int initarm(...)
347 *
348 * Initial entry point on startup. This gets called before main() is
349 * entered.
350 * It should be responsible for setting up everything that must be
351 * in place when main is called.
352 * This includes
353 * Taking a copy of the boot configuration structure.
354 * Initialising the physical console so characters can be printed.
355 * Setting up page tables for the kernel
356 * Relocating the kernel to the bottom of physical memory
357 */
358
359 u_int
360 initarm(void *arg)
361 {
362 int loop;
363 int loop1;
364 u_int l1pagetable;
365 extern int etext asm("_etext");
366 extern int end asm("_end");
367 pv_addr_t kernel_l1pt;
368 pv_addr_t kernel_ptpt;
369 struct s3c2xx0_softc temp_softc; /* used to initialize IO regs */
370 int progress_counter = 0;
371 #ifdef MEMORY_DISK_DYNAMIC
372 void *md_root_start, *md_root_rom;
373 #endif
374
375 #define LEDSTEP() __LED(progress_counter++)
376
377 #define pdatc (*(volatile uint8_t *)(S3C2800_GPIO_BASE+GPIO_PDATC))
378 #define __LED(x) (pdatc = (pdatc & ~0x07) | (~(x) & 0x07))
379
380 LEDSTEP();
381 /*
382 * Heads up ... Setup the CPU / MMU / TLB functions
383 */
384 if (set_cpufuncs())
385 panic("cpu not recognized!");
386
387 LEDSTEP();
388 /*
389 * prepare fake bus space tag
390 */
391 bootstrap_bs_tag = s3c2xx0_bs_tag;
392 bootstrap_bs_tag.bs_map = bootstrap_bs_map;
393 temp_softc.sc_iot = &bootstrap_bs_tag;
394 s3c2xx0_softc = &temp_softc;
395
396
397 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_GPIO_BASE,
398 S3C2800_GPIO_SIZE, 0, &temp_softc.sc_gpio_ioh);
399 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_INTCTL_BASE,
400 S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_intctl_ioh);
401
402 #undef __LED
403 #define __LED(x) bus_space_write_1( &bootstrap_bs_tag, temp_softc.sc_gpio_ioh, \
404 GPIO_PDATC, (~(x) & 0x07) | \
405 (bus_space_read_1( &bootstrap_bs_tag, \
406 temp_softc.sc_gpio_ioh, GPIO_PDATC ) & ~0x07) )
407
408 LEDSTEP();
409
410 /* Disable all peripheral interrupts */
411 bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_intctl_ioh,
412 INTCTL_INTMSK, 0);
413
414 consinit();
415 printf("consinit done\n");
416
417 #ifdef KGDB
418 LEDSTEP();
419 kgdb_port_init();
420 #endif
421 LEDSTEP();
422
423 /* Talk to the user */
424 printf("\nNetBSD/evbarm (SMDK2800) booting ...\n");
425
426 /*
427 * Ok we have the following memory map
428 *
429 * Physical Address Range Description
430 * ----------------------- ----------------------------------
431 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB)
432 * 0x02000000 - 0x020fffff AMD flash Memory (1MB)
433 * or (depend on DIPSW setting)
434 * 0x00000000 - 0x000fffff AMD flash Memory (1MB)
435 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB)
436 *
437 * 0x08000000 - 0x09ffffff SDRAM (32MB)
438 * 0x20000000 - 0x3fffffff PCI space
439 *
440 * The initarm() has the responsibility for creating the kernel
441 * page tables.
442 * It must also set up various memory pointers that are used
443 * by pmap etc.
444 */
445
446 /* Fake bootconfig structure for the benefit of pmap.c */
447 /* XXX must make the memory description h/w independent */
448 bootconfig.dramblocks = 1;
449 bootconfig.dram[0].address = SDRAM_START;
450 bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE;
451
452 /*
453 * Set up the variables that define the availablilty of
454 * physical memory. For now, we're going to set
455 * physical_freestart to 0x08200000 (where the kernel
456 * was loaded), and allocate the memory we need downwards.
457 * If we get too close to the bottom of SDRAM, we
458 * will panic. We will update physical_freestart and
459 * physical_freeend later to reflect what pmap_bootstrap()
460 * wants to see.
461 *
462 * XXX pmap_bootstrap() needs an enema.
463 */
464 physical_start = bootconfig.dram[0].address;
465 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
466 #ifdef MEMORY_DISK_DYNAMIC
467 /* Reserve for ram disk */
468 printf("Reserve %d bytes for memory disk\n", MD_ROOT_SIZE * L1_S_SIZE);
469 physical_end -= MD_ROOT_SIZE * L1_S_SIZE;
470 #endif
471
472 physical_freestart = 0x08000000UL; /* XXX */
473 physical_freeend = 0x08200000UL;
474
475 physmem = (physical_end - physical_start) / PAGE_SIZE;
476
477 /* Tell the user about the memory */
478 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
479 physical_start, physical_end - 1);
480
481 /*
482 * XXX
483 * Okay, the kernel starts 2MB in from the bottom of physical
484 * memory. We are going to allocate our bootstrap pages downwards
485 * from there.
486 *
487 * We need to allocate some fixed page tables to get the kernel
488 * going. We allocate one page directory and a number of page
489 * tables and store the physical addresses in the kernel_pt_table
490 * array.
491 *
492 * The kernel page directory must be on a 16K boundary. The page
493 * tables must be on 4K bounaries. What we do is allocate the
494 * page directory on the first 16K boundary that we encounter, and
495 * the page tables on 4K boundaries otherwise. Since we allocate
496 * at least 3 L2 page tables, we are guaranteed to encounter at
497 * least one 16K aligned region.
498 */
499
500 #ifdef VERBOSE_INIT_ARM
501 printf("Allocating page tables\n");
502 #endif
503
504 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
505
506 #ifdef VERBOSE_INIT_ARM
507 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
508 physical_freestart, free_pages, free_pages);
509 #endif
510
511 /* Define a macro to simplify memory allocation */
512 #define valloc_pages(var, np) \
513 alloc_pages((var).pv_pa, (np)); \
514 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
515
516 #define alloc_pages(var, np) \
517 physical_freeend -= ((np) * PAGE_SIZE); \
518 if (physical_freeend < physical_freestart) \
519 panic("initarm: out of memory"); \
520 (var) = physical_freeend; \
521 free_pages -= (np); \
522 memset((char *)(var), 0, ((np) * PAGE_SIZE));
523
524 loop1 = 0;
525 kernel_l1pt.pv_pa = 0;
526 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
527 /* Are we 16KB aligned for an L1 ? */
528 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
529 && kernel_l1pt.pv_pa == 0) {
530 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
531 } else {
532 alloc_pages(kernel_pt_table[loop1].pv_pa,
533 L2_TABLE_SIZE / PAGE_SIZE);
534 kernel_pt_table[loop1].pv_va =
535 kernel_pt_table[loop1].pv_pa;
536 ++loop1;
537 }
538 }
539
540 /* This should never be able to happen but better confirm that. */
541 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0)
542 panic("initarm: Failed to align the kernel page directory\n");
543
544 /*
545 * Allocate a page for the system page mapped to V0x00000000
546 * This page will just contain the system vectors and can be
547 * shared by all processes.
548 */
549 alloc_pages(systempage.pv_pa, 1);
550
551 /* Allocate a page for the page table to map kernel page tables. */
552 valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE);
553
554 /* Allocate stacks for all modes */
555 valloc_pages(irqstack, IRQ_STACK_SIZE);
556 valloc_pages(abtstack, ABT_STACK_SIZE);
557 valloc_pages(undstack, UND_STACK_SIZE);
558 valloc_pages(kernelstack, UPAGES);
559
560 #ifdef VERBOSE_INIT_ARM
561 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
562 irqstack.pv_va);
563 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
564 abtstack.pv_va);
565 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
566 undstack.pv_va);
567 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
568 kernelstack.pv_va);
569 #endif
570
571 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
572
573 LEDSTEP();
574
575 /*
576 * Ok we have allocated physical pages for the primary kernel
577 * page tables
578 */
579
580 #ifdef VERBOSE_INIT_ARM
581 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
582 #endif
583
584 /*
585 * Now we start construction of the L1 page table
586 * We start by mapping the L2 page tables into the L1.
587 * This means that we can replace L1 mappings later on if necessary
588 */
589 l1pagetable = kernel_l1pt.pv_pa;
590
591 /* Map the L2 pages tables in the L1 page table */
592 pmap_link_l2pt(l1pagetable, 0x00000000,
593 &kernel_pt_table[KERNEL_PT_SYS]);
594 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
595 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
596 &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
597 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
598 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
599 &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
600 pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
601
602 /* update the top of the kernel VM */
603 pmap_curmaxkvaddr =
604 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
605
606 #ifdef VERBOSE_INIT_ARM
607 printf("Mapping kernel\n");
608 #endif
609
610 /* Now we fill in the L2 pagetable for the kernel static code/data */
611 {
612 size_t textsize = (uintptr_t) & etext - KERNEL_TEXT_BASE;
613 size_t totalsize = (uintptr_t) & end - KERNEL_TEXT_BASE;
614 u_int logical;
615
616 textsize = (textsize + PGOFSET) & ~PGOFSET;
617 totalsize = (totalsize + PGOFSET) & ~PGOFSET;
618
619 logical = 0x00200000; /* offset of kernel in RAM */
620
621 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
622 physical_start + logical, textsize,
623 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
624 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
625 physical_start + logical, totalsize - textsize,
626 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
627 }
628
629 #ifdef VERBOSE_INIT_ARM
630 printf("Constructing L2 page tables\n");
631 #endif
632
633 /* Map the stack pages */
634 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
635 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
636 PTE_CACHE);
637 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
638 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
639 PTE_CACHE);
640 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
641 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
642 PTE_CACHE);
643 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
644 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
645
646 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
647 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
648
649 /* Map the page table that maps the kernel pages */
650 pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
651 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
652
653 /*
654 * Map entries in the page table used to map PTE's
655 * Basically every kernel page table gets mapped here
656 */
657 /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
658 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) {
659 pmap_map_entry(l1pagetable,
660 PTE_BASE + ((KERNEL_BASE +
661 (loop * 0x00400000)) >> (PGSHIFT - 2)),
662 kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
663 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
664 }
665 pmap_map_entry(l1pagetable,
666 PTE_BASE + (PTE_BASE >> (PGSHIFT - 2)),
667 kernel_ptpt.pv_pa, VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
668 pmap_map_entry(l1pagetable,
669 PTE_BASE + (0x00000000 >> (PGSHIFT - 2)),
670 kernel_pt_table[KERNEL_PT_SYS].pv_pa,
671 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
672 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
673 pmap_map_entry(l1pagetable,
674 PTE_BASE + ((KERNEL_VM_BASE +
675 (loop * 0x00400000)) >> (PGSHIFT - 2)),
676 kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
677 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
678
679 /* Map the vector page. */
680 #if 1
681 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the
682 * cache-clean code there. */
683 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
684 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
685 #else
686 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
687 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
688 #endif
689
690 #if 0
691 /* Map the core memory needed before autoconfig */
692 loop = 0;
693 while (l1_sec_table[loop].size) {
694 vm_size_t sz;
695
696 #ifdef VERBOSE_INIT_ARM
697 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
698 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
699 l1_sec_table[loop].va);
700 #endif
701 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
702 pmap_map_section(l1pagetable,
703 l1_sec_table[loop].va + sz,
704 l1_sec_table[loop].pa + sz,
705 l1_sec_table[loop].prot,
706 l1_sec_table[loop].cache);
707 ++loop;
708 }
709 #endif
710
711 #ifdef MEMORY_DISK_DYNAMIC
712 /* Map ram for MD root This will overwrite old page table */
713 bootstrap_bs_map(&bootstrap_bs_tag, physical_end,
714 MD_ROOT_SIZE * L1_S_SIZE, 0, (bus_space_handle_t *) & md_root_start);
715 /* map MD root image on ROM */
716 bootstrap_bs_map(&bootstrap_bs_tag, MD_ROOT_START,
717 MD_ROOT_SIZE * L1_S_SIZE, 0, (bus_space_handle_t *) & md_root_rom);
718
719 #endif
720 /*
721 * map integrated peripherals at same address in l1pagetable
722 * so that we can continue to use console.
723 */
724 copy_io_area_map((pd_entry_t *)l1pagetable);
725
726 /*
727 * Now we have the real page tables in place so we can switch to them.
728 * Once this is done we will be running with the REAL kernel page
729 * tables.
730 */
731
732 /*
733 * Update the physical_freestart/physical_freeend/free_pages
734 * variables.
735 */
736 {
737 physical_freestart = physical_start +
738 (((((uintptr_t) & end) + PGOFSET) & ~PGOFSET) -
739 KERNEL_BASE);
740 physical_freeend = physical_end;
741 free_pages =
742 (physical_freeend - physical_freestart) / PAGE_SIZE;
743 }
744
745 /* Switch tables */
746 #ifdef VERBOSE_INIT_ARM
747 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
748 physical_freestart, free_pages, free_pages);
749 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
750 #endif
751 LEDSTEP();
752 setttb(kernel_l1pt.pv_pa);
753 cpu_tlb_flushID();
754
755 #ifdef VERBOSE_INIT_ARM
756 printf("done!\n");
757 #endif
758
759 #ifdef MEMORY_DISK_DYNAMIC
760 memcpy(md_root_start, md_root_rom, MD_ROOT_SIZE * L1_S_SIZE);
761 md_root_setconf(md_root_start, MD_ROOT_SIZE * L1_S_SIZE);
762 #endif
763
764 #if 0
765 /*
766 * The IFPGA registers have just moved.
767 * Detach the diagnostic serial port and reattach at the new address.
768 */
769 plcomcndetach();
770 /*
771 * XXX this should only be done in main() but it useful to
772 * have output earlier ...
773 */
774 consinit();
775 #endif
776
777 LEDSTEP();
778 #ifdef VERBOSE_INIT_ARM
779 printf("bootstrap done.\n");
780 #endif
781
782 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
783
784 /*
785 * Pages were allocated during the secondary bootstrap for the
786 * stacks for different CPU modes.
787 * We must now set the r13 registers in the different CPU modes to
788 * point to these stacks.
789 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
790 * of the stack memory.
791 */
792 printf("init subsystems: stacks ");
793
794 set_stackptr(PSR_IRQ32_MODE,
795 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
796 set_stackptr(PSR_ABT32_MODE,
797 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
798 set_stackptr(PSR_UND32_MODE,
799 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
800
801 LEDSTEP();
802
803 /*
804 * Well we should set a data abort handler.
805 * Once things get going this will change as we will need a proper
806 * handler.
807 * Until then we will use a handler that just panics but tells us
808 * why.
809 * Initialisation of the vectors will just panic on a data abort.
810 * This just fills in a slighly better one.
811 */
812 printf("vectors ");
813 data_abort_handler_address = (u_int)data_abort_handler;
814 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
815 undefined_handler_address = (u_int)undefinedinstruction_bounce;
816
817 /* Initialise the undefined instruction handlers */
818 printf("undefined ");
819 undefined_init();
820
821 LEDSTEP();
822
823 /* Load memory into UVM. */
824 printf("page ");
825 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
826 uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
827 atop(physical_freestart), atop(physical_freeend),
828 VM_FREELIST_DEFAULT);
829
830 LEDSTEP();
831 /* Boot strap pmap telling it where the kernel page table is */
832 printf("pmap ");
833 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
834
835 LEDSTEP();
836
837 /* Setup the IRQ system */
838 printf("irq ");
839 /* XXX irq_init(); */
840
841 printf("done.\n");
842
843 boothowto |= RB_SINGLE | RB_KDB | RB_ASKNAME;
844
845 #ifdef IPKDB
846 /* Initialise ipkdb */
847 ipkdb_init();
848 if (boothowto & RB_KDB)
849 ipkdb_connect(0);
850 #endif
851
852 #ifdef KGDB
853 if (boothowto & RB_KDB) {
854 kgdb_debug_init = 1;
855 kgdb_connect(1);
856 }
857 #endif
858
859 #ifdef DDB
860 db_machine_init();
861
862 /* Firmware doesn't load symbols. */
863 ddb_init(0, NULL, NULL);
864
865 if (boothowto & RB_KDB)
866 Debugger();
867 #endif
868
869 /* We return the new stack pointer address */
870 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP);
871 }
872 #ifndef SSCOM_FREQ
873 /* our PCLK is 50MHz */
874 #define SSCOM_FREQ 50000000
875 #endif
876
877 void
878 consinit(void)
879 {
880 static int consinit_done = 0;
881 bus_space_tag_t iot = s3c2xx0_softc->sc_iot;
882
883 if (consinit_done != 0)
884 return;
885
886 consinit_done = 1;
887
888 #if NSSCOM > 0
889 #ifdef SSCOM0CONSOLE
890 if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed,
891 SSCOM_FREQ, comcnmode))
892 return;
893 #endif
894 #ifdef SSCOM1CONSOLE
895 if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed,
896 SSCOM_FREQ, comcnmode))
897 return;
898 #endif
899 #endif /* NSSCOM */
900 #if NCOM>0 && defined(CONCOMADDR)
901 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed,
902 COM_FREQ, comcnmode))
903 panic("can't init serial console @%x", CONCOMADDR);
904 return;
905 #endif
906
907 consinit_done = 0;
908 }
909
910
911 #ifdef KGDB
912
913 #if (NSSCOM > 0)
914
915 #ifdef KGDB_DEVNAME
916 const char kgdb_devname[] = KGDB_DEVNAME;
917 #else
918 const char kgdb_devname[] = "";
919 #endif
920
921 #ifndef KGDB_DEVMODE
922 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */
923 #endif
924 int kgdb_sscom_mode = KGDB_DEVMODE;
925
926 #endif /* NSSCOM */
927
928 void
929 kgdb_port_init(void)
930 {
931 #if (NSSCOM > 0)
932 int unit = -1;
933
934 if (strcmp(kgdb_devname, "sscom0") == 0)
935 unit = 0;
936 else if (strcmp(kgdb_devname, "sscom1") == 0)
937 unit = 1;
938
939 if (unit >= 0) {
940 s3c2800_sscom_kgdb_attach(s3c2xx0_softc->sc_iot,
941 unit, kgdb_rate, SSCOM_FREQ, kgdb_sscom_mode);
942 }
943 #endif
944 }
945 #endif
946
947 static __inline
948 pd_entry_t *
949 read_ttb(void)
950 {
951 long ttb;
952
953 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb));
954
955
956 return (pd_entry_t *)(ttb & ~((1 << 14) - 1));
957 }
958
959
960 static __inline void
961 writeback_dcache_line(vaddr_t va)
962 {
963 /* writeback Dcache line */
964 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9
965 * assume write-through cache, and always flush Dcache instead of
966 * cleaning it. Since Boot loader maps page table with write-back
967 * cached, we really need to clean Dcache. */
968 asm("mcr p15, 0, %0, c7, c10, 1"
969 : : "r"(va));
970 }
971
972 static __inline void
973 clean_dcache_line(vaddr_t va)
974 {
975 /* writeback and invalidate Dcache line */
976 asm("mcr p15, 0, %0, c7, c14, 1"
977 : : "r"(va));
978 }
979
980 static vaddr_t section_free = SMDK2800_VBASE_FREE;
981
982 /*
983 * simple memory mapping function used in early bootstrap stage
984 * before pmap is initialized.
985 * This assumes only peripheral registers to map. they are mapped to
986 * fixed address with section mapping.
987 */
988 static int
989 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
990 int flag, bus_space_handle_t * bshp)
991 {
992 long offset, sec;
993 int modified = 0;
994 pd_entry_t *pagedir = read_ttb();
995 /* This assumes PA==VA for page directory */
996
997 if (S3C2800_PERIPHERALS <= bpa && bpa < S3C2800_PERIPHERALS + 0x200000) {
998 offset = bpa - S3C2800_PERIPHERALS;
999 if (offset < 0 || 2 * L1_S_SIZE < offset)
1000 panic("bootstrap_bs_map: can't map");
1001 sec = (SMDK2800_IO_AREA_VBASE + offset) >> L1_S_SHIFT;
1002
1003 /* already mapped? */
1004 if ((pagedir[sec] & L1_S_FRAME) != (bpa & L1_S_FRAME)) {
1005 pmap_map_section((vaddr_t)pagedir, sec << L1_S_SHIFT,
1006 bpa & L1_S_FRAME,
1007 VM_PROT_READ | VM_PROT_WRITE,
1008 PTE_NOCACHE);
1009
1010 writeback_dcache_line((vaddr_t)&pagedir[sec]);
1011 modified = 1;
1012 }
1013 *bshp = (bus_space_handle_t)(SMDK2800_IO_AREA_VBASE + offset);
1014 } else {
1015 vaddr_t va;
1016 bus_addr_t pa;
1017 int cacheable = flag & BUS_SPACE_MAP_CACHEABLE;
1018
1019
1020 size = (size + L1_S_OFFSET) & ~L1_S_OFFSET;
1021 pa = bpa & ~L1_S_OFFSET;
1022 offset = bpa - pa;
1023
1024 va = section_free;
1025 while (size) {
1026 pmap_map_section((vaddr_t)pagedir, va,
1027 pa, VM_PROT_READ | VM_PROT_WRITE,
1028 cacheable ? PTE_CACHE : PTE_NOCACHE);
1029 writeback_dcache_line((vaddr_t)& pagedir[va >> L1_S_SHIFT]);
1030 va += L1_S_SIZE;
1031 pa += L1_S_SIZE;
1032 size -= L1_S_SIZE;
1033 }
1034
1035 *bshp = (bus_space_handle_t)(section_free + offset);
1036 section_free = va;
1037 }
1038
1039
1040 if (modified) {
1041
1042 cpu_drain_writebuf();
1043 cpu_tlb_flushD();
1044 }
1045 return (0);
1046 }
1047
1048 static void
1049 copy_io_area_map(pd_entry_t * new_pd)
1050 {
1051 pd_entry_t *cur_pd = read_ttb();
1052 vaddr_t sec;
1053
1054 for (sec = SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT;
1055 sec < (section_free >> L1_S_SHIFT); ++sec) {
1056 new_pd[sec] = cur_pd[sec];
1057 }
1058 }
1059