smdk2800_machdep.c revision 1.20
1 /* $NetBSD: smdk2800_machdep.c,v 1.20 2005/03/11 14:28:52 bsh Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003, 2005 Fujitsu Component Limited 5 * Copyright (c) 2002, 2003, 2005 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 /* 36 * Copyright (c) 2001,2002 ARM Ltd 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. The name of the company may not be used to endorse or promote 48 * products derived from this software without specific prior written 49 * permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND 52 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 53 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 54 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD 55 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 56 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 57 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 58 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 59 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 60 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 61 * POSSIBILITY OF SUCH DAMAGE. 62 * 63 */ 64 65 /* 66 * Copyright (c) 1997,1998 Mark Brinicombe. 67 * Copyright (c) 1997,1998 Causality Limited. 68 * All rights reserved. 69 * 70 * Redistribution and use in source and binary forms, with or without 71 * modification, are permitted provided that the following conditions 72 * are met: 73 * 1. Redistributions of source code must retain the above copyright 74 * notice, this list of conditions and the following disclaimer. 75 * 2. Redistributions in binary form must reproduce the above copyright 76 * notice, this list of conditions and the following disclaimer in the 77 * documentation and/or other materials provided with the distribution. 78 * 3. All advertising materials mentioning features or use of this software 79 * must display the following acknowledgement: 80 * This product includes software developed by Mark Brinicombe 81 * for the NetBSD Project. 82 * 4. The name of the company nor the name of the author may be used to 83 * endorse or promote products derived from this software without specific 84 * prior written permission. 85 * 86 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 87 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 88 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 89 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 90 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 91 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 92 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 93 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 94 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 95 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 96 * SUCH DAMAGE. 97 * 98 * Machine dependant functions for kernel setup for integrator board 99 * 100 * Created : 24/11/97 101 */ 102 103 /* 104 * Machine dependant functions for kernel setup for Samsung SMDK2800 105 * derived from integrator_machdep.c 106 */ 107 108 #include <sys/cdefs.h> 109 __KERNEL_RCSID(0, "$NetBSD: smdk2800_machdep.c,v 1.20 2005/03/11 14:28:52 bsh Exp $"); 110 111 #include "opt_ddb.h" 112 #include "opt_kgdb.h" 113 #include "opt_ipkdb.h" 114 #include "opt_pmap_debug.h" 115 #include "opt_md.h" 116 #include "pci.h" 117 118 #include <sys/param.h> 119 #include <sys/device.h> 120 #include <sys/systm.h> 121 #include <sys/kernel.h> 122 #include <sys/exec.h> 123 #include <sys/proc.h> 124 #include <sys/msgbuf.h> 125 #include <sys/reboot.h> 126 #include <sys/termios.h> 127 #include <sys/ksyms.h> 128 129 #include <uvm/uvm_extern.h> 130 131 #include <dev/cons.h> 132 #include <dev/md.h> 133 134 #include <machine/db_machdep.h> 135 #include <ddb/db_sym.h> 136 #include <ddb/db_extern.h> 137 #ifdef KGDB 138 #include <sys/kgdb.h> 139 #endif 140 141 #include <machine/bootconfig.h> 142 #include <machine/bus.h> 143 #include <machine/cpu.h> 144 #include <machine/frame.h> 145 #include <machine/intr.h> 146 #include <arm/undefined.h> 147 148 #include <arm/arm32/machdep.h> 149 150 #include <arm/s3c2xx0/s3c2800reg.h> 151 #include <arm/s3c2xx0/s3c2800var.h> 152 #include <evbarm/smdk2xx0/smdk2800var.h> 153 154 #include "ksyms.h" 155 156 /* Kernel text starts 2MB in from the bottom of the kernel address space. */ 157 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000) 158 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000) 159 160 /* 161 * The range 0xc1000000 - 0xccffffff is available for kernel VM space 162 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff 163 */ 164 #define KERNEL_VM_SIZE 0x0C000000 165 166 /* Memory disk support */ 167 #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR) 168 #define DO_MEMORY_DISK 169 /* We have memory disk image outside of the kernel on ROM. */ 170 #ifdef MEMORY_DISK_ROOT_ROM 171 /* map the image directory and use read-only */ 172 #else 173 /* copy the image to RAM */ 174 #endif 175 #endif 176 177 178 /* 179 * Address to call from cpu_reset() to reset the machine. 180 * This is machine architecture dependant as it varies depending 181 * on where the ROM appears when you turn the MMU off. 182 */ 183 u_int cpu_reset_address = (u_int)0; 184 185 /* Define various stack sizes in pages */ 186 #define IRQ_STACK_SIZE 1 187 #define ABT_STACK_SIZE 1 188 #ifdef IPKDB 189 #define UND_STACK_SIZE 2 190 #else 191 #define UND_STACK_SIZE 1 192 #endif 193 194 BootConfig bootconfig; /* Boot config storage */ 195 char *boot_args = NULL; 196 char *boot_file = NULL; 197 198 vm_offset_t physical_start; 199 vm_offset_t physical_freestart; 200 vm_offset_t physical_freeend; 201 vm_offset_t physical_end; 202 u_int free_pages; 203 vm_offset_t pagetables_start; 204 int physmem = 0; 205 206 /*int debug_flags;*/ 207 #ifndef PMAP_STATIC_L1S 208 int max_processes = 64; /* Default number */ 209 #endif /* !PMAP_STATIC_L1S */ 210 211 /* Physical and virtual addresses for some global pages */ 212 pv_addr_t systempage; 213 pv_addr_t irqstack; 214 pv_addr_t undstack; 215 pv_addr_t abtstack; 216 pv_addr_t kernelstack; 217 218 vm_offset_t msgbufphys; 219 220 extern u_int data_abort_handler_address; 221 extern u_int prefetch_abort_handler_address; 222 extern u_int undefined_handler_address; 223 224 #ifdef PMAP_DEBUG 225 extern int pmap_debug_level; 226 #endif 227 228 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */ 229 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */ 230 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */ 231 232 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 233 234 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 235 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 236 237 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 238 239 struct user *proc0paddr; 240 241 /* Prototypes */ 242 243 void consinit(void); 244 void kgdb_port_init(void); 245 246 static int 247 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 248 int cacheable, bus_space_handle_t * bshp); 249 static void map_builtin_peripherals(void); 250 static void copy_io_area_map(pd_entry_t * new_pd); 251 252 /* A load of console goo. */ 253 #include "vga.h" 254 #if NVGA > 0 255 #include <dev/ic/mc6845reg.h> 256 #include <dev/ic/pcdisplayvar.h> 257 #include <dev/ic/vgareg.h> 258 #include <dev/ic/vgavar.h> 259 #endif 260 261 #include "com.h" 262 #if NCOM > 0 263 #include <dev/ic/comreg.h> 264 #include <dev/ic/comvar.h> 265 #endif 266 267 #include "sscom.h" 268 #if NSSCOM > 0 269 #include "opt_sscom.h" 270 #include <arm/s3c2xx0/sscom_var.h> 271 #endif 272 273 /* 274 * Define the default console speed for the board. This is generally 275 * what the firmware provided with the board defaults to. 276 */ 277 #ifndef CONSPEED 278 #define CONSPEED B115200 /* TTYDEF_SPEED */ 279 #endif 280 #ifndef CONMODE 281 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 282 #endif 283 284 int comcnspeed = CONSPEED; 285 int comcnmode = CONMODE; 286 287 struct bus_space bootstrap_bs_tag; 288 289 /* 290 * void cpu_reboot(int howto, char *bootstr) 291 * 292 * Reboots the system 293 * 294 * Deal with any syncing, unmounting, dumping and shutdown hooks, 295 * then reset the CPU. 296 */ 297 void 298 cpu_reboot(int howto, char *bootstr) 299 { 300 301 cpu_reset_address = vtophys((u_int)s3c2800_softreset); 302 303 /* 304 * If we are still cold then hit the air brakes 305 * and crash to earth fast 306 */ 307 if (cold) { 308 doshutdownhooks(); 309 printf("The operating system has halted.\n"); 310 printf("Please press any key to reboot.\n\n"); 311 cngetc(); 312 printf("rebooting...\n"); 313 cpu_reset(); 314 /* NOTREACHED */ 315 } 316 /* Disable console buffering */ 317 318 /* 319 * If RB_NOSYNC was not specified sync the discs. 320 * Note: Unless cold is set to 1 here, syslogd will die during the 321 * unmount. It looks like syslogd is getting woken up only to find 322 * that it cannot page part of the binary in as the filesystem has 323 * been unmounted. 324 */ 325 if (!(howto & RB_NOSYNC)) 326 bootsync(); 327 328 /* Say NO to interrupts */ 329 splhigh(); 330 331 /* Do a dump if requested. */ 332 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 333 dumpsys(); 334 335 /* Run any shutdown hooks */ 336 doshutdownhooks(); 337 338 /* Make sure IRQ's are disabled */ 339 IRQdisable; 340 341 if (howto & RB_HALT) { 342 printf("The operating system has halted.\n"); 343 printf("Please press any key to reboot.\n\n"); 344 cngetc(); 345 } 346 printf("rebooting...\n"); 347 cpu_reset(); 348 /* NOTREACHED */ 349 } 350 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v)) 351 352 /* 353 * u_int initarm(...) 354 * 355 * Initial entry point on startup. This gets called before main() is 356 * entered. 357 * It should be responsible for setting up everything that must be 358 * in place when main is called. 359 * This includes 360 * Taking a copy of the boot configuration structure. 361 * Initialising the physical console so characters can be printed. 362 * Setting up page tables for the kernel 363 * Relocating the kernel to the bottom of physical memory 364 */ 365 366 u_int 367 initarm(void *arg) 368 { 369 int loop; 370 int loop1; 371 u_int l1pagetable; 372 extern int etext asm("_etext"); 373 extern int end asm("_end"); 374 pv_addr_t kernel_l1pt; 375 struct s3c2800_softc temp_softc; /* used to initialize IO regs */ 376 int progress_counter = 0; 377 378 #ifdef DO_MEMORY_DISK 379 vm_offset_t md_root_start; 380 #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE) 381 #endif 382 383 #define gpio_read8(reg) bus_space_read_1(temp_softc.sc_sx.sc_iot, \ 384 temp_softc.sc_sx.sc_gpio_ioh, (reg)) 385 386 #define LEDSTEP() __LED(progress_counter++) 387 388 #define pdatc (*(volatile uint8_t *)(S3C2800_GPIO_BASE+GPIO_PDATC)) 389 #define __LED(x) (pdatc = (pdatc & ~0x07) | (~(x) & 0x07)) 390 391 LEDSTEP(); 392 /* 393 * Heads up ... Setup the CPU / MMU / TLB functions 394 */ 395 if (set_cpufuncs()) 396 panic("CPU not recognized!"); 397 398 LEDSTEP(); 399 400 map_builtin_peripherals(); 401 402 /* 403 * prepare fake bus space tag 404 */ 405 bootstrap_bs_tag = s3c2xx0_bs_tag; 406 bootstrap_bs_tag.bs_map = bootstrap_bs_map; 407 s3c2xx0_softc = &temp_softc.sc_sx; 408 s3c2xx0_softc->sc_iot = &bootstrap_bs_tag; 409 410 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_GPIO_BASE, 411 S3C2800_GPIO_SIZE, 0, &temp_softc.sc_sx.sc_gpio_ioh); 412 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_INTCTL_BASE, 413 S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_sx.sc_intctl_ioh); 414 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_CLKMAN_BASE, 415 S3C2800_CLKMAN_SIZE, 0, &temp_softc.sc_sx.sc_clkman_ioh); 416 417 #undef __LED 418 #define __LED(x) \ 419 bus_space_write_1(&bootstrap_bs_tag, \ 420 temp_softc.sc_sx.sc_gpio_ioh, \ 421 GPIO_PDATC, (~(x) & 0x07) | \ 422 (bus_space_read_1(&bootstrap_bs_tag, \ 423 temp_softc.sc_sx.sc_gpio_ioh, GPIO_PDATC ) & ~0x07)) 424 425 LEDSTEP(); 426 427 /* Disable all peripheral interrupts */ 428 bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_sx.sc_intctl_ioh, 429 INTCTL_INTMSK, 0); 430 431 s3c2800_clock_freq(s3c2xx0_softc); 432 433 consinit(); 434 #ifdef VERBOSE_INIT_ARM 435 printf("consinit done\n"); 436 #endif 437 438 #ifdef KGDB 439 LEDSTEP(); 440 kgdb_port_init(); 441 #endif 442 LEDSTEP(); 443 444 #ifdef VERBOSE_INIT_ARM 445 /* Talk to the user */ 446 printf("\nNetBSD/evbarm (SMDK2800) booting ...\n"); 447 #endif 448 449 /* 450 * Ok we have the following memory map 451 * 452 * Physical Address Range Description 453 * ----------------------- ---------------------------------- 454 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB) 455 * 0x02000000 - 0x020fffff AMD flash Memory (1MB) 456 * or (depend on DIPSW setting) 457 * 0x00000000 - 0x000fffff AMD flash Memory (1MB) 458 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB) 459 * 460 * 0x08000000 - 0x09ffffff SDRAM (32MB) 461 * 0x20000000 - 0x3fffffff PCI space 462 * 463 * The initarm() has the responsibility for creating the kernel 464 * page tables. 465 * It must also set up various memory pointers that are used 466 * by pmap etc. 467 */ 468 469 /* Fake bootconfig structure for the benefit of pmap.c */ 470 /* XXX must make the memory description h/w independent */ 471 bootconfig.dramblocks = 1; 472 bootconfig.dram[0].address = SDRAM_START; 473 bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE; 474 475 /* 476 * Set up the variables that define the availablilty of 477 * physical memory. For now, we're going to set 478 * physical_freestart to 0x08200000 (where the kernel 479 * was loaded), and allocate the memory we need downwards. 480 * If we get too close to the bottom of SDRAM, we 481 * will panic. We will update physical_freestart and 482 * physical_freeend later to reflect what pmap_bootstrap() 483 * wants to see. 484 * 485 * XXX pmap_bootstrap() needs an enema. 486 */ 487 physical_start = bootconfig.dram[0].address; 488 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 489 490 #if DO_MEMORY_DISK 491 #ifdef MEMORY_DISK_ROOT_ROM 492 md_root_start = MEMORY_DISK_ROOT_ADDR; 493 boothowto |= RB_RDONLY; 494 #else 495 /* Reserve physmem for ram disk */ 496 md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1)); 497 printf("Reserve %ld bytes for memory disk\n", 498 physical_end - md_root_start); 499 /* copy fs contents */ 500 memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR, 501 MD_ROOT_SIZE); 502 physical_end = md_root_start; 503 #endif 504 #endif 505 506 physical_freestart = 0x08000000UL; /* XXX */ 507 physical_freeend = 0x08200000UL; 508 509 physmem = (physical_end - physical_start) / PAGE_SIZE; 510 511 #ifdef VERBOSE_INIT_ARM 512 /* Tell the user about the memory */ 513 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 514 physical_start, physical_end - 1); 515 #endif 516 517 /* 518 * XXX 519 * Okay, the kernel starts 2MB in from the bottom of physical 520 * memory. We are going to allocate our bootstrap pages downwards 521 * from there. 522 * 523 * We need to allocate some fixed page tables to get the kernel 524 * going. We allocate one page directory and a number of page 525 * tables and store the physical addresses in the kernel_pt_table 526 * array. 527 * 528 * The kernel page directory must be on a 16K boundary. The page 529 * tables must be on 4K boundaries. What we do is allocate the 530 * page directory on the first 16K boundary that we encounter, and 531 * the page tables on 4K boundaries otherwise. Since we allocate 532 * at least 3 L2 page tables, we are guaranteed to encounter at 533 * least one 16K aligned region. 534 */ 535 536 #ifdef VERBOSE_INIT_ARM 537 printf("Allocating page tables\n"); 538 #endif 539 540 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 541 542 #ifdef VERBOSE_INIT_ARM 543 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 544 physical_freestart, free_pages, free_pages); 545 #endif 546 547 /* Define a macro to simplify memory allocation */ 548 #define valloc_pages(var, np) \ 549 alloc_pages((var).pv_pa, (np)); \ 550 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 551 552 #define alloc_pages(var, np) \ 553 physical_freeend -= ((np) * PAGE_SIZE); \ 554 if (physical_freeend < physical_freestart) \ 555 panic("initarm: out of memory"); \ 556 (var) = physical_freeend; \ 557 free_pages -= (np); \ 558 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 559 560 loop1 = 0; 561 kernel_l1pt.pv_pa = 0; 562 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 563 /* Are we 16KB aligned for an L1 ? */ 564 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 565 && kernel_l1pt.pv_pa == 0) { 566 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 567 } else { 568 valloc_pages(kernel_pt_table[loop1], 569 L2_TABLE_SIZE / PAGE_SIZE); 570 ++loop1; 571 } 572 } 573 574 /* This should never be able to happen but better confirm that. */ 575 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0) 576 panic("initarm: Failed to align the kernel page directory\n"); 577 578 /* 579 * Allocate a page for the system page mapped to V0x00000000 580 * This page will just contain the system vectors and can be 581 * shared by all processes. 582 */ 583 alloc_pages(systempage.pv_pa, 1); 584 585 /* Allocate stacks for all modes */ 586 valloc_pages(irqstack, IRQ_STACK_SIZE); 587 valloc_pages(abtstack, ABT_STACK_SIZE); 588 valloc_pages(undstack, UND_STACK_SIZE); 589 valloc_pages(kernelstack, UPAGES); 590 591 #ifdef VERBOSE_INIT_ARM 592 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 593 irqstack.pv_va); 594 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 595 abtstack.pv_va); 596 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 597 undstack.pv_va); 598 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 599 kernelstack.pv_va); 600 #endif 601 602 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 603 604 LEDSTEP(); 605 606 /* 607 * Ok we have allocated physical pages for the primary kernel 608 * page tables 609 */ 610 611 #ifdef VERBOSE_INIT_ARM 612 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 613 #endif 614 615 /* 616 * Now we start construction of the L1 page table 617 * We start by mapping the L2 page tables into the L1. 618 * This means that we can replace L1 mappings later on if necessary 619 */ 620 l1pagetable = kernel_l1pt.pv_pa; 621 622 /* Map the L2 pages tables in the L1 page table */ 623 pmap_link_l2pt(l1pagetable, 0x00000000, 624 &kernel_pt_table[KERNEL_PT_SYS]); 625 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 626 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 627 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 628 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 629 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 630 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 631 632 /* update the top of the kernel VM */ 633 pmap_curmaxkvaddr = 634 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 635 636 #ifdef VERBOSE_INIT_ARM 637 printf("Mapping kernel\n"); 638 #endif 639 640 /* Now we fill in the L2 pagetable for the kernel static code/data */ 641 { 642 size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE; 643 size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE; 644 u_int logical; 645 646 textsize = (textsize + PGOFSET) & ~PGOFSET; 647 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 648 649 logical = 0x00200000; /* offset of kernel in RAM */ 650 651 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 652 physical_start + logical, textsize, 653 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 654 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 655 physical_start + logical, totalsize - textsize, 656 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 657 } 658 659 #ifdef VERBOSE_INIT_ARM 660 printf("Constructing L2 page tables\n"); 661 #endif 662 663 /* Map the stack pages */ 664 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 665 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 666 PTE_CACHE); 667 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 668 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 669 PTE_CACHE); 670 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 671 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 672 PTE_CACHE); 673 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 674 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 675 676 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 677 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 678 679 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 680 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 681 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 682 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 683 } 684 685 /* Map the vector page. */ 686 #if 1 687 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 688 * cache-clean code there. */ 689 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 690 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 691 #else 692 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 693 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 694 #endif 695 696 #ifdef MEMORY_DISK_DYNAMIC 697 /* map MD root image */ 698 bootstrap_bs_map(&bootstrap_bs_tag, md_root_start, MD_ROOT_SIZE, 699 BUS_SPACE_MAP_CACHEABLE | BUS_SPACE_MAP_LINEAR, 700 (bus_space_handle_t *)&md_root_start); 701 702 md_root_setconf((void *)md_root_start, MD_ROOT_SIZE); 703 #endif /* MEMORY_DISK_DYNAMIC */ 704 /* 705 * map integrated peripherals at same address in l1pagetable 706 * so that we can continue to use console. 707 */ 708 copy_io_area_map((pd_entry_t *)l1pagetable); 709 710 /* 711 * Now we have the real page tables in place so we can switch to them. 712 * Once this is done we will be running with the REAL kernel page 713 * tables. 714 */ 715 716 /* 717 * Update the physical_freestart/physical_freeend/free_pages 718 * variables. 719 */ 720 { 721 physical_freestart = physical_start + 722 (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE); 723 physical_freeend = physical_end; 724 free_pages = 725 (physical_freeend - physical_freestart) / PAGE_SIZE; 726 } 727 728 /* Switch tables */ 729 #ifdef VERBOSE_INIT_ARM 730 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 731 physical_freestart, free_pages, free_pages); 732 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 733 #endif 734 LEDSTEP(); 735 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 736 setttb(kernel_l1pt.pv_pa); 737 cpu_tlb_flushID(); 738 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 739 740 /* 741 * Moved from cpu_startup() as data_abort_handler() references 742 * this during uvm init 743 */ 744 proc0paddr = (struct user *)kernelstack.pv_va; 745 lwp0.l_addr = proc0paddr; 746 747 #ifdef VERBOSE_INIT_ARM 748 printf("done!\n"); 749 #endif 750 751 #if 0 752 /* 753 * The IFPGA registers have just moved. 754 * Detach the diagnostic serial port and reattach at the new address. 755 */ 756 plcomcndetach(); 757 /* 758 * XXX this should only be done in main() but it useful to 759 * have output earlier ... 760 */ 761 consinit(); 762 #endif 763 764 LEDSTEP(); 765 #ifdef VERBOSE_INIT_ARM 766 printf("bootstrap done.\n"); 767 #endif 768 769 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 770 771 /* 772 * Pages were allocated during the secondary bootstrap for the 773 * stacks for different CPU modes. 774 * We must now set the r13 registers in the different CPU modes to 775 * point to these stacks. 776 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 777 * of the stack memory. 778 */ 779 #ifdef VERBOSE_INIT_ARM 780 printf("init subsystems: stacks "); 781 #endif 782 783 set_stackptr(PSR_IRQ32_MODE, 784 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 785 set_stackptr(PSR_ABT32_MODE, 786 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 787 set_stackptr(PSR_UND32_MODE, 788 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 789 790 LEDSTEP(); 791 792 /* 793 * Well we should set a data abort handler. 794 * Once things get going this will change as we will need a proper 795 * handler. 796 * Until then we will use a handler that just panics but tells us 797 * why. 798 * Initialisation of the vectors will just panic on a data abort. 799 * This just fills in a slightly better one. 800 */ 801 #ifdef VERBOSE_INIT_ARM 802 printf("vectors "); 803 #endif 804 data_abort_handler_address = (u_int)data_abort_handler; 805 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 806 undefined_handler_address = (u_int)undefinedinstruction_bounce; 807 808 /* Initialise the undefined instruction handlers */ 809 #ifdef VERBOSE_INIT_ARM 810 printf("undefined "); 811 #endif 812 undefined_init(); 813 814 LEDSTEP(); 815 816 /* Load memory into UVM. */ 817 #ifdef VERBOSE_INIT_ARM 818 printf("page "); 819 #endif 820 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 821 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 822 atop(physical_freestart), atop(physical_freeend), 823 VM_FREELIST_DEFAULT); 824 825 LEDSTEP(); 826 /* Boot strap pmap telling it where the kernel page table is */ 827 #ifdef VERBOSE_INIT_ARM 828 printf("pmap "); 829 #endif 830 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE, 831 KERNEL_VM_BASE + KERNEL_VM_SIZE); 832 833 LEDSTEP(); 834 835 /* Setup the IRQ system */ 836 #ifdef VERBOSE_INIT_ARM 837 printf("irq "); 838 #endif 839 /* XXX irq_init(); */ 840 841 #ifdef VERBOSE_INIT_ARM 842 printf("done.\n"); 843 #endif 844 845 #ifdef BOOTHOWTO_INIT 846 boothowto |= BOOTHOWTO_INIT; 847 #endif 848 { 849 uint8_t gpio = ~gpio_read8(GPIO_PDATF); 850 851 if (gpio & (1<<5)) /* SW3 */ 852 boothowto ^= RB_SINGLE; 853 if (gpio & (1<<7)) /* SW7 */ 854 boothowto ^= RB_KDB; 855 #ifdef VERBOSE_INIT_ARM 856 printf( "sw: %x boothowto: %x\n", gpio, boothowto ); 857 #endif 858 } 859 860 #ifdef IPKDB 861 /* Initialise ipkdb */ 862 ipkdb_init(); 863 if (boothowto & RB_KDB) 864 ipkdb_connect(0); 865 #endif 866 867 #ifdef KGDB 868 if (boothowto & RB_KDB) { 869 kgdb_debug_init = 1; 870 kgdb_connect(1); 871 } 872 #endif 873 874 #if NKSYMS || defined(DDB) || defined(LKM) 875 /* Firmware doesn't load symbols. */ 876 ksyms_init(0, NULL, NULL); 877 #endif 878 879 #ifdef DDB 880 db_machine_init(); 881 if (boothowto & RB_KDB) 882 Debugger(); 883 #endif 884 885 /* We return the new stack pointer address */ 886 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP); 887 } 888 889 void 890 consinit(void) 891 { 892 static int consinit_done = 0; 893 bus_space_tag_t iot = s3c2xx0_softc->sc_iot; 894 int pclk = s3c2xx0_softc->sc_pclk; 895 896 if (consinit_done != 0) 897 return; 898 899 consinit_done = 1; 900 901 #if NSSCOM > 0 902 #ifdef SSCOM0CONSOLE 903 if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed, 904 pclk, comcnmode)) 905 return; 906 #endif 907 #ifdef SSCOM1CONSOLE 908 if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed, 909 pclk, comcnmode)) 910 return; 911 #endif 912 #endif /* NSSCOM */ 913 #if NCOM>0 && defined(CONCOMADDR) 914 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed, 915 COM_FREQ, COM_TYPE_NORMAL, comcnmode)) 916 panic("can't init serial console @%x", CONCOMADDR); 917 return; 918 #endif 919 920 consinit_done = 0; 921 } 922 923 924 #ifdef KGDB 925 926 #if (NSSCOM > 0) 927 928 #ifdef KGDB_DEVNAME 929 const char kgdb_devname[] = KGDB_DEVNAME; 930 #else 931 const char kgdb_devname[] = ""; 932 #endif 933 934 #ifndef KGDB_DEVMODE 935 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */ 936 #endif 937 int kgdb_sscom_mode = KGDB_DEVMODE; 938 939 #endif /* NSSCOM */ 940 941 void 942 kgdb_port_init(void) 943 { 944 #if (NSSCOM > 0) 945 int unit = -1; 946 int pclk = s3c2xx0_softc->sc_pclk; 947 948 if (strcmp(kgdb_devname, "sscom0") == 0) 949 unit = 0; 950 else if (strcmp(kgdb_devname, "sscom1") == 0) 951 unit = 1; 952 953 if (unit >= 0) { 954 s3c2800_sscom_kgdb_attach(s3c2xx0_softc->sc_iot, 955 unit, kgdb_rate, pclk, kgdb_sscom_mode); 956 } 957 #endif 958 } 959 #endif 960 961 static __inline 962 pd_entry_t * 963 read_ttb(void) 964 { 965 long ttb; 966 967 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb)); 968 969 970 return (pd_entry_t *)(ttb & ~((1 << 14) - 1)); 971 } 972 973 974 static __inline void 975 writeback_dcache_line(vaddr_t va) 976 { 977 /* writeback Dcache line */ 978 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9 979 * assume write-through cache, and always flush Dcache instead of 980 * cleaning it. Since Boot loader maps page table with write-back 981 * cached, we really need to clean Dcache. */ 982 asm("mcr p15, 0, %0, c7, c10, 1" 983 : : "r"(va)); 984 } 985 986 static __inline void 987 clean_dcache_line(vaddr_t va) 988 { 989 /* writeback and invalidate Dcache line */ 990 asm("mcr p15, 0, %0, c7, c14, 1" 991 : : "r"(va)); 992 } 993 994 static vaddr_t section_free = SMDK2800_VBASE_FREE; 995 996 static void 997 map_builtin_peripherals(void) 998 { 999 pd_entry_t *pagedir = read_ttb(); 1000 int i, sec; 1001 1002 for (i=0; i < 2; ++i) { 1003 1004 pmap_map_section((vaddr_t)pagedir, 1005 SMDK2800_IO_AREA_VBASE + (i <<L1_S_SHIFT), 1006 S3C2800_PERIPHERALS + (i << L1_S_SHIFT), 1007 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 1008 1009 sec = (SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT) + i; 1010 writeback_dcache_line((vaddr_t)&pagedir[sec]); 1011 } 1012 1013 cpu_drain_writebuf(); 1014 cpu_tlb_flushD(); 1015 } 1016 1017 /* 1018 * simple memory mapping function used in early bootstrap stage 1019 * before pmap is initialized. 1020 * This assumes only peripheral registers to map. they are mapped to 1021 * fixed address with section mapping. 1022 */ 1023 static int 1024 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 1025 int flag, bus_space_handle_t * bshp) 1026 { 1027 long offset; 1028 int modified = 0; 1029 pd_entry_t *pagedir = read_ttb(); 1030 /* This assumes PA==VA for page directory */ 1031 1032 if (S3C2800_PERIPHERALS <= bpa && bpa < S3C2800_PERIPHERALS + 0x200000) { 1033 offset = bpa - S3C2800_PERIPHERALS; 1034 if (offset < 0 || 2 * L1_S_SIZE < offset) 1035 panic("bootstrap_bs_map: can't map"); 1036 *bshp = (bus_space_handle_t)(SMDK2800_IO_AREA_VBASE + offset); 1037 } else { 1038 vaddr_t va; 1039 bus_addr_t pa; 1040 int cacheable = flag & BUS_SPACE_MAP_CACHEABLE; 1041 1042 1043 size = (size + L1_S_OFFSET) & ~L1_S_OFFSET; 1044 pa = bpa & ~L1_S_OFFSET; 1045 offset = bpa - pa; 1046 1047 va = section_free; 1048 while (size) { 1049 pmap_map_section((vaddr_t)pagedir, va, 1050 pa, VM_PROT_READ | VM_PROT_WRITE, 1051 cacheable ? PTE_CACHE : PTE_NOCACHE); 1052 writeback_dcache_line((vaddr_t)& pagedir[va >> L1_S_SHIFT]); 1053 va += L1_S_SIZE; 1054 pa += L1_S_SIZE; 1055 size -= L1_S_SIZE; 1056 } 1057 1058 *bshp = (bus_space_handle_t)(section_free + offset); 1059 section_free = va; 1060 } 1061 1062 1063 if (modified) { 1064 1065 cpu_drain_writebuf(); 1066 cpu_tlb_flushD(); 1067 } 1068 return (0); 1069 } 1070 1071 static void 1072 copy_io_area_map(pd_entry_t * new_pd) 1073 { 1074 pd_entry_t *cur_pd = read_ttb(); 1075 int sec; 1076 1077 for (sec = SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT; 1078 sec < (section_free >> L1_S_SHIFT); ++sec) { 1079 new_pd[sec] = cur_pd[sec]; 1080 } 1081 } 1082
Indexes created Wed Oct 01 07:09:59 GMT 2025