smdk2800_machdep.c revision 1.3
1 /* $NetBSD: smdk2800_machdep.c,v 1.3 2003/04/26 11:05:11 ragge Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Fujitsu Component Limited 5 * Copyright (c) 2002 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 /* 36 * Machine dependant functions for kernel setup for Samsung SMDK2800 37 * derived from integrator_machdep.c 38 */ 39 40 /* 41 * Copyright (c) 2001,2002 ARM Ltd 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. The name of the company may not be used to endorse or promote 53 * products derived from this software without specific prior written 54 * permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 58 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 59 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD 60 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 61 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 62 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 63 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 64 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 65 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 66 * POSSIBILITY OF SUCH DAMAGE. 67 * 68 */ 69 70 /* 71 * Copyright (c) 1997,1998 Mark Brinicombe. 72 * Copyright (c) 1997,1998 Causality Limited. 73 * All rights reserved. 74 * 75 * Redistribution and use in source and binary forms, with or without 76 * modification, are permitted provided that the following conditions 77 * are met: 78 * 1. Redistributions of source code must retain the above copyright 79 * notice, this list of conditions and the following disclaimer. 80 * 2. Redistributions in binary form must reproduce the above copyright 81 * notice, this list of conditions and the following disclaimer in the 82 * documentation and/or other materials provided with the distribution. 83 * 3. All advertising materials mentioning features or use of this software 84 * must display the following acknowledgement: 85 * This product includes software developed by Mark Brinicombe 86 * for the NetBSD Project. 87 * 4. The name of the company nor the name of the author may be used to 88 * endorse or promote products derived from this software without specific 89 * prior written permission. 90 * 91 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 92 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 93 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 94 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 95 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 96 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 97 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 98 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 99 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 100 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 101 * SUCH DAMAGE. 102 * 103 * Machine dependant functions for kernel setup for integrator board 104 * 105 * Created : 24/11/97 106 */ 107 108 #include "opt_ddb.h" 109 #include "opt_kgdb.h" 110 #include "opt_ipkdb.h" 111 #include "opt_pmap_debug.h" 112 #include "opt_md.h" 113 #include "pci.h" 114 115 #include <sys/param.h> 116 #include <sys/device.h> 117 #include <sys/systm.h> 118 #include <sys/kernel.h> 119 #include <sys/exec.h> 120 #include <sys/proc.h> 121 #include <sys/msgbuf.h> 122 #include <sys/reboot.h> 123 #include <sys/termios.h> 124 #include <sys/ksyms.h> 125 126 #include <uvm/uvm_extern.h> 127 128 #include <dev/cons.h> 129 #include <dev/md.h> 130 131 #include <machine/db_machdep.h> 132 #include <ddb/db_sym.h> 133 #include <ddb/db_extern.h> 134 #ifdef KGDB 135 #include <sys/kgdb.h> 136 #endif 137 138 #include <machine/bootconfig.h> 139 #include <machine/bus.h> 140 #include <machine/cpu.h> 141 #include <machine/frame.h> 142 #include <machine/intr.h> 143 #include <arm/undefined.h> 144 145 #include <arm/arm32/machdep.h> 146 147 #include <arm/s3c2xx0/s3c2800reg.h> 148 #include <arm/s3c2xx0/s3c2800var.h> 149 150 #include "ksyms.h" 151 152 #ifndef SDRAM_START 153 #define SDRAM_START S3C2800_DBANK0_START 154 #endif 155 #ifndef SDRAM_SIZE 156 #define SDRAM_SIZE (32*1024*1024) 157 #endif 158 159 /* 160 * Address to map I/O registers in early initialize stage. 161 */ 162 #define SMDK2800_IO_AREA_VBASE 0xfd000000 163 #define SMDK2800_VBASE_FREE 0xfd200000 164 165 /* 166 * Address to call from cpu_reset() to reset the machine. 167 * This is machine architecture dependant as it varies depending 168 * on where the ROM appears when you turn the MMU off. 169 */ 170 u_int cpu_reset_address = (u_int)0; 171 172 /* Define various stack sizes in pages */ 173 #define IRQ_STACK_SIZE 1 174 #define ABT_STACK_SIZE 1 175 #ifdef IPKDB 176 #define UND_STACK_SIZE 2 177 #else 178 #define UND_STACK_SIZE 1 179 #endif 180 181 BootConfig bootconfig; /* Boot config storage */ 182 char *boot_args = NULL; 183 char *boot_file = NULL; 184 185 vm_offset_t physical_start; 186 vm_offset_t physical_freestart; 187 vm_offset_t physical_freeend; 188 vm_offset_t physical_end; 189 u_int free_pages; 190 vm_offset_t pagetables_start; 191 int physmem = 0; 192 193 /*int debug_flags;*/ 194 #ifndef PMAP_STATIC_L1S 195 int max_processes = 64; /* Default number */ 196 #endif /* !PMAP_STATIC_L1S */ 197 198 /* Physical and virtual addresses for some global pages */ 199 pv_addr_t systempage; 200 pv_addr_t irqstack; 201 pv_addr_t undstack; 202 pv_addr_t abtstack; 203 pv_addr_t kernelstack; 204 205 vm_offset_t msgbufphys; 206 207 extern u_int data_abort_handler_address; 208 extern u_int prefetch_abort_handler_address; 209 extern u_int undefined_handler_address; 210 211 #ifdef PMAP_DEBUG 212 extern int pmap_debug_level; 213 #endif 214 215 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */ 216 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */ 217 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */ 218 219 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 220 221 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 222 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 223 224 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 225 226 struct user *proc0paddr; 227 228 #ifdef MEMORY_DISK_DYNAMIC 229 #define MD_ROOT_SIZE 4 /* in megabytes */ 230 #define MD_ROOT_START 0x400000/* MD root image in ROM */ 231 #endif 232 233 234 /* Prototypes */ 235 236 void consinit(void); 237 void kgdb_port_init(void); 238 239 static int 240 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 241 int cacheable, bus_space_handle_t * bshp); 242 static void copy_io_area_map(pd_entry_t * new_pd); 243 244 /* A load of console goo. */ 245 #include "vga.h" 246 #if NVGA > 0 247 #include <dev/ic/mc6845reg.h> 248 #include <dev/ic/pcdisplayvar.h> 249 #include <dev/ic/vgareg.h> 250 #include <dev/ic/vgavar.h> 251 #endif 252 253 #include "com.h" 254 #if NCOM > 0 255 #include <dev/ic/comreg.h> 256 #include <dev/ic/comvar.h> 257 #endif 258 259 #include "sscom.h" 260 #if NSSCOM > 0 261 #include "opt_sscom.h" 262 #include <arm/s3c2xx0/sscom_var.h> 263 #endif 264 265 /* 266 * Define the default console speed for the board. This is generally 267 * what the firmware provided with the board defaults to. 268 */ 269 #ifndef CONSPEED 270 #define CONSPEED B115200 /* TTYDEF_SPEED */ 271 #endif 272 #ifndef CONMODE 273 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 274 #endif 275 276 int comcnspeed = CONSPEED; 277 int comcnmode = CONMODE; 278 279 struct bus_space bootstrap_bs_tag; 280 281 /* 282 * void cpu_reboot(int howto, char *bootstr) 283 * 284 * Reboots the system 285 * 286 * Deal with any syncing, unmounting, dumping and shutdown hooks, 287 * then reset the CPU. 288 */ 289 void 290 cpu_reboot(int howto, char *bootstr) 291 { 292 #ifdef DIAGNOSTIC 293 /* info */ 294 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 295 #endif 296 297 cpu_reset_address = (u_int)s3c2800_softreset; 298 299 /* 300 * If we are still cold then hit the air brakes 301 * and crash to earth fast 302 */ 303 if (cold) { 304 doshutdownhooks(); 305 printf("The operating system has halted.\n"); 306 printf("Please press any key to reboot.\n\n"); 307 cngetc(); 308 printf("rebooting...\n"); 309 cpu_reset(); 310 /* NOTREACHED */ 311 } 312 /* Disable console buffering */ 313 314 /* 315 * If RB_NOSYNC was not specified sync the discs. 316 * Note: Unless cold is set to 1 here, syslogd will die during the 317 * unmount. It looks like syslogd is getting woken up only to find 318 * that it cannot page part of the binary in as the filesystem has 319 * been unmounted. 320 */ 321 if (!(howto & RB_NOSYNC)) 322 bootsync(); 323 324 /* Say NO to interrupts */ 325 splhigh(); 326 327 /* Do a dump if requested. */ 328 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 329 dumpsys(); 330 331 /* Run any shutdown hooks */ 332 doshutdownhooks(); 333 334 /* Make sure IRQ's are disabled */ 335 IRQdisable; 336 337 if (howto & RB_HALT) { 338 printf("The operating system has halted.\n"); 339 printf("Please press any key to reboot.\n\n"); 340 cngetc(); 341 } 342 printf("rebooting...\n"); 343 cpu_reset(); 344 /* NOTREACHED */ 345 } 346 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v)) 347 348 /* 349 * u_int initarm(...) 350 * 351 * Initial entry point on startup. This gets called before main() is 352 * entered. 353 * It should be responsible for setting up everything that must be 354 * in place when main is called. 355 * This includes 356 * Taking a copy of the boot configuration structure. 357 * Initialising the physical console so characters can be printed. 358 * Setting up page tables for the kernel 359 * Relocating the kernel to the bottom of physical memory 360 */ 361 362 u_int 363 initarm(void *arg) 364 { 365 int loop; 366 int loop1; 367 u_int l1pagetable; 368 extern int etext asm("_etext"); 369 extern int end asm("_end"); 370 pv_addr_t kernel_l1pt; 371 pv_addr_t kernel_ptpt; 372 struct s3c2xx0_softc temp_softc; /* used to initialize IO regs */ 373 int progress_counter = 0; 374 #ifdef MEMORY_DISK_DYNAMIC 375 void *md_root_start, *md_root_rom; 376 #endif 377 378 #define LEDSTEP() __LED(progress_counter++) 379 380 #define pdatc (*(volatile uint8_t *)(S3C2800_GPIO_BASE+GPIO_PDATC)) 381 #define __LED(x) (pdatc = (pdatc & ~0x07) | (~(x) & 0x07)) 382 383 LEDSTEP(); 384 /* 385 * Heads up ... Setup the CPU / MMU / TLB functions 386 */ 387 if (set_cpufuncs()) 388 panic("cpu not recognized!"); 389 390 LEDSTEP(); 391 /* 392 * prepare fake bus space tag 393 */ 394 bootstrap_bs_tag = s3c2xx0_bs_tag; 395 bootstrap_bs_tag.bs_map = bootstrap_bs_map; 396 temp_softc.sc_iot = &bootstrap_bs_tag; 397 s3c2xx0_softc = &temp_softc; 398 399 400 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_GPIO_BASE, 401 S3C2800_GPIO_SIZE, 0, &temp_softc.sc_gpio_ioh); 402 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_INTCTL_BASE, 403 S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_intctl_ioh); 404 405 #undef __LED 406 #define __LED(x) bus_space_write_1( &bootstrap_bs_tag, temp_softc.sc_gpio_ioh, \ 407 GPIO_PDATC, (~(x) & 0x07) | \ 408 (bus_space_read_1( &bootstrap_bs_tag, \ 409 temp_softc.sc_gpio_ioh, GPIO_PDATC ) & ~0x07) ) 410 411 LEDSTEP(); 412 413 /* Disable all peripheral interrupts */ 414 bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_intctl_ioh, 415 INTCTL_INTMSK, 0); 416 417 consinit(); 418 printf("consinit done\n"); 419 420 #ifdef KGDB 421 LEDSTEP(); 422 kgdb_port_init(); 423 #endif 424 LEDSTEP(); 425 426 /* Talk to the user */ 427 printf("\nNetBSD/evbarm (SMDK2800) booting ...\n"); 428 429 /* 430 * Ok we have the following memory map 431 * 432 * Physical Address Range Description 433 * ----------------------- ---------------------------------- 434 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB) 435 * 0x02000000 - 0x020fffff AMD flash Memory (1MB) 436 * or (depend on DIPSW setting) 437 * 0x00000000 - 0x000fffff AMD flash Memory (1MB) 438 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB) 439 * 440 * 0x08000000 - 0x09ffffff SDRAM (32MB) 441 * 0x20000000 - 0x3fffffff PCI space 442 * 443 * The initarm() has the responsibility for creating the kernel 444 * page tables. 445 * It must also set up various memory pointers that are used 446 * by pmap etc. 447 */ 448 449 /* Fake bootconfig structure for the benefit of pmap.c */ 450 /* XXX must make the memory description h/w independent */ 451 bootconfig.dramblocks = 1; 452 bootconfig.dram[0].address = SDRAM_START; 453 bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE; 454 455 /* 456 * Set up the variables that define the availablilty of 457 * physical memory. For now, we're going to set 458 * physical_freestart to 0x08200000 (where the kernel 459 * was loaded), and allocate the memory we need downwards. 460 * If we get too close to the bottom of SDRAM, we 461 * will panic. We will update physical_freestart and 462 * physical_freeend later to reflect what pmap_bootstrap() 463 * wants to see. 464 * 465 * XXX pmap_bootstrap() needs an enema. 466 */ 467 physical_start = bootconfig.dram[0].address; 468 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 469 #ifdef MEMORY_DISK_DYNAMIC 470 /* Reserve for ram disk */ 471 printf("Reserve %d bytes for memory disk\n", MD_ROOT_SIZE * L1_S_SIZE); 472 physical_end -= MD_ROOT_SIZE * L1_S_SIZE; 473 #endif 474 475 physical_freestart = 0x08000000UL; /* XXX */ 476 physical_freeend = 0x08200000UL; 477 478 physmem = (physical_end - physical_start) / PAGE_SIZE; 479 480 /* Tell the user about the memory */ 481 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 482 physical_start, physical_end - 1); 483 484 /* 485 * XXX 486 * Okay, the kernel starts 2MB in from the bottom of physical 487 * memory. We are going to allocate our bootstrap pages downwards 488 * from there. 489 * 490 * We need to allocate some fixed page tables to get the kernel 491 * going. We allocate one page directory and a number of page 492 * tables and store the physical addresses in the kernel_pt_table 493 * array. 494 * 495 * The kernel page directory must be on a 16K boundary. The page 496 * tables must be on 4K bounaries. What we do is allocate the 497 * page directory on the first 16K boundary that we encounter, and 498 * the page tables on 4K boundaries otherwise. Since we allocate 499 * at least 3 L2 page tables, we are guaranteed to encounter at 500 * least one 16K aligned region. 501 */ 502 503 #ifdef VERBOSE_INIT_ARM 504 printf("Allocating page tables\n"); 505 #endif 506 507 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 508 509 #ifdef VERBOSE_INIT_ARM 510 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 511 physical_freestart, free_pages, free_pages); 512 #endif 513 514 /* Define a macro to simplify memory allocation */ 515 #define valloc_pages(var, np) \ 516 alloc_pages((var).pv_pa, (np)); \ 517 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 518 519 #define alloc_pages(var, np) \ 520 physical_freeend -= ((np) * PAGE_SIZE); \ 521 if (physical_freeend < physical_freestart) \ 522 panic("initarm: out of memory"); \ 523 (var) = physical_freeend; \ 524 free_pages -= (np); \ 525 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 526 527 loop1 = 0; 528 kernel_l1pt.pv_pa = 0; 529 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 530 /* Are we 16KB aligned for an L1 ? */ 531 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 532 && kernel_l1pt.pv_pa == 0) { 533 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 534 } else { 535 alloc_pages(kernel_pt_table[loop1].pv_pa, 536 L2_TABLE_SIZE / PAGE_SIZE); 537 kernel_pt_table[loop1].pv_va = 538 kernel_pt_table[loop1].pv_pa; 539 ++loop1; 540 } 541 } 542 543 /* This should never be able to happen but better confirm that. */ 544 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0) 545 panic("initarm: Failed to align the kernel page directory\n"); 546 547 /* 548 * Allocate a page for the system page mapped to V0x00000000 549 * This page will just contain the system vectors and can be 550 * shared by all processes. 551 */ 552 alloc_pages(systempage.pv_pa, 1); 553 554 /* Allocate a page for the page table to map kernel page tables. */ 555 valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE); 556 557 /* Allocate stacks for all modes */ 558 valloc_pages(irqstack, IRQ_STACK_SIZE); 559 valloc_pages(abtstack, ABT_STACK_SIZE); 560 valloc_pages(undstack, UND_STACK_SIZE); 561 valloc_pages(kernelstack, UPAGES); 562 563 #ifdef VERBOSE_INIT_ARM 564 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 565 irqstack.pv_va); 566 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 567 abtstack.pv_va); 568 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 569 undstack.pv_va); 570 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 571 kernelstack.pv_va); 572 #endif 573 574 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 575 576 LEDSTEP(); 577 578 /* 579 * Ok we have allocated physical pages for the primary kernel 580 * page tables 581 */ 582 583 #ifdef VERBOSE_INIT_ARM 584 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 585 #endif 586 587 /* 588 * Now we start construction of the L1 page table 589 * We start by mapping the L2 page tables into the L1. 590 * This means that we can replace L1 mappings later on if necessary 591 */ 592 l1pagetable = kernel_l1pt.pv_pa; 593 594 /* Map the L2 pages tables in the L1 page table */ 595 pmap_link_l2pt(l1pagetable, 0x00000000, 596 &kernel_pt_table[KERNEL_PT_SYS]); 597 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 598 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 599 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 600 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 601 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 602 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 603 pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt); 604 605 /* update the top of the kernel VM */ 606 pmap_curmaxkvaddr = 607 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 608 609 #ifdef VERBOSE_INIT_ARM 610 printf("Mapping kernel\n"); 611 #endif 612 613 /* Now we fill in the L2 pagetable for the kernel static code/data */ 614 { 615 size_t textsize = (uintptr_t) & etext - KERNEL_TEXT_BASE; 616 size_t totalsize = (uintptr_t) & end - KERNEL_TEXT_BASE; 617 u_int logical; 618 619 textsize = (textsize + PGOFSET) & ~PGOFSET; 620 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 621 622 logical = 0x00200000; /* offset of kernel in RAM */ 623 624 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 625 physical_start + logical, textsize, 626 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 627 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 628 physical_start + logical, totalsize - textsize, 629 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 630 } 631 632 #ifdef VERBOSE_INIT_ARM 633 printf("Constructing L2 page tables\n"); 634 #endif 635 636 /* Map the stack pages */ 637 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 638 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 639 PTE_CACHE); 640 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 641 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 642 PTE_CACHE); 643 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 644 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 645 PTE_CACHE); 646 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 647 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 648 649 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 650 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 651 652 /* Map the page table that maps the kernel pages */ 653 pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa, 654 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 655 656 /* 657 * Map entries in the page table used to map PTE's 658 * Basically every kernel page table gets mapped here 659 */ 660 /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */ 661 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) { 662 pmap_map_entry(l1pagetable, 663 PTE_BASE + ((KERNEL_BASE + 664 (loop * 0x00400000)) >> (PGSHIFT - 2)), 665 kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa, 666 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 667 } 668 pmap_map_entry(l1pagetable, 669 PTE_BASE + (PTE_BASE >> (PGSHIFT - 2)), 670 kernel_ptpt.pv_pa, VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 671 pmap_map_entry(l1pagetable, 672 PTE_BASE + (0x00000000 >> (PGSHIFT - 2)), 673 kernel_pt_table[KERNEL_PT_SYS].pv_pa, 674 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 675 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 676 pmap_map_entry(l1pagetable, 677 PTE_BASE + ((KERNEL_VM_BASE + 678 (loop * 0x00400000)) >> (PGSHIFT - 2)), 679 kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa, 680 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 681 682 /* Map the vector page. */ 683 #if 1 684 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 685 * cache-clean code there. */ 686 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 687 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 688 #else 689 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 690 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 691 #endif 692 693 #if 0 694 /* Map the core memory needed before autoconfig */ 695 loop = 0; 696 while (l1_sec_table[loop].size) { 697 vm_size_t sz; 698 699 #ifdef VERBOSE_INIT_ARM 700 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa, 701 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1, 702 l1_sec_table[loop].va); 703 #endif 704 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE) 705 pmap_map_section(l1pagetable, 706 l1_sec_table[loop].va + sz, 707 l1_sec_table[loop].pa + sz, 708 l1_sec_table[loop].prot, 709 l1_sec_table[loop].cache); 710 ++loop; 711 } 712 #endif 713 714 #ifdef MEMORY_DISK_DYNAMIC 715 /* Map ram for MD root This will overwrite old page table */ 716 bootstrap_bs_map(&bootstrap_bs_tag, physical_end, 717 MD_ROOT_SIZE * L1_S_SIZE, 0, (bus_space_handle_t *) & md_root_start); 718 /* map MD root image on ROM */ 719 bootstrap_bs_map(&bootstrap_bs_tag, MD_ROOT_START, 720 MD_ROOT_SIZE * L1_S_SIZE, 0, (bus_space_handle_t *) & md_root_rom); 721 722 #endif 723 /* 724 * map integrated peripherals at same address in l1pagetable 725 * so that we can continue to use console. 726 */ 727 copy_io_area_map((pd_entry_t *)l1pagetable); 728 729 /* 730 * Now we have the real page tables in place so we can switch to them. 731 * Once this is done we will be running with the REAL kernel page 732 * tables. 733 */ 734 735 /* 736 * Update the physical_freestart/physical_freeend/free_pages 737 * variables. 738 */ 739 { 740 physical_freestart = physical_start + 741 (((((uintptr_t) & end) + PGOFSET) & ~PGOFSET) - 742 KERNEL_BASE); 743 physical_freeend = physical_end; 744 free_pages = 745 (physical_freeend - physical_freestart) / PAGE_SIZE; 746 } 747 748 /* Switch tables */ 749 #ifdef VERBOSE_INIT_ARM 750 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 751 physical_freestart, free_pages, free_pages); 752 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 753 #endif 754 LEDSTEP(); 755 setttb(kernel_l1pt.pv_pa); 756 cpu_tlb_flushID(); 757 758 #ifdef VERBOSE_INIT_ARM 759 printf("done!\n"); 760 #endif 761 762 #ifdef MEMORY_DISK_DYNAMIC 763 memcpy(md_root_start, md_root_rom, MD_ROOT_SIZE * L1_S_SIZE); 764 md_root_setconf(md_root_start, MD_ROOT_SIZE * L1_S_SIZE); 765 #endif 766 767 #if 0 768 /* 769 * The IFPGA registers have just moved. 770 * Detach the diagnostic serial port and reattach at the new address. 771 */ 772 plcomcndetach(); 773 /* 774 * XXX this should only be done in main() but it useful to 775 * have output earlier ... 776 */ 777 consinit(); 778 #endif 779 780 LEDSTEP(); 781 #ifdef VERBOSE_INIT_ARM 782 printf("bootstrap done.\n"); 783 #endif 784 785 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 786 787 /* 788 * Pages were allocated during the secondary bootstrap for the 789 * stacks for different CPU modes. 790 * We must now set the r13 registers in the different CPU modes to 791 * point to these stacks. 792 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 793 * of the stack memory. 794 */ 795 printf("init subsystems: stacks "); 796 797 set_stackptr(PSR_IRQ32_MODE, 798 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 799 set_stackptr(PSR_ABT32_MODE, 800 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 801 set_stackptr(PSR_UND32_MODE, 802 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 803 804 LEDSTEP(); 805 806 /* 807 * Well we should set a data abort handler. 808 * Once things get going this will change as we will need a proper 809 * handler. 810 * Until then we will use a handler that just panics but tells us 811 * why. 812 * Initialisation of the vectors will just panic on a data abort. 813 * This just fills in a slighly better one. 814 */ 815 printf("vectors "); 816 data_abort_handler_address = (u_int)data_abort_handler; 817 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 818 undefined_handler_address = (u_int)undefinedinstruction_bounce; 819 820 /* Initialise the undefined instruction handlers */ 821 printf("undefined "); 822 undefined_init(); 823 824 LEDSTEP(); 825 826 /* Load memory into UVM. */ 827 printf("page "); 828 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 829 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 830 atop(physical_freestart), atop(physical_freeend), 831 VM_FREELIST_DEFAULT); 832 833 LEDSTEP(); 834 /* Boot strap pmap telling it where the kernel page table is */ 835 printf("pmap "); 836 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt); 837 838 LEDSTEP(); 839 840 /* Setup the IRQ system */ 841 printf("irq "); 842 /* XXX irq_init(); */ 843 844 printf("done.\n"); 845 846 boothowto |= RB_SINGLE | RB_KDB | RB_ASKNAME; 847 848 #ifdef IPKDB 849 /* Initialise ipkdb */ 850 ipkdb_init(); 851 if (boothowto & RB_KDB) 852 ipkdb_connect(0); 853 #endif 854 855 #ifdef KGDB 856 if (boothowto & RB_KDB) { 857 kgdb_debug_init = 1; 858 kgdb_connect(1); 859 } 860 #endif 861 862 #if NKSYMS || defined(DDB) || defined(LKM) 863 /* Firmware doesn't load symbols. */ 864 ksyms_init(0, NULL, NULL); 865 #endif 866 867 #ifdef DDB 868 db_machine_init(); 869 if (boothowto & RB_KDB) 870 Debugger(); 871 #endif 872 873 /* We return the new stack pointer address */ 874 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP); 875 } 876 #ifndef SSCOM_FREQ 877 /* our PCLK is 50MHz */ 878 #define SSCOM_FREQ 50000000 879 #endif 880 881 void 882 consinit(void) 883 { 884 static int consinit_done = 0; 885 bus_space_tag_t iot = s3c2xx0_softc->sc_iot; 886 887 if (consinit_done != 0) 888 return; 889 890 consinit_done = 1; 891 892 #if NSSCOM > 0 893 #ifdef SSCOM0CONSOLE 894 if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed, 895 SSCOM_FREQ, comcnmode)) 896 return; 897 #endif 898 #ifdef SSCOM1CONSOLE 899 if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed, 900 SSCOM_FREQ, comcnmode)) 901 return; 902 #endif 903 #endif /* NSSCOM */ 904 #if NCOM>0 && defined(CONCOMADDR) 905 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed, 906 COM_FREQ, comcnmode)) 907 panic("can't init serial console @%x", CONCOMADDR); 908 return; 909 #endif 910 911 consinit_done = 0; 912 } 913 914 915 #ifdef KGDB 916 917 #if (NSSCOM > 0) 918 919 #ifdef KGDB_DEVNAME 920 const char kgdb_devname[] = KGDB_DEVNAME; 921 #else 922 const char kgdb_devname[] = ""; 923 #endif 924 925 #ifndef KGDB_DEVMODE 926 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */ 927 #endif 928 int kgdb_sscom_mode = KGDB_DEVMODE; 929 930 #endif /* NSSCOM */ 931 932 void 933 kgdb_port_init(void) 934 { 935 #if (NSSCOM > 0) 936 int unit = -1; 937 938 if (strcmp(kgdb_devname, "sscom0") == 0) 939 unit = 0; 940 else if (strcmp(kgdb_devname, "sscom1") == 0) 941 unit = 1; 942 943 if (unit >= 0) { 944 s3c2800_sscom_kgdb_attach(s3c2xx0_softc->sc_iot, 945 unit, kgdb_rate, SSCOM_FREQ, kgdb_sscom_mode); 946 } 947 #endif 948 } 949 #endif 950 951 static __inline 952 pd_entry_t * 953 read_ttb(void) 954 { 955 long ttb; 956 957 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb)); 958 959 960 return (pd_entry_t *)(ttb & ~((1 << 14) - 1)); 961 } 962 963 964 static __inline void 965 writeback_dcache_line(vaddr_t va) 966 { 967 /* writeback Dcache line */ 968 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9 969 * assume write-through cache, and always flush Dcache instead of 970 * cleaning it. Since Boot loader maps page table with write-back 971 * cached, we really need to clean Dcache. */ 972 asm("mcr p15, 0, %0, c7, c10, 1" 973 : : "r"(va)); 974 } 975 976 static __inline void 977 clean_dcache_line(vaddr_t va) 978 { 979 /* writeback and invalidate Dcache line */ 980 asm("mcr p15, 0, %0, c7, c14, 1" 981 : : "r"(va)); 982 } 983 984 static vaddr_t section_free = SMDK2800_VBASE_FREE; 985 986 /* 987 * simple memory mapping function used in early bootstrap stage 988 * before pmap is initialized. 989 * This assumes only peripheral registers to map. they are mapped to 990 * fixed address with section mapping. 991 */ 992 static int 993 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 994 int flag, bus_space_handle_t * bshp) 995 { 996 long offset, sec; 997 int modified = 0; 998 pd_entry_t *pagedir = read_ttb(); 999 /* This assumes PA==VA for page directory */ 1000 1001 if (S3C2800_PERIPHERALS <= bpa && bpa < S3C2800_PERIPHERALS + 0x200000) { 1002 offset = bpa - S3C2800_PERIPHERALS; 1003 if (offset < 0 || 2 * L1_S_SIZE < offset) 1004 panic("bootstrap_bs_map: can't map"); 1005 sec = (SMDK2800_IO_AREA_VBASE + offset) >> L1_S_SHIFT; 1006 1007 /* already mapped? */ 1008 if ((pagedir[sec] & L1_S_FRAME) != (bpa & L1_S_FRAME)) { 1009 pmap_map_section((vaddr_t)pagedir, sec << L1_S_SHIFT, 1010 bpa & L1_S_FRAME, 1011 VM_PROT_READ | VM_PROT_WRITE, 1012 PTE_NOCACHE); 1013 1014 writeback_dcache_line((vaddr_t)&pagedir[sec]); 1015 modified = 1; 1016 } 1017 *bshp = (bus_space_handle_t)(SMDK2800_IO_AREA_VBASE + offset); 1018 } else { 1019 vaddr_t va; 1020 bus_addr_t pa; 1021 int cacheable = flag & BUS_SPACE_MAP_CACHEABLE; 1022 1023 1024 size = (size + L1_S_OFFSET) & ~L1_S_OFFSET; 1025 pa = bpa & ~L1_S_OFFSET; 1026 offset = bpa - pa; 1027 1028 va = section_free; 1029 while (size) { 1030 pmap_map_section((vaddr_t)pagedir, va, 1031 pa, VM_PROT_READ | VM_PROT_WRITE, 1032 cacheable ? PTE_CACHE : PTE_NOCACHE); 1033 writeback_dcache_line((vaddr_t)& pagedir[va >> L1_S_SHIFT]); 1034 va += L1_S_SIZE; 1035 pa += L1_S_SIZE; 1036 size -= L1_S_SIZE; 1037 } 1038 1039 *bshp = (bus_space_handle_t)(section_free + offset); 1040 section_free = va; 1041 } 1042 1043 1044 if (modified) { 1045 1046 cpu_drain_writebuf(); 1047 cpu_tlb_flushD(); 1048 } 1049 return (0); 1050 } 1051 1052 static void 1053 copy_io_area_map(pd_entry_t * new_pd) 1054 { 1055 pd_entry_t *cur_pd = read_ttb(); 1056 vaddr_t sec; 1057 1058 for (sec = SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT; 1059 sec < (section_free >> L1_S_SHIFT); ++sec) { 1060 new_pd[sec] = cur_pd[sec]; 1061 } 1062 } 1063
Indexes created Wed Oct 01 07:09:59 GMT 2025