smdk2800_machdep.c revision 1.4
1 /* $NetBSD: smdk2800_machdep.c,v 1.4 2003/05/03 00:39:22 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Fujitsu Component Limited 5 * Copyright (c) 2002 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 /* 36 * Machine dependant functions for kernel setup for Samsung SMDK2800 37 * derived from integrator_machdep.c 38 */ 39 40 /* 41 * Copyright (c) 2001,2002 ARM Ltd 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. The name of the company may not be used to endorse or promote 53 * products derived from this software without specific prior written 54 * permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 58 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 59 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD 60 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 61 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 62 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 63 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 64 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 65 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 66 * POSSIBILITY OF SUCH DAMAGE. 67 * 68 */ 69 70 /* 71 * Copyright (c) 1997,1998 Mark Brinicombe. 72 * Copyright (c) 1997,1998 Causality Limited. 73 * All rights reserved. 74 * 75 * Redistribution and use in source and binary forms, with or without 76 * modification, are permitted provided that the following conditions 77 * are met: 78 * 1. Redistributions of source code must retain the above copyright 79 * notice, this list of conditions and the following disclaimer. 80 * 2. Redistributions in binary form must reproduce the above copyright 81 * notice, this list of conditions and the following disclaimer in the 82 * documentation and/or other materials provided with the distribution. 83 * 3. All advertising materials mentioning features or use of this software 84 * must display the following acknowledgement: 85 * This product includes software developed by Mark Brinicombe 86 * for the NetBSD Project. 87 * 4. The name of the company nor the name of the author may be used to 88 * endorse or promote products derived from this software without specific 89 * prior written permission. 90 * 91 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 92 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 93 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 94 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 95 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 96 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 97 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 98 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 99 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 100 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 101 * SUCH DAMAGE. 102 * 103 * Machine dependant functions for kernel setup for integrator board 104 * 105 * Created : 24/11/97 106 */ 107 108 #include "opt_ddb.h" 109 #include "opt_kgdb.h" 110 #include "opt_ipkdb.h" 111 #include "opt_pmap_debug.h" 112 #include "opt_md.h" 113 #include "pci.h" 114 115 #include <sys/param.h> 116 #include <sys/device.h> 117 #include <sys/systm.h> 118 #include <sys/kernel.h> 119 #include <sys/exec.h> 120 #include <sys/proc.h> 121 #include <sys/msgbuf.h> 122 #include <sys/reboot.h> 123 #include <sys/termios.h> 124 #include <sys/ksyms.h> 125 126 #include <uvm/uvm_extern.h> 127 128 #include <dev/cons.h> 129 #include <dev/md.h> 130 131 #include <machine/db_machdep.h> 132 #include <ddb/db_sym.h> 133 #include <ddb/db_extern.h> 134 #ifdef KGDB 135 #include <sys/kgdb.h> 136 #endif 137 138 #include <machine/bootconfig.h> 139 #include <machine/bus.h> 140 #include <machine/cpu.h> 141 #include <machine/frame.h> 142 #include <machine/intr.h> 143 #include <arm/undefined.h> 144 145 #include <arm/arm32/machdep.h> 146 147 #include <arm/s3c2xx0/s3c2800reg.h> 148 #include <arm/s3c2xx0/s3c2800var.h> 149 150 #include "ksyms.h" 151 152 #ifndef SDRAM_START 153 #define SDRAM_START S3C2800_DBANK0_START 154 #endif 155 #ifndef SDRAM_SIZE 156 #define SDRAM_SIZE (32*1024*1024) 157 #endif 158 159 /* 160 * Address to map I/O registers in early initialize stage. 161 */ 162 #define SMDK2800_IO_AREA_VBASE 0xfd000000 163 #define SMDK2800_VBASE_FREE 0xfd200000 164 165 /* 166 * Address to call from cpu_reset() to reset the machine. 167 * This is machine architecture dependant as it varies depending 168 * on where the ROM appears when you turn the MMU off. 169 */ 170 u_int cpu_reset_address = (u_int)0; 171 172 /* Define various stack sizes in pages */ 173 #define IRQ_STACK_SIZE 1 174 #define ABT_STACK_SIZE 1 175 #ifdef IPKDB 176 #define UND_STACK_SIZE 2 177 #else 178 #define UND_STACK_SIZE 1 179 #endif 180 181 BootConfig bootconfig; /* Boot config storage */ 182 char *boot_args = NULL; 183 char *boot_file = NULL; 184 185 vm_offset_t physical_start; 186 vm_offset_t physical_freestart; 187 vm_offset_t physical_freeend; 188 vm_offset_t physical_end; 189 u_int free_pages; 190 vm_offset_t pagetables_start; 191 int physmem = 0; 192 193 /*int debug_flags;*/ 194 #ifndef PMAP_STATIC_L1S 195 int max_processes = 64; /* Default number */ 196 #endif /* !PMAP_STATIC_L1S */ 197 198 /* Physical and virtual addresses for some global pages */ 199 pv_addr_t systempage; 200 pv_addr_t irqstack; 201 pv_addr_t undstack; 202 pv_addr_t abtstack; 203 pv_addr_t kernelstack; 204 205 vm_offset_t msgbufphys; 206 207 extern u_int data_abort_handler_address; 208 extern u_int prefetch_abort_handler_address; 209 extern u_int undefined_handler_address; 210 211 #ifdef PMAP_DEBUG 212 extern int pmap_debug_level; 213 #endif 214 215 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */ 216 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */ 217 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */ 218 219 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 220 221 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 222 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 223 224 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 225 226 struct user *proc0paddr; 227 228 #ifdef MEMORY_DISK_DYNAMIC 229 #define MD_ROOT_SIZE 4 /* in megabytes */ 230 #define MD_ROOT_START 0x400000/* MD root image in ROM */ 231 #endif 232 233 234 /* Prototypes */ 235 236 void consinit(void); 237 void kgdb_port_init(void); 238 239 static int 240 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 241 int cacheable, bus_space_handle_t * bshp); 242 static void copy_io_area_map(pd_entry_t * new_pd); 243 244 /* A load of console goo. */ 245 #include "vga.h" 246 #if NVGA > 0 247 #include <dev/ic/mc6845reg.h> 248 #include <dev/ic/pcdisplayvar.h> 249 #include <dev/ic/vgareg.h> 250 #include <dev/ic/vgavar.h> 251 #endif 252 253 #include "com.h" 254 #if NCOM > 0 255 #include <dev/ic/comreg.h> 256 #include <dev/ic/comvar.h> 257 #endif 258 259 #include "sscom.h" 260 #if NSSCOM > 0 261 #include "opt_sscom.h" 262 #include <arm/s3c2xx0/sscom_var.h> 263 #endif 264 265 /* 266 * Define the default console speed for the board. This is generally 267 * what the firmware provided with the board defaults to. 268 */ 269 #ifndef CONSPEED 270 #define CONSPEED B115200 /* TTYDEF_SPEED */ 271 #endif 272 #ifndef CONMODE 273 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 274 #endif 275 276 int comcnspeed = CONSPEED; 277 int comcnmode = CONMODE; 278 279 struct bus_space bootstrap_bs_tag; 280 281 /* 282 * void cpu_reboot(int howto, char *bootstr) 283 * 284 * Reboots the system 285 * 286 * Deal with any syncing, unmounting, dumping and shutdown hooks, 287 * then reset the CPU. 288 */ 289 void 290 cpu_reboot(int howto, char *bootstr) 291 { 292 #ifdef DIAGNOSTIC 293 /* info */ 294 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 295 #endif 296 297 cpu_reset_address = (u_int)s3c2800_softreset; 298 299 /* 300 * If we are still cold then hit the air brakes 301 * and crash to earth fast 302 */ 303 if (cold) { 304 doshutdownhooks(); 305 printf("The operating system has halted.\n"); 306 printf("Please press any key to reboot.\n\n"); 307 cngetc(); 308 printf("rebooting...\n"); 309 cpu_reset(); 310 /* NOTREACHED */ 311 } 312 /* Disable console buffering */ 313 314 /* 315 * If RB_NOSYNC was not specified sync the discs. 316 * Note: Unless cold is set to 1 here, syslogd will die during the 317 * unmount. It looks like syslogd is getting woken up only to find 318 * that it cannot page part of the binary in as the filesystem has 319 * been unmounted. 320 */ 321 if (!(howto & RB_NOSYNC)) 322 bootsync(); 323 324 /* Say NO to interrupts */ 325 splhigh(); 326 327 /* Do a dump if requested. */ 328 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 329 dumpsys(); 330 331 /* Run any shutdown hooks */ 332 doshutdownhooks(); 333 334 /* Make sure IRQ's are disabled */ 335 IRQdisable; 336 337 if (howto & RB_HALT) { 338 printf("The operating system has halted.\n"); 339 printf("Please press any key to reboot.\n\n"); 340 cngetc(); 341 } 342 printf("rebooting...\n"); 343 cpu_reset(); 344 /* NOTREACHED */ 345 } 346 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v)) 347 348 /* 349 * u_int initarm(...) 350 * 351 * Initial entry point on startup. This gets called before main() is 352 * entered. 353 * It should be responsible for setting up everything that must be 354 * in place when main is called. 355 * This includes 356 * Taking a copy of the boot configuration structure. 357 * Initialising the physical console so characters can be printed. 358 * Setting up page tables for the kernel 359 * Relocating the kernel to the bottom of physical memory 360 */ 361 362 u_int 363 initarm(void *arg) 364 { 365 int loop; 366 int loop1; 367 u_int l1pagetable; 368 extern int etext asm("_etext"); 369 extern int end asm("_end"); 370 pv_addr_t kernel_l1pt; 371 #ifndef ARM32_PMAP_NEW 372 pv_addr_t kernel_ptpt; 373 #endif 374 struct s3c2xx0_softc temp_softc; /* used to initialize IO regs */ 375 int progress_counter = 0; 376 #ifdef MEMORY_DISK_DYNAMIC 377 void *md_root_start, *md_root_rom; 378 #endif 379 380 #define LEDSTEP() __LED(progress_counter++) 381 382 #define pdatc (*(volatile uint8_t *)(S3C2800_GPIO_BASE+GPIO_PDATC)) 383 #define __LED(x) (pdatc = (pdatc & ~0x07) | (~(x) & 0x07)) 384 385 LEDSTEP(); 386 /* 387 * Heads up ... Setup the CPU / MMU / TLB functions 388 */ 389 if (set_cpufuncs()) 390 panic("cpu not recognized!"); 391 392 LEDSTEP(); 393 /* 394 * prepare fake bus space tag 395 */ 396 bootstrap_bs_tag = s3c2xx0_bs_tag; 397 bootstrap_bs_tag.bs_map = bootstrap_bs_map; 398 temp_softc.sc_iot = &bootstrap_bs_tag; 399 s3c2xx0_softc = &temp_softc; 400 401 402 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_GPIO_BASE, 403 S3C2800_GPIO_SIZE, 0, &temp_softc.sc_gpio_ioh); 404 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_INTCTL_BASE, 405 S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_intctl_ioh); 406 407 #undef __LED 408 #define __LED(x) bus_space_write_1( &bootstrap_bs_tag, temp_softc.sc_gpio_ioh, \ 409 GPIO_PDATC, (~(x) & 0x07) | \ 410 (bus_space_read_1( &bootstrap_bs_tag, \ 411 temp_softc.sc_gpio_ioh, GPIO_PDATC ) & ~0x07) ) 412 413 LEDSTEP(); 414 415 /* Disable all peripheral interrupts */ 416 bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_intctl_ioh, 417 INTCTL_INTMSK, 0); 418 419 consinit(); 420 printf("consinit done\n"); 421 422 #ifdef KGDB 423 LEDSTEP(); 424 kgdb_port_init(); 425 #endif 426 LEDSTEP(); 427 428 /* Talk to the user */ 429 printf("\nNetBSD/evbarm (SMDK2800) booting ...\n"); 430 431 /* 432 * Ok we have the following memory map 433 * 434 * Physical Address Range Description 435 * ----------------------- ---------------------------------- 436 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB) 437 * 0x02000000 - 0x020fffff AMD flash Memory (1MB) 438 * or (depend on DIPSW setting) 439 * 0x00000000 - 0x000fffff AMD flash Memory (1MB) 440 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB) 441 * 442 * 0x08000000 - 0x09ffffff SDRAM (32MB) 443 * 0x20000000 - 0x3fffffff PCI space 444 * 445 * The initarm() has the responsibility for creating the kernel 446 * page tables. 447 * It must also set up various memory pointers that are used 448 * by pmap etc. 449 */ 450 451 /* Fake bootconfig structure for the benefit of pmap.c */ 452 /* XXX must make the memory description h/w independent */ 453 bootconfig.dramblocks = 1; 454 bootconfig.dram[0].address = SDRAM_START; 455 bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE; 456 457 /* 458 * Set up the variables that define the availablilty of 459 * physical memory. For now, we're going to set 460 * physical_freestart to 0x08200000 (where the kernel 461 * was loaded), and allocate the memory we need downwards. 462 * If we get too close to the bottom of SDRAM, we 463 * will panic. We will update physical_freestart and 464 * physical_freeend later to reflect what pmap_bootstrap() 465 * wants to see. 466 * 467 * XXX pmap_bootstrap() needs an enema. 468 */ 469 physical_start = bootconfig.dram[0].address; 470 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 471 #ifdef MEMORY_DISK_DYNAMIC 472 /* Reserve for ram disk */ 473 printf("Reserve %d bytes for memory disk\n", MD_ROOT_SIZE * L1_S_SIZE); 474 physical_end -= MD_ROOT_SIZE * L1_S_SIZE; 475 #endif 476 477 physical_freestart = 0x08000000UL; /* XXX */ 478 physical_freeend = 0x08200000UL; 479 480 physmem = (physical_end - physical_start) / PAGE_SIZE; 481 482 /* Tell the user about the memory */ 483 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 484 physical_start, physical_end - 1); 485 486 /* 487 * XXX 488 * Okay, the kernel starts 2MB in from the bottom of physical 489 * memory. We are going to allocate our bootstrap pages downwards 490 * from there. 491 * 492 * We need to allocate some fixed page tables to get the kernel 493 * going. We allocate one page directory and a number of page 494 * tables and store the physical addresses in the kernel_pt_table 495 * array. 496 * 497 * The kernel page directory must be on a 16K boundary. The page 498 * tables must be on 4K bounaries. What we do is allocate the 499 * page directory on the first 16K boundary that we encounter, and 500 * the page tables on 4K boundaries otherwise. Since we allocate 501 * at least 3 L2 page tables, we are guaranteed to encounter at 502 * least one 16K aligned region. 503 */ 504 505 #ifdef VERBOSE_INIT_ARM 506 printf("Allocating page tables\n"); 507 #endif 508 509 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 510 511 #ifdef VERBOSE_INIT_ARM 512 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 513 physical_freestart, free_pages, free_pages); 514 #endif 515 516 /* Define a macro to simplify memory allocation */ 517 #define valloc_pages(var, np) \ 518 alloc_pages((var).pv_pa, (np)); \ 519 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 520 521 #define alloc_pages(var, np) \ 522 physical_freeend -= ((np) * PAGE_SIZE); \ 523 if (physical_freeend < physical_freestart) \ 524 panic("initarm: out of memory"); \ 525 (var) = physical_freeend; \ 526 free_pages -= (np); \ 527 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 528 529 loop1 = 0; 530 kernel_l1pt.pv_pa = 0; 531 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 532 /* Are we 16KB aligned for an L1 ? */ 533 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 534 && kernel_l1pt.pv_pa == 0) { 535 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 536 } else { 537 #ifdef ARM32_PMAP_NEW 538 valloc_pages(kernel_pt_table[loop1], 539 L2_TABLE_SIZE / PAGE_SIZE); 540 #else 541 alloc_pages(kernel_pt_table[loop1].pv_pa, 542 L2_TABLE_SIZE / PAGE_SIZE); 543 kernel_pt_table[loop1].pv_va = 544 kernel_pt_table[loop1].pv_pa; 545 #endif 546 ++loop1; 547 } 548 } 549 550 /* This should never be able to happen but better confirm that. */ 551 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0) 552 panic("initarm: Failed to align the kernel page directory\n"); 553 554 /* 555 * Allocate a page for the system page mapped to V0x00000000 556 * This page will just contain the system vectors and can be 557 * shared by all processes. 558 */ 559 alloc_pages(systempage.pv_pa, 1); 560 561 #ifndef ARM32_PMAP_NEW 562 /* Allocate a page for the page table to map kernel page tables. */ 563 valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE); 564 #endif 565 566 /* Allocate stacks for all modes */ 567 valloc_pages(irqstack, IRQ_STACK_SIZE); 568 valloc_pages(abtstack, ABT_STACK_SIZE); 569 valloc_pages(undstack, UND_STACK_SIZE); 570 valloc_pages(kernelstack, UPAGES); 571 572 #ifdef VERBOSE_INIT_ARM 573 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 574 irqstack.pv_va); 575 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 576 abtstack.pv_va); 577 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 578 undstack.pv_va); 579 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 580 kernelstack.pv_va); 581 #endif 582 583 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 584 585 LEDSTEP(); 586 587 /* 588 * Ok we have allocated physical pages for the primary kernel 589 * page tables 590 */ 591 592 #ifdef VERBOSE_INIT_ARM 593 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 594 #endif 595 596 /* 597 * Now we start construction of the L1 page table 598 * We start by mapping the L2 page tables into the L1. 599 * This means that we can replace L1 mappings later on if necessary 600 */ 601 l1pagetable = kernel_l1pt.pv_pa; 602 603 /* Map the L2 pages tables in the L1 page table */ 604 pmap_link_l2pt(l1pagetable, 0x00000000, 605 &kernel_pt_table[KERNEL_PT_SYS]); 606 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 607 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 608 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 609 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 610 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 611 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 612 #ifndef ARM32_PMAP_NEW 613 pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt); 614 #endif 615 616 /* update the top of the kernel VM */ 617 pmap_curmaxkvaddr = 618 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 619 620 #ifdef VERBOSE_INIT_ARM 621 printf("Mapping kernel\n"); 622 #endif 623 624 /* Now we fill in the L2 pagetable for the kernel static code/data */ 625 { 626 size_t textsize = (uintptr_t) & etext - KERNEL_TEXT_BASE; 627 size_t totalsize = (uintptr_t) & end - KERNEL_TEXT_BASE; 628 u_int logical; 629 630 textsize = (textsize + PGOFSET) & ~PGOFSET; 631 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 632 633 logical = 0x00200000; /* offset of kernel in RAM */ 634 635 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 636 physical_start + logical, textsize, 637 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 638 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 639 physical_start + logical, totalsize - textsize, 640 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 641 } 642 643 #ifdef VERBOSE_INIT_ARM 644 printf("Constructing L2 page tables\n"); 645 #endif 646 647 /* Map the stack pages */ 648 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 649 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 650 PTE_CACHE); 651 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 652 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 653 PTE_CACHE); 654 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 655 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 656 PTE_CACHE); 657 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 658 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 659 660 #ifndef ARM32_PMAP_NEW 661 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 662 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 663 #else 664 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 665 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 666 667 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 668 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 669 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 670 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 671 } 672 #endif 673 674 #ifndef ARM32_PMAP_NEW 675 /* Map the page table that maps the kernel pages */ 676 pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa, 677 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 678 679 /* 680 * Map entries in the page table used to map PTE's 681 * Basically every kernel page table gets mapped here 682 */ 683 /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */ 684 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) { 685 pmap_map_entry(l1pagetable, 686 PTE_BASE + ((KERNEL_BASE + 687 (loop * 0x00400000)) >> (PGSHIFT - 2)), 688 kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa, 689 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 690 } 691 pmap_map_entry(l1pagetable, 692 PTE_BASE + (PTE_BASE >> (PGSHIFT - 2)), 693 kernel_ptpt.pv_pa, VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 694 pmap_map_entry(l1pagetable, 695 PTE_BASE + (0x00000000 >> (PGSHIFT - 2)), 696 kernel_pt_table[KERNEL_PT_SYS].pv_pa, 697 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 698 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 699 pmap_map_entry(l1pagetable, 700 PTE_BASE + ((KERNEL_VM_BASE + 701 (loop * 0x00400000)) >> (PGSHIFT - 2)), 702 kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa, 703 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 704 #endif 705 706 /* Map the vector page. */ 707 #if 1 708 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 709 * cache-clean code there. */ 710 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 711 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 712 #else 713 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 714 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 715 #endif 716 717 #if 0 718 /* Map the core memory needed before autoconfig */ 719 loop = 0; 720 while (l1_sec_table[loop].size) { 721 vm_size_t sz; 722 723 #ifdef VERBOSE_INIT_ARM 724 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa, 725 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1, 726 l1_sec_table[loop].va); 727 #endif 728 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE) 729 pmap_map_section(l1pagetable, 730 l1_sec_table[loop].va + sz, 731 l1_sec_table[loop].pa + sz, 732 l1_sec_table[loop].prot, 733 l1_sec_table[loop].cache); 734 ++loop; 735 } 736 #endif 737 738 #ifdef MEMORY_DISK_DYNAMIC 739 /* Map ram for MD root This will overwrite old page table */ 740 bootstrap_bs_map(&bootstrap_bs_tag, physical_end, 741 MD_ROOT_SIZE * L1_S_SIZE, 0, (bus_space_handle_t *) & md_root_start); 742 /* map MD root image on ROM */ 743 bootstrap_bs_map(&bootstrap_bs_tag, MD_ROOT_START, 744 MD_ROOT_SIZE * L1_S_SIZE, 0, (bus_space_handle_t *) & md_root_rom); 745 746 #endif 747 /* 748 * map integrated peripherals at same address in l1pagetable 749 * so that we can continue to use console. 750 */ 751 copy_io_area_map((pd_entry_t *)l1pagetable); 752 753 /* 754 * Now we have the real page tables in place so we can switch to them. 755 * Once this is done we will be running with the REAL kernel page 756 * tables. 757 */ 758 759 /* 760 * Update the physical_freestart/physical_freeend/free_pages 761 * variables. 762 */ 763 { 764 physical_freestart = physical_start + 765 (((((uintptr_t) & end) + PGOFSET) & ~PGOFSET) - 766 KERNEL_BASE); 767 physical_freeend = physical_end; 768 free_pages = 769 (physical_freeend - physical_freestart) / PAGE_SIZE; 770 } 771 772 /* Switch tables */ 773 #ifdef VERBOSE_INIT_ARM 774 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 775 physical_freestart, free_pages, free_pages); 776 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 777 #endif 778 LEDSTEP(); 779 #ifdef ARM32_PMAP_NEW 780 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 781 #endif 782 setttb(kernel_l1pt.pv_pa); 783 cpu_tlb_flushID(); 784 #ifdef ARM32_PMAP_NEW 785 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 786 787 /* 788 * Moved from cpu_startup() as data_abort_handler() references 789 * this during uvm init 790 */ 791 proc0paddr = (struct user *)kernelstack.pv_va; 792 lwp0.l_addr = proc0paddr; 793 #endif 794 795 #ifdef VERBOSE_INIT_ARM 796 printf("done!\n"); 797 #endif 798 799 #ifdef MEMORY_DISK_DYNAMIC 800 memcpy(md_root_start, md_root_rom, MD_ROOT_SIZE * L1_S_SIZE); 801 md_root_setconf(md_root_start, MD_ROOT_SIZE * L1_S_SIZE); 802 #endif 803 804 #if 0 805 /* 806 * The IFPGA registers have just moved. 807 * Detach the diagnostic serial port and reattach at the new address. 808 */ 809 plcomcndetach(); 810 /* 811 * XXX this should only be done in main() but it useful to 812 * have output earlier ... 813 */ 814 consinit(); 815 #endif 816 817 LEDSTEP(); 818 #ifdef VERBOSE_INIT_ARM 819 printf("bootstrap done.\n"); 820 #endif 821 822 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 823 824 /* 825 * Pages were allocated during the secondary bootstrap for the 826 * stacks for different CPU modes. 827 * We must now set the r13 registers in the different CPU modes to 828 * point to these stacks. 829 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 830 * of the stack memory. 831 */ 832 printf("init subsystems: stacks "); 833 834 set_stackptr(PSR_IRQ32_MODE, 835 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 836 set_stackptr(PSR_ABT32_MODE, 837 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 838 set_stackptr(PSR_UND32_MODE, 839 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 840 841 LEDSTEP(); 842 843 /* 844 * Well we should set a data abort handler. 845 * Once things get going this will change as we will need a proper 846 * handler. 847 * Until then we will use a handler that just panics but tells us 848 * why. 849 * Initialisation of the vectors will just panic on a data abort. 850 * This just fills in a slighly better one. 851 */ 852 printf("vectors "); 853 data_abort_handler_address = (u_int)data_abort_handler; 854 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 855 undefined_handler_address = (u_int)undefinedinstruction_bounce; 856 857 /* Initialise the undefined instruction handlers */ 858 printf("undefined "); 859 undefined_init(); 860 861 LEDSTEP(); 862 863 /* Load memory into UVM. */ 864 printf("page "); 865 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 866 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 867 atop(physical_freestart), atop(physical_freeend), 868 VM_FREELIST_DEFAULT); 869 870 LEDSTEP(); 871 /* Boot strap pmap telling it where the kernel page table is */ 872 printf("pmap "); 873 #ifdef ARM32_PMAP_NEW 874 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va); 875 #else 876 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt); 877 #endif 878 879 LEDSTEP(); 880 881 /* Setup the IRQ system */ 882 printf("irq "); 883 /* XXX irq_init(); */ 884 885 printf("done.\n"); 886 887 boothowto |= RB_SINGLE | RB_KDB | RB_ASKNAME; 888 889 #ifdef IPKDB 890 /* Initialise ipkdb */ 891 ipkdb_init(); 892 if (boothowto & RB_KDB) 893 ipkdb_connect(0); 894 #endif 895 896 #ifdef KGDB 897 if (boothowto & RB_KDB) { 898 kgdb_debug_init = 1; 899 kgdb_connect(1); 900 } 901 #endif 902 903 #if NKSYMS || defined(DDB) || defined(LKM) 904 /* Firmware doesn't load symbols. */ 905 ksyms_init(0, NULL, NULL); 906 #endif 907 908 #ifdef DDB 909 db_machine_init(); 910 if (boothowto & RB_KDB) 911 Debugger(); 912 #endif 913 914 /* We return the new stack pointer address */ 915 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP); 916 } 917 #ifndef SSCOM_FREQ 918 /* our PCLK is 50MHz */ 919 #define SSCOM_FREQ 50000000 920 #endif 921 922 void 923 consinit(void) 924 { 925 static int consinit_done = 0; 926 bus_space_tag_t iot = s3c2xx0_softc->sc_iot; 927 928 if (consinit_done != 0) 929 return; 930 931 consinit_done = 1; 932 933 #if NSSCOM > 0 934 #ifdef SSCOM0CONSOLE 935 if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed, 936 SSCOM_FREQ, comcnmode)) 937 return; 938 #endif 939 #ifdef SSCOM1CONSOLE 940 if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed, 941 SSCOM_FREQ, comcnmode)) 942 return; 943 #endif 944 #endif /* NSSCOM */ 945 #if NCOM>0 && defined(CONCOMADDR) 946 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed, 947 COM_FREQ, comcnmode)) 948 panic("can't init serial console @%x", CONCOMADDR); 949 return; 950 #endif 951 952 consinit_done = 0; 953 } 954 955 956 #ifdef KGDB 957 958 #if (NSSCOM > 0) 959 960 #ifdef KGDB_DEVNAME 961 const char kgdb_devname[] = KGDB_DEVNAME; 962 #else 963 const char kgdb_devname[] = ""; 964 #endif 965 966 #ifndef KGDB_DEVMODE 967 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */ 968 #endif 969 int kgdb_sscom_mode = KGDB_DEVMODE; 970 971 #endif /* NSSCOM */ 972 973 void 974 kgdb_port_init(void) 975 { 976 #if (NSSCOM > 0) 977 int unit = -1; 978 979 if (strcmp(kgdb_devname, "sscom0") == 0) 980 unit = 0; 981 else if (strcmp(kgdb_devname, "sscom1") == 0) 982 unit = 1; 983 984 if (unit >= 0) { 985 s3c2800_sscom_kgdb_attach(s3c2xx0_softc->sc_iot, 986 unit, kgdb_rate, SSCOM_FREQ, kgdb_sscom_mode); 987 } 988 #endif 989 } 990 #endif 991 992 static __inline 993 pd_entry_t * 994 read_ttb(void) 995 { 996 long ttb; 997 998 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb)); 999 1000 1001 return (pd_entry_t *)(ttb & ~((1 << 14) - 1)); 1002 } 1003 1004 1005 static __inline void 1006 writeback_dcache_line(vaddr_t va) 1007 { 1008 /* writeback Dcache line */ 1009 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9 1010 * assume write-through cache, and always flush Dcache instead of 1011 * cleaning it. Since Boot loader maps page table with write-back 1012 * cached, we really need to clean Dcache. */ 1013 asm("mcr p15, 0, %0, c7, c10, 1" 1014 : : "r"(va)); 1015 } 1016 1017 static __inline void 1018 clean_dcache_line(vaddr_t va) 1019 { 1020 /* writeback and invalidate Dcache line */ 1021 asm("mcr p15, 0, %0, c7, c14, 1" 1022 : : "r"(va)); 1023 } 1024 1025 static vaddr_t section_free = SMDK2800_VBASE_FREE; 1026 1027 /* 1028 * simple memory mapping function used in early bootstrap stage 1029 * before pmap is initialized. 1030 * This assumes only peripheral registers to map. they are mapped to 1031 * fixed address with section mapping. 1032 */ 1033 static int 1034 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 1035 int flag, bus_space_handle_t * bshp) 1036 { 1037 long offset, sec; 1038 int modified = 0; 1039 pd_entry_t *pagedir = read_ttb(); 1040 /* This assumes PA==VA for page directory */ 1041 1042 if (S3C2800_PERIPHERALS <= bpa && bpa < S3C2800_PERIPHERALS + 0x200000) { 1043 offset = bpa - S3C2800_PERIPHERALS; 1044 if (offset < 0 || 2 * L1_S_SIZE < offset) 1045 panic("bootstrap_bs_map: can't map"); 1046 sec = (SMDK2800_IO_AREA_VBASE + offset) >> L1_S_SHIFT; 1047 1048 /* already mapped? */ 1049 if ((pagedir[sec] & L1_S_FRAME) != (bpa & L1_S_FRAME)) { 1050 pmap_map_section((vaddr_t)pagedir, sec << L1_S_SHIFT, 1051 bpa & L1_S_FRAME, 1052 VM_PROT_READ | VM_PROT_WRITE, 1053 PTE_NOCACHE); 1054 1055 writeback_dcache_line((vaddr_t)&pagedir[sec]); 1056 modified = 1; 1057 } 1058 *bshp = (bus_space_handle_t)(SMDK2800_IO_AREA_VBASE + offset); 1059 } else { 1060 vaddr_t va; 1061 bus_addr_t pa; 1062 int cacheable = flag & BUS_SPACE_MAP_CACHEABLE; 1063 1064 1065 size = (size + L1_S_OFFSET) & ~L1_S_OFFSET; 1066 pa = bpa & ~L1_S_OFFSET; 1067 offset = bpa - pa; 1068 1069 va = section_free; 1070 while (size) { 1071 pmap_map_section((vaddr_t)pagedir, va, 1072 pa, VM_PROT_READ | VM_PROT_WRITE, 1073 cacheable ? PTE_CACHE : PTE_NOCACHE); 1074 writeback_dcache_line((vaddr_t)& pagedir[va >> L1_S_SHIFT]); 1075 va += L1_S_SIZE; 1076 pa += L1_S_SIZE; 1077 size -= L1_S_SIZE; 1078 } 1079 1080 *bshp = (bus_space_handle_t)(section_free + offset); 1081 section_free = va; 1082 } 1083 1084 1085 if (modified) { 1086 1087 cpu_drain_writebuf(); 1088 cpu_tlb_flushD(); 1089 } 1090 return (0); 1091 } 1092 1093 static void 1094 copy_io_area_map(pd_entry_t * new_pd) 1095 { 1096 pd_entry_t *cur_pd = read_ttb(); 1097 vaddr_t sec; 1098 1099 for (sec = SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT; 1100 sec < (section_free >> L1_S_SHIFT); ++sec) { 1101 new_pd[sec] = cur_pd[sec]; 1102 } 1103 } 1104
Indexes created Tue Sep 30 20:09:53 GMT 2025