smdk2800_machdep.c revision 1.6
1 /* $NetBSD: smdk2800_machdep.c,v 1.6 2003/05/03 03:49:07 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Fujitsu Component Limited 5 * Copyright (c) 2002 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 /* 36 * Machine dependant functions for kernel setup for Samsung SMDK2800 37 * derived from integrator_machdep.c 38 */ 39 40 /* 41 * Copyright (c) 2001,2002 ARM Ltd 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. The name of the company may not be used to endorse or promote 53 * products derived from this software without specific prior written 54 * permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 58 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 59 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD 60 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 61 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 62 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 63 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 64 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 65 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 66 * POSSIBILITY OF SUCH DAMAGE. 67 * 68 */ 69 70 /* 71 * Copyright (c) 1997,1998 Mark Brinicombe. 72 * Copyright (c) 1997,1998 Causality Limited. 73 * All rights reserved. 74 * 75 * Redistribution and use in source and binary forms, with or without 76 * modification, are permitted provided that the following conditions 77 * are met: 78 * 1. Redistributions of source code must retain the above copyright 79 * notice, this list of conditions and the following disclaimer. 80 * 2. Redistributions in binary form must reproduce the above copyright 81 * notice, this list of conditions and the following disclaimer in the 82 * documentation and/or other materials provided with the distribution. 83 * 3. All advertising materials mentioning features or use of this software 84 * must display the following acknowledgement: 85 * This product includes software developed by Mark Brinicombe 86 * for the NetBSD Project. 87 * 4. The name of the company nor the name of the author may be used to 88 * endorse or promote products derived from this software without specific 89 * prior written permission. 90 * 91 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 92 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 93 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 94 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 95 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 96 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 97 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 98 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 99 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 100 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 101 * SUCH DAMAGE. 102 * 103 * Machine dependant functions for kernel setup for integrator board 104 * 105 * Created : 24/11/97 106 */ 107 108 #include "opt_ddb.h" 109 #include "opt_kgdb.h" 110 #include "opt_ipkdb.h" 111 #include "opt_pmap_debug.h" 112 #include "opt_md.h" 113 #include "pci.h" 114 115 #include <sys/param.h> 116 #include <sys/device.h> 117 #include <sys/systm.h> 118 #include <sys/kernel.h> 119 #include <sys/exec.h> 120 #include <sys/proc.h> 121 #include <sys/msgbuf.h> 122 #include <sys/reboot.h> 123 #include <sys/termios.h> 124 #include <sys/ksyms.h> 125 126 #include <uvm/uvm_extern.h> 127 128 #include <dev/cons.h> 129 #include <dev/md.h> 130 131 #include <machine/db_machdep.h> 132 #include <ddb/db_sym.h> 133 #include <ddb/db_extern.h> 134 #ifdef KGDB 135 #include <sys/kgdb.h> 136 #endif 137 138 #include <machine/bootconfig.h> 139 #include <machine/bus.h> 140 #include <machine/cpu.h> 141 #include <machine/frame.h> 142 #include <machine/intr.h> 143 #include <arm/undefined.h> 144 145 #include <arm/arm32/machdep.h> 146 147 #include <arm/s3c2xx0/s3c2800reg.h> 148 #include <arm/s3c2xx0/s3c2800var.h> 149 150 #include "ksyms.h" 151 152 #ifndef SDRAM_START 153 #define SDRAM_START S3C2800_DBANK0_START 154 #endif 155 #ifndef SDRAM_SIZE 156 #define SDRAM_SIZE (32*1024*1024) 157 #endif 158 159 /* 160 * Address to map I/O registers in early initialize stage. 161 */ 162 #define SMDK2800_IO_AREA_VBASE 0xfd000000 163 #define SMDK2800_VBASE_FREE 0xfd200000 164 165 /* 166 * Address to call from cpu_reset() to reset the machine. 167 * This is machine architecture dependant as it varies depending 168 * on where the ROM appears when you turn the MMU off. 169 */ 170 u_int cpu_reset_address = (u_int)0; 171 172 /* Define various stack sizes in pages */ 173 #define IRQ_STACK_SIZE 1 174 #define ABT_STACK_SIZE 1 175 #ifdef IPKDB 176 #define UND_STACK_SIZE 2 177 #else 178 #define UND_STACK_SIZE 1 179 #endif 180 181 BootConfig bootconfig; /* Boot config storage */ 182 char *boot_args = NULL; 183 char *boot_file = NULL; 184 185 vm_offset_t physical_start; 186 vm_offset_t physical_freestart; 187 vm_offset_t physical_freeend; 188 vm_offset_t physical_end; 189 u_int free_pages; 190 vm_offset_t pagetables_start; 191 int physmem = 0; 192 193 /*int debug_flags;*/ 194 #ifndef PMAP_STATIC_L1S 195 int max_processes = 64; /* Default number */ 196 #endif /* !PMAP_STATIC_L1S */ 197 198 /* Physical and virtual addresses for some global pages */ 199 pv_addr_t systempage; 200 pv_addr_t irqstack; 201 pv_addr_t undstack; 202 pv_addr_t abtstack; 203 pv_addr_t kernelstack; 204 205 vm_offset_t msgbufphys; 206 207 extern u_int data_abort_handler_address; 208 extern u_int prefetch_abort_handler_address; 209 extern u_int undefined_handler_address; 210 211 #ifdef PMAP_DEBUG 212 extern int pmap_debug_level; 213 #endif 214 215 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */ 216 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */ 217 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */ 218 219 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 220 221 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 222 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 223 224 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 225 226 struct user *proc0paddr; 227 228 #ifdef MEMORY_DISK_DYNAMIC 229 #define MD_ROOT_SIZE 4 /* in megabytes */ 230 #define MD_ROOT_START 0x400000/* MD root image in ROM */ 231 #endif 232 233 234 /* Prototypes */ 235 236 void consinit(void); 237 void kgdb_port_init(void); 238 239 static int 240 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 241 int cacheable, bus_space_handle_t * bshp); 242 static void copy_io_area_map(pd_entry_t * new_pd); 243 244 /* A load of console goo. */ 245 #include "vga.h" 246 #if NVGA > 0 247 #include <dev/ic/mc6845reg.h> 248 #include <dev/ic/pcdisplayvar.h> 249 #include <dev/ic/vgareg.h> 250 #include <dev/ic/vgavar.h> 251 #endif 252 253 #include "com.h" 254 #if NCOM > 0 255 #include <dev/ic/comreg.h> 256 #include <dev/ic/comvar.h> 257 #endif 258 259 #include "sscom.h" 260 #if NSSCOM > 0 261 #include "opt_sscom.h" 262 #include <arm/s3c2xx0/sscom_var.h> 263 #endif 264 265 /* 266 * Define the default console speed for the board. This is generally 267 * what the firmware provided with the board defaults to. 268 */ 269 #ifndef CONSPEED 270 #define CONSPEED B115200 /* TTYDEF_SPEED */ 271 #endif 272 #ifndef CONMODE 273 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 274 #endif 275 276 int comcnspeed = CONSPEED; 277 int comcnmode = CONMODE; 278 279 struct bus_space bootstrap_bs_tag; 280 281 /* 282 * void cpu_reboot(int howto, char *bootstr) 283 * 284 * Reboots the system 285 * 286 * Deal with any syncing, unmounting, dumping and shutdown hooks, 287 * then reset the CPU. 288 */ 289 void 290 cpu_reboot(int howto, char *bootstr) 291 { 292 #ifdef DIAGNOSTIC 293 /* info */ 294 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 295 #endif 296 297 cpu_reset_address = (u_int)s3c2800_softreset; 298 299 /* 300 * If we are still cold then hit the air brakes 301 * and crash to earth fast 302 */ 303 if (cold) { 304 doshutdownhooks(); 305 printf("The operating system has halted.\n"); 306 printf("Please press any key to reboot.\n\n"); 307 cngetc(); 308 printf("rebooting...\n"); 309 cpu_reset(); 310 /* NOTREACHED */ 311 } 312 /* Disable console buffering */ 313 314 /* 315 * If RB_NOSYNC was not specified sync the discs. 316 * Note: Unless cold is set to 1 here, syslogd will die during the 317 * unmount. It looks like syslogd is getting woken up only to find 318 * that it cannot page part of the binary in as the filesystem has 319 * been unmounted. 320 */ 321 if (!(howto & RB_NOSYNC)) 322 bootsync(); 323 324 /* Say NO to interrupts */ 325 splhigh(); 326 327 /* Do a dump if requested. */ 328 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 329 dumpsys(); 330 331 /* Run any shutdown hooks */ 332 doshutdownhooks(); 333 334 /* Make sure IRQ's are disabled */ 335 IRQdisable; 336 337 if (howto & RB_HALT) { 338 printf("The operating system has halted.\n"); 339 printf("Please press any key to reboot.\n\n"); 340 cngetc(); 341 } 342 printf("rebooting...\n"); 343 cpu_reset(); 344 /* NOTREACHED */ 345 } 346 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v)) 347 348 /* 349 * u_int initarm(...) 350 * 351 * Initial entry point on startup. This gets called before main() is 352 * entered. 353 * It should be responsible for setting up everything that must be 354 * in place when main is called. 355 * This includes 356 * Taking a copy of the boot configuration structure. 357 * Initialising the physical console so characters can be printed. 358 * Setting up page tables for the kernel 359 * Relocating the kernel to the bottom of physical memory 360 */ 361 362 u_int 363 initarm(void *arg) 364 { 365 int loop; 366 int loop1; 367 u_int l1pagetable; 368 extern int etext asm("_etext"); 369 extern int end asm("_end"); 370 pv_addr_t kernel_l1pt; 371 struct s3c2xx0_softc temp_softc; /* used to initialize IO regs */ 372 int progress_counter = 0; 373 #ifdef MEMORY_DISK_DYNAMIC 374 void *md_root_start, *md_root_rom; 375 #endif 376 377 #define LEDSTEP() __LED(progress_counter++) 378 379 #define pdatc (*(volatile uint8_t *)(S3C2800_GPIO_BASE+GPIO_PDATC)) 380 #define __LED(x) (pdatc = (pdatc & ~0x07) | (~(x) & 0x07)) 381 382 LEDSTEP(); 383 /* 384 * Heads up ... Setup the CPU / MMU / TLB functions 385 */ 386 if (set_cpufuncs()) 387 panic("cpu not recognized!"); 388 389 LEDSTEP(); 390 /* 391 * prepare fake bus space tag 392 */ 393 bootstrap_bs_tag = s3c2xx0_bs_tag; 394 bootstrap_bs_tag.bs_map = bootstrap_bs_map; 395 temp_softc.sc_iot = &bootstrap_bs_tag; 396 s3c2xx0_softc = &temp_softc; 397 398 399 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_GPIO_BASE, 400 S3C2800_GPIO_SIZE, 0, &temp_softc.sc_gpio_ioh); 401 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_INTCTL_BASE, 402 S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_intctl_ioh); 403 404 #undef __LED 405 #define __LED(x) bus_space_write_1( &bootstrap_bs_tag, temp_softc.sc_gpio_ioh, \ 406 GPIO_PDATC, (~(x) & 0x07) | \ 407 (bus_space_read_1( &bootstrap_bs_tag, \ 408 temp_softc.sc_gpio_ioh, GPIO_PDATC ) & ~0x07) ) 409 410 LEDSTEP(); 411 412 /* Disable all peripheral interrupts */ 413 bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_intctl_ioh, 414 INTCTL_INTMSK, 0); 415 416 consinit(); 417 printf("consinit done\n"); 418 419 #ifdef KGDB 420 LEDSTEP(); 421 kgdb_port_init(); 422 #endif 423 LEDSTEP(); 424 425 /* Talk to the user */ 426 printf("\nNetBSD/evbarm (SMDK2800) booting ...\n"); 427 428 /* 429 * Ok we have the following memory map 430 * 431 * Physical Address Range Description 432 * ----------------------- ---------------------------------- 433 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB) 434 * 0x02000000 - 0x020fffff AMD flash Memory (1MB) 435 * or (depend on DIPSW setting) 436 * 0x00000000 - 0x000fffff AMD flash Memory (1MB) 437 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB) 438 * 439 * 0x08000000 - 0x09ffffff SDRAM (32MB) 440 * 0x20000000 - 0x3fffffff PCI space 441 * 442 * The initarm() has the responsibility for creating the kernel 443 * page tables. 444 * It must also set up various memory pointers that are used 445 * by pmap etc. 446 */ 447 448 /* Fake bootconfig structure for the benefit of pmap.c */ 449 /* XXX must make the memory description h/w independent */ 450 bootconfig.dramblocks = 1; 451 bootconfig.dram[0].address = SDRAM_START; 452 bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE; 453 454 /* 455 * Set up the variables that define the availablilty of 456 * physical memory. For now, we're going to set 457 * physical_freestart to 0x08200000 (where the kernel 458 * was loaded), and allocate the memory we need downwards. 459 * If we get too close to the bottom of SDRAM, we 460 * will panic. We will update physical_freestart and 461 * physical_freeend later to reflect what pmap_bootstrap() 462 * wants to see. 463 * 464 * XXX pmap_bootstrap() needs an enema. 465 */ 466 physical_start = bootconfig.dram[0].address; 467 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 468 #ifdef MEMORY_DISK_DYNAMIC 469 /* Reserve for ram disk */ 470 printf("Reserve %d bytes for memory disk\n", MD_ROOT_SIZE * L1_S_SIZE); 471 physical_end -= MD_ROOT_SIZE * L1_S_SIZE; 472 #endif 473 474 physical_freestart = 0x08000000UL; /* XXX */ 475 physical_freeend = 0x08200000UL; 476 477 physmem = (physical_end - physical_start) / PAGE_SIZE; 478 479 /* Tell the user about the memory */ 480 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 481 physical_start, physical_end - 1); 482 483 /* 484 * XXX 485 * Okay, the kernel starts 2MB in from the bottom of physical 486 * memory. We are going to allocate our bootstrap pages downwards 487 * from there. 488 * 489 * We need to allocate some fixed page tables to get the kernel 490 * going. We allocate one page directory and a number of page 491 * tables and store the physical addresses in the kernel_pt_table 492 * array. 493 * 494 * The kernel page directory must be on a 16K boundary. The page 495 * tables must be on 4K bounaries. What we do is allocate the 496 * page directory on the first 16K boundary that we encounter, and 497 * the page tables on 4K boundaries otherwise. Since we allocate 498 * at least 3 L2 page tables, we are guaranteed to encounter at 499 * least one 16K aligned region. 500 */ 501 502 #ifdef VERBOSE_INIT_ARM 503 printf("Allocating page tables\n"); 504 #endif 505 506 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 507 508 #ifdef VERBOSE_INIT_ARM 509 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 510 physical_freestart, free_pages, free_pages); 511 #endif 512 513 /* Define a macro to simplify memory allocation */ 514 #define valloc_pages(var, np) \ 515 alloc_pages((var).pv_pa, (np)); \ 516 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 517 518 #define alloc_pages(var, np) \ 519 physical_freeend -= ((np) * PAGE_SIZE); \ 520 if (physical_freeend < physical_freestart) \ 521 panic("initarm: out of memory"); \ 522 (var) = physical_freeend; \ 523 free_pages -= (np); \ 524 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 525 526 loop1 = 0; 527 kernel_l1pt.pv_pa = 0; 528 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 529 /* Are we 16KB aligned for an L1 ? */ 530 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 531 && kernel_l1pt.pv_pa == 0) { 532 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 533 } else { 534 valloc_pages(kernel_pt_table[loop1], 535 L2_TABLE_SIZE / PAGE_SIZE); 536 ++loop1; 537 } 538 } 539 540 /* This should never be able to happen but better confirm that. */ 541 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0) 542 panic("initarm: Failed to align the kernel page directory\n"); 543 544 /* 545 * Allocate a page for the system page mapped to V0x00000000 546 * This page will just contain the system vectors and can be 547 * shared by all processes. 548 */ 549 alloc_pages(systempage.pv_pa, 1); 550 551 /* Allocate stacks for all modes */ 552 valloc_pages(irqstack, IRQ_STACK_SIZE); 553 valloc_pages(abtstack, ABT_STACK_SIZE); 554 valloc_pages(undstack, UND_STACK_SIZE); 555 valloc_pages(kernelstack, UPAGES); 556 557 #ifdef VERBOSE_INIT_ARM 558 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 559 irqstack.pv_va); 560 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 561 abtstack.pv_va); 562 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 563 undstack.pv_va); 564 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 565 kernelstack.pv_va); 566 #endif 567 568 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 569 570 LEDSTEP(); 571 572 /* 573 * Ok we have allocated physical pages for the primary kernel 574 * page tables 575 */ 576 577 #ifdef VERBOSE_INIT_ARM 578 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 579 #endif 580 581 /* 582 * Now we start construction of the L1 page table 583 * We start by mapping the L2 page tables into the L1. 584 * This means that we can replace L1 mappings later on if necessary 585 */ 586 l1pagetable = kernel_l1pt.pv_pa; 587 588 /* Map the L2 pages tables in the L1 page table */ 589 pmap_link_l2pt(l1pagetable, 0x00000000, 590 &kernel_pt_table[KERNEL_PT_SYS]); 591 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 592 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 593 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 594 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 595 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 596 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 597 598 /* update the top of the kernel VM */ 599 pmap_curmaxkvaddr = 600 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 601 602 #ifdef VERBOSE_INIT_ARM 603 printf("Mapping kernel\n"); 604 #endif 605 606 /* Now we fill in the L2 pagetable for the kernel static code/data */ 607 { 608 size_t textsize = (uintptr_t) & etext - KERNEL_TEXT_BASE; 609 size_t totalsize = (uintptr_t) & end - KERNEL_TEXT_BASE; 610 u_int logical; 611 612 textsize = (textsize + PGOFSET) & ~PGOFSET; 613 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 614 615 logical = 0x00200000; /* offset of kernel in RAM */ 616 617 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 618 physical_start + logical, textsize, 619 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 620 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 621 physical_start + logical, totalsize - textsize, 622 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 623 } 624 625 #ifdef VERBOSE_INIT_ARM 626 printf("Constructing L2 page tables\n"); 627 #endif 628 629 /* Map the stack pages */ 630 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 631 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 632 PTE_CACHE); 633 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 634 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 635 PTE_CACHE); 636 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 637 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 638 PTE_CACHE); 639 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 640 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 641 642 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 643 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 644 645 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 646 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 647 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 648 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 649 } 650 651 /* Map the vector page. */ 652 #if 1 653 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 654 * cache-clean code there. */ 655 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 656 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 657 #else 658 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 659 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 660 #endif 661 662 #if 0 663 /* Map the core memory needed before autoconfig */ 664 loop = 0; 665 while (l1_sec_table[loop].size) { 666 vm_size_t sz; 667 668 #ifdef VERBOSE_INIT_ARM 669 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa, 670 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1, 671 l1_sec_table[loop].va); 672 #endif 673 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE) 674 pmap_map_section(l1pagetable, 675 l1_sec_table[loop].va + sz, 676 l1_sec_table[loop].pa + sz, 677 l1_sec_table[loop].prot, 678 l1_sec_table[loop].cache); 679 ++loop; 680 } 681 #endif 682 683 #ifdef MEMORY_DISK_DYNAMIC 684 /* Map ram for MD root This will overwrite old page table */ 685 bootstrap_bs_map(&bootstrap_bs_tag, physical_end, 686 MD_ROOT_SIZE * L1_S_SIZE, 0, (bus_space_handle_t *) & md_root_start); 687 /* map MD root image on ROM */ 688 bootstrap_bs_map(&bootstrap_bs_tag, MD_ROOT_START, 689 MD_ROOT_SIZE * L1_S_SIZE, 0, (bus_space_handle_t *) & md_root_rom); 690 691 #endif 692 /* 693 * map integrated peripherals at same address in l1pagetable 694 * so that we can continue to use console. 695 */ 696 copy_io_area_map((pd_entry_t *)l1pagetable); 697 698 /* 699 * Now we have the real page tables in place so we can switch to them. 700 * Once this is done we will be running with the REAL kernel page 701 * tables. 702 */ 703 704 /* 705 * Update the physical_freestart/physical_freeend/free_pages 706 * variables. 707 */ 708 { 709 physical_freestart = physical_start + 710 (((((uintptr_t) & end) + PGOFSET) & ~PGOFSET) - 711 KERNEL_BASE); 712 physical_freeend = physical_end; 713 free_pages = 714 (physical_freeend - physical_freestart) / PAGE_SIZE; 715 } 716 717 /* Switch tables */ 718 #ifdef VERBOSE_INIT_ARM 719 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 720 physical_freestart, free_pages, free_pages); 721 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 722 #endif 723 LEDSTEP(); 724 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 725 setttb(kernel_l1pt.pv_pa); 726 cpu_tlb_flushID(); 727 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 728 729 /* 730 * Moved from cpu_startup() as data_abort_handler() references 731 * this during uvm init 732 */ 733 proc0paddr = (struct user *)kernelstack.pv_va; 734 lwp0.l_addr = proc0paddr; 735 736 #ifdef VERBOSE_INIT_ARM 737 printf("done!\n"); 738 #endif 739 740 #ifdef MEMORY_DISK_DYNAMIC 741 memcpy(md_root_start, md_root_rom, MD_ROOT_SIZE * L1_S_SIZE); 742 md_root_setconf(md_root_start, MD_ROOT_SIZE * L1_S_SIZE); 743 #endif 744 745 #if 0 746 /* 747 * The IFPGA registers have just moved. 748 * Detach the diagnostic serial port and reattach at the new address. 749 */ 750 plcomcndetach(); 751 /* 752 * XXX this should only be done in main() but it useful to 753 * have output earlier ... 754 */ 755 consinit(); 756 #endif 757 758 LEDSTEP(); 759 #ifdef VERBOSE_INIT_ARM 760 printf("bootstrap done.\n"); 761 #endif 762 763 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 764 765 /* 766 * Pages were allocated during the secondary bootstrap for the 767 * stacks for different CPU modes. 768 * We must now set the r13 registers in the different CPU modes to 769 * point to these stacks. 770 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 771 * of the stack memory. 772 */ 773 printf("init subsystems: stacks "); 774 775 set_stackptr(PSR_IRQ32_MODE, 776 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 777 set_stackptr(PSR_ABT32_MODE, 778 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 779 set_stackptr(PSR_UND32_MODE, 780 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 781 782 LEDSTEP(); 783 784 /* 785 * Well we should set a data abort handler. 786 * Once things get going this will change as we will need a proper 787 * handler. 788 * Until then we will use a handler that just panics but tells us 789 * why. 790 * Initialisation of the vectors will just panic on a data abort. 791 * This just fills in a slighly better one. 792 */ 793 printf("vectors "); 794 data_abort_handler_address = (u_int)data_abort_handler; 795 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 796 undefined_handler_address = (u_int)undefinedinstruction_bounce; 797 798 /* Initialise the undefined instruction handlers */ 799 printf("undefined "); 800 undefined_init(); 801 802 LEDSTEP(); 803 804 /* Load memory into UVM. */ 805 printf("page "); 806 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 807 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 808 atop(physical_freestart), atop(physical_freeend), 809 VM_FREELIST_DEFAULT); 810 811 LEDSTEP(); 812 /* Boot strap pmap telling it where the kernel page table is */ 813 printf("pmap "); 814 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE, 815 KERNEL_VM_BASE + KERNEL_VM_SIZE); 816 817 LEDSTEP(); 818 819 /* Setup the IRQ system */ 820 printf("irq "); 821 /* XXX irq_init(); */ 822 823 printf("done.\n"); 824 825 boothowto |= RB_SINGLE | RB_KDB | RB_ASKNAME; 826 827 #ifdef IPKDB 828 /* Initialise ipkdb */ 829 ipkdb_init(); 830 if (boothowto & RB_KDB) 831 ipkdb_connect(0); 832 #endif 833 834 #ifdef KGDB 835 if (boothowto & RB_KDB) { 836 kgdb_debug_init = 1; 837 kgdb_connect(1); 838 } 839 #endif 840 841 #if NKSYMS || defined(DDB) || defined(LKM) 842 /* Firmware doesn't load symbols. */ 843 ksyms_init(0, NULL, NULL); 844 #endif 845 846 #ifdef DDB 847 db_machine_init(); 848 if (boothowto & RB_KDB) 849 Debugger(); 850 #endif 851 852 /* We return the new stack pointer address */ 853 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP); 854 } 855 #ifndef SSCOM_FREQ 856 /* our PCLK is 50MHz */ 857 #define SSCOM_FREQ 50000000 858 #endif 859 860 void 861 consinit(void) 862 { 863 static int consinit_done = 0; 864 bus_space_tag_t iot = s3c2xx0_softc->sc_iot; 865 866 if (consinit_done != 0) 867 return; 868 869 consinit_done = 1; 870 871 #if NSSCOM > 0 872 #ifdef SSCOM0CONSOLE 873 if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed, 874 SSCOM_FREQ, comcnmode)) 875 return; 876 #endif 877 #ifdef SSCOM1CONSOLE 878 if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed, 879 SSCOM_FREQ, comcnmode)) 880 return; 881 #endif 882 #endif /* NSSCOM */ 883 #if NCOM>0 && defined(CONCOMADDR) 884 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed, 885 COM_FREQ, comcnmode)) 886 panic("can't init serial console @%x", CONCOMADDR); 887 return; 888 #endif 889 890 consinit_done = 0; 891 } 892 893 894 #ifdef KGDB 895 896 #if (NSSCOM > 0) 897 898 #ifdef KGDB_DEVNAME 899 const char kgdb_devname[] = KGDB_DEVNAME; 900 #else 901 const char kgdb_devname[] = ""; 902 #endif 903 904 #ifndef KGDB_DEVMODE 905 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */ 906 #endif 907 int kgdb_sscom_mode = KGDB_DEVMODE; 908 909 #endif /* NSSCOM */ 910 911 void 912 kgdb_port_init(void) 913 { 914 #if (NSSCOM > 0) 915 int unit = -1; 916 917 if (strcmp(kgdb_devname, "sscom0") == 0) 918 unit = 0; 919 else if (strcmp(kgdb_devname, "sscom1") == 0) 920 unit = 1; 921 922 if (unit >= 0) { 923 s3c2800_sscom_kgdb_attach(s3c2xx0_softc->sc_iot, 924 unit, kgdb_rate, SSCOM_FREQ, kgdb_sscom_mode); 925 } 926 #endif 927 } 928 #endif 929 930 static __inline 931 pd_entry_t * 932 read_ttb(void) 933 { 934 long ttb; 935 936 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb)); 937 938 939 return (pd_entry_t *)(ttb & ~((1 << 14) - 1)); 940 } 941 942 943 static __inline void 944 writeback_dcache_line(vaddr_t va) 945 { 946 /* writeback Dcache line */ 947 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9 948 * assume write-through cache, and always flush Dcache instead of 949 * cleaning it. Since Boot loader maps page table with write-back 950 * cached, we really need to clean Dcache. */ 951 asm("mcr p15, 0, %0, c7, c10, 1" 952 : : "r"(va)); 953 } 954 955 static __inline void 956 clean_dcache_line(vaddr_t va) 957 { 958 /* writeback and invalidate Dcache line */ 959 asm("mcr p15, 0, %0, c7, c14, 1" 960 : : "r"(va)); 961 } 962 963 static vaddr_t section_free = SMDK2800_VBASE_FREE; 964 965 /* 966 * simple memory mapping function used in early bootstrap stage 967 * before pmap is initialized. 968 * This assumes only peripheral registers to map. they are mapped to 969 * fixed address with section mapping. 970 */ 971 static int 972 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 973 int flag, bus_space_handle_t * bshp) 974 { 975 long offset, sec; 976 int modified = 0; 977 pd_entry_t *pagedir = read_ttb(); 978 /* This assumes PA==VA for page directory */ 979 980 if (S3C2800_PERIPHERALS <= bpa && bpa < S3C2800_PERIPHERALS + 0x200000) { 981 offset = bpa - S3C2800_PERIPHERALS; 982 if (offset < 0 || 2 * L1_S_SIZE < offset) 983 panic("bootstrap_bs_map: can't map"); 984 sec = (SMDK2800_IO_AREA_VBASE + offset) >> L1_S_SHIFT; 985 986 /* already mapped? */ 987 if ((pagedir[sec] & L1_S_FRAME) != (bpa & L1_S_FRAME)) { 988 pmap_map_section((vaddr_t)pagedir, sec << L1_S_SHIFT, 989 bpa & L1_S_FRAME, 990 VM_PROT_READ | VM_PROT_WRITE, 991 PTE_NOCACHE); 992 993 writeback_dcache_line((vaddr_t)&pagedir[sec]); 994 modified = 1; 995 } 996 *bshp = (bus_space_handle_t)(SMDK2800_IO_AREA_VBASE + offset); 997 } else { 998 vaddr_t va; 999 bus_addr_t pa; 1000 int cacheable = flag & BUS_SPACE_MAP_CACHEABLE; 1001 1002 1003 size = (size + L1_S_OFFSET) & ~L1_S_OFFSET; 1004 pa = bpa & ~L1_S_OFFSET; 1005 offset = bpa - pa; 1006 1007 va = section_free; 1008 while (size) { 1009 pmap_map_section((vaddr_t)pagedir, va, 1010 pa, VM_PROT_READ | VM_PROT_WRITE, 1011 cacheable ? PTE_CACHE : PTE_NOCACHE); 1012 writeback_dcache_line((vaddr_t)& pagedir[va >> L1_S_SHIFT]); 1013 va += L1_S_SIZE; 1014 pa += L1_S_SIZE; 1015 size -= L1_S_SIZE; 1016 } 1017 1018 *bshp = (bus_space_handle_t)(section_free + offset); 1019 section_free = va; 1020 } 1021 1022 1023 if (modified) { 1024 1025 cpu_drain_writebuf(); 1026 cpu_tlb_flushD(); 1027 } 1028 return (0); 1029 } 1030 1031 static void 1032 copy_io_area_map(pd_entry_t * new_pd) 1033 { 1034 pd_entry_t *cur_pd = read_ttb(); 1035 vaddr_t sec; 1036 1037 for (sec = SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT; 1038 sec < (section_free >> L1_S_SHIFT); ++sec) { 1039 new_pd[sec] = cur_pd[sec]; 1040 } 1041 } 1042
Indexes created Wed Oct 01 07:09:59 GMT 2025