smdk2800_machdep.c revision 1.8
1 /* $NetBSD: smdk2800_machdep.c,v 1.8 2003/05/13 04:53:25 bsh Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Fujitsu Component Limited 5 * Copyright (c) 2002 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 /* 36 * Machine dependant functions for kernel setup for Samsung SMDK2800 37 * derived from integrator_machdep.c 38 */ 39 40 /* 41 * Copyright (c) 2001,2002 ARM Ltd 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. The name of the company may not be used to endorse or promote 53 * products derived from this software without specific prior written 54 * permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 58 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 59 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD 60 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 61 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 62 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 63 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 64 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 65 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 66 * POSSIBILITY OF SUCH DAMAGE. 67 * 68 */ 69 70 /* 71 * Copyright (c) 1997,1998 Mark Brinicombe. 72 * Copyright (c) 1997,1998 Causality Limited. 73 * All rights reserved. 74 * 75 * Redistribution and use in source and binary forms, with or without 76 * modification, are permitted provided that the following conditions 77 * are met: 78 * 1. Redistributions of source code must retain the above copyright 79 * notice, this list of conditions and the following disclaimer. 80 * 2. Redistributions in binary form must reproduce the above copyright 81 * notice, this list of conditions and the following disclaimer in the 82 * documentation and/or other materials provided with the distribution. 83 * 3. All advertising materials mentioning features or use of this software 84 * must display the following acknowledgement: 85 * This product includes software developed by Mark Brinicombe 86 * for the NetBSD Project. 87 * 4. The name of the company nor the name of the author may be used to 88 * endorse or promote products derived from this software without specific 89 * prior written permission. 90 * 91 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 92 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 93 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 94 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 95 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 96 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 97 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 98 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 99 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 100 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 101 * SUCH DAMAGE. 102 * 103 * Machine dependant functions for kernel setup for integrator board 104 * 105 * Created : 24/11/97 106 */ 107 108 #include "opt_ddb.h" 109 #include "opt_kgdb.h" 110 #include "opt_ipkdb.h" 111 #include "opt_pmap_debug.h" 112 #include "opt_md.h" 113 #include "pci.h" 114 115 #include <sys/param.h> 116 #include <sys/device.h> 117 #include <sys/systm.h> 118 #include <sys/kernel.h> 119 #include <sys/exec.h> 120 #include <sys/proc.h> 121 #include <sys/msgbuf.h> 122 #include <sys/reboot.h> 123 #include <sys/termios.h> 124 #include <sys/ksyms.h> 125 126 #include <uvm/uvm_extern.h> 127 128 #include <dev/cons.h> 129 #include <dev/md.h> 130 131 #include <machine/db_machdep.h> 132 #include <ddb/db_sym.h> 133 #include <ddb/db_extern.h> 134 #ifdef KGDB 135 #include <sys/kgdb.h> 136 #endif 137 138 #include <machine/bootconfig.h> 139 #include <machine/bus.h> 140 #include <machine/cpu.h> 141 #include <machine/frame.h> 142 #include <machine/intr.h> 143 #include <arm/undefined.h> 144 145 #include <arm/arm32/machdep.h> 146 147 #include <arm/s3c2xx0/s3c2800reg.h> 148 #include <arm/s3c2xx0/s3c2800var.h> 149 150 #include "ksyms.h" 151 152 #ifndef SDRAM_START 153 #define SDRAM_START S3C2800_DBANK0_START 154 #endif 155 #ifndef SDRAM_SIZE 156 #define SDRAM_SIZE (32*1024*1024) 157 #endif 158 159 /* 160 * Address to map I/O registers in early initialize stage. 161 */ 162 #define SMDK2800_IO_AREA_VBASE 0xfd000000 163 #define SMDK2800_VBASE_FREE 0xfd200000 164 165 /* Kernel text starts 2MB in from the bottom of the kernel address space. */ 166 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000) 167 168 /* 169 * Address to call from cpu_reset() to reset the machine. 170 * This is machine architecture dependant as it varies depending 171 * on where the ROM appears when you turn the MMU off. 172 */ 173 u_int cpu_reset_address = (u_int)0; 174 175 /* Define various stack sizes in pages */ 176 #define IRQ_STACK_SIZE 1 177 #define ABT_STACK_SIZE 1 178 #ifdef IPKDB 179 #define UND_STACK_SIZE 2 180 #else 181 #define UND_STACK_SIZE 1 182 #endif 183 184 BootConfig bootconfig; /* Boot config storage */ 185 char *boot_args = NULL; 186 char *boot_file = NULL; 187 188 vm_offset_t physical_start; 189 vm_offset_t physical_freestart; 190 vm_offset_t physical_freeend; 191 vm_offset_t physical_end; 192 u_int free_pages; 193 vm_offset_t pagetables_start; 194 int physmem = 0; 195 196 /*int debug_flags;*/ 197 #ifndef PMAP_STATIC_L1S 198 int max_processes = 64; /* Default number */ 199 #endif /* !PMAP_STATIC_L1S */ 200 201 /* Physical and virtual addresses for some global pages */ 202 pv_addr_t systempage; 203 pv_addr_t irqstack; 204 pv_addr_t undstack; 205 pv_addr_t abtstack; 206 pv_addr_t kernelstack; 207 208 vm_offset_t msgbufphys; 209 210 extern u_int data_abort_handler_address; 211 extern u_int prefetch_abort_handler_address; 212 extern u_int undefined_handler_address; 213 214 #ifdef PMAP_DEBUG 215 extern int pmap_debug_level; 216 #endif 217 218 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */ 219 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */ 220 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */ 221 222 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 223 224 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 225 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 226 227 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 228 229 struct user *proc0paddr; 230 231 #ifdef MEMORY_DISK_DYNAMIC 232 #define MD_ROOT_SIZE 4 /* in megabytes */ 233 #define MD_ROOT_START 0x400000/* MD root image in ROM */ 234 #endif 235 236 237 /* Prototypes */ 238 239 void consinit(void); 240 void kgdb_port_init(void); 241 242 static int 243 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 244 int cacheable, bus_space_handle_t * bshp); 245 static void copy_io_area_map(pd_entry_t * new_pd); 246 247 /* A load of console goo. */ 248 #include "vga.h" 249 #if NVGA > 0 250 #include <dev/ic/mc6845reg.h> 251 #include <dev/ic/pcdisplayvar.h> 252 #include <dev/ic/vgareg.h> 253 #include <dev/ic/vgavar.h> 254 #endif 255 256 #include "com.h" 257 #if NCOM > 0 258 #include <dev/ic/comreg.h> 259 #include <dev/ic/comvar.h> 260 #endif 261 262 #include "sscom.h" 263 #if NSSCOM > 0 264 #include "opt_sscom.h" 265 #include <arm/s3c2xx0/sscom_var.h> 266 #endif 267 268 /* 269 * Define the default console speed for the board. This is generally 270 * what the firmware provided with the board defaults to. 271 */ 272 #ifndef CONSPEED 273 #define CONSPEED B115200 /* TTYDEF_SPEED */ 274 #endif 275 #ifndef CONMODE 276 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 277 #endif 278 279 int comcnspeed = CONSPEED; 280 int comcnmode = CONMODE; 281 282 struct bus_space bootstrap_bs_tag; 283 284 /* 285 * void cpu_reboot(int howto, char *bootstr) 286 * 287 * Reboots the system 288 * 289 * Deal with any syncing, unmounting, dumping and shutdown hooks, 290 * then reset the CPU. 291 */ 292 void 293 cpu_reboot(int howto, char *bootstr) 294 { 295 #ifdef DIAGNOSTIC 296 /* info */ 297 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 298 #endif 299 300 cpu_reset_address = (u_int)s3c2800_softreset; 301 302 /* 303 * If we are still cold then hit the air brakes 304 * and crash to earth fast 305 */ 306 if (cold) { 307 doshutdownhooks(); 308 printf("The operating system has halted.\n"); 309 printf("Please press any key to reboot.\n\n"); 310 cngetc(); 311 printf("rebooting...\n"); 312 cpu_reset(); 313 /* NOTREACHED */ 314 } 315 /* Disable console buffering */ 316 317 /* 318 * If RB_NOSYNC was not specified sync the discs. 319 * Note: Unless cold is set to 1 here, syslogd will die during the 320 * unmount. It looks like syslogd is getting woken up only to find 321 * that it cannot page part of the binary in as the filesystem has 322 * been unmounted. 323 */ 324 if (!(howto & RB_NOSYNC)) 325 bootsync(); 326 327 /* Say NO to interrupts */ 328 splhigh(); 329 330 /* Do a dump if requested. */ 331 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 332 dumpsys(); 333 334 /* Run any shutdown hooks */ 335 doshutdownhooks(); 336 337 /* Make sure IRQ's are disabled */ 338 IRQdisable; 339 340 if (howto & RB_HALT) { 341 printf("The operating system has halted.\n"); 342 printf("Please press any key to reboot.\n\n"); 343 cngetc(); 344 } 345 printf("rebooting...\n"); 346 cpu_reset(); 347 /* NOTREACHED */ 348 } 349 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v)) 350 351 /* 352 * u_int initarm(...) 353 * 354 * Initial entry point on startup. This gets called before main() is 355 * entered. 356 * It should be responsible for setting up everything that must be 357 * in place when main is called. 358 * This includes 359 * Taking a copy of the boot configuration structure. 360 * Initialising the physical console so characters can be printed. 361 * Setting up page tables for the kernel 362 * Relocating the kernel to the bottom of physical memory 363 */ 364 365 u_int 366 initarm(void *arg) 367 { 368 int loop; 369 int loop1; 370 u_int l1pagetable; 371 extern int etext asm("_etext"); 372 extern int end asm("_end"); 373 pv_addr_t kernel_l1pt; 374 struct s3c2xx0_softc temp_softc; /* used to initialize IO regs */ 375 int progress_counter = 0; 376 #ifdef MEMORY_DISK_DYNAMIC 377 void *md_root_start, *md_root_rom; 378 #endif 379 380 #define LEDSTEP() __LED(progress_counter++) 381 382 #define pdatc (*(volatile uint8_t *)(S3C2800_GPIO_BASE+GPIO_PDATC)) 383 #define __LED(x) (pdatc = (pdatc & ~0x07) | (~(x) & 0x07)) 384 385 LEDSTEP(); 386 /* 387 * Heads up ... Setup the CPU / MMU / TLB functions 388 */ 389 if (set_cpufuncs()) 390 panic("cpu not recognized!"); 391 392 LEDSTEP(); 393 /* 394 * prepare fake bus space tag 395 */ 396 bootstrap_bs_tag = s3c2xx0_bs_tag; 397 bootstrap_bs_tag.bs_map = bootstrap_bs_map; 398 temp_softc.sc_iot = &bootstrap_bs_tag; 399 s3c2xx0_softc = &temp_softc; 400 401 402 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_GPIO_BASE, 403 S3C2800_GPIO_SIZE, 0, &temp_softc.sc_gpio_ioh); 404 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_INTCTL_BASE, 405 S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_intctl_ioh); 406 407 #undef __LED 408 #define __LED(x) bus_space_write_1( &bootstrap_bs_tag, temp_softc.sc_gpio_ioh, \ 409 GPIO_PDATC, (~(x) & 0x07) | \ 410 (bus_space_read_1( &bootstrap_bs_tag, \ 411 temp_softc.sc_gpio_ioh, GPIO_PDATC ) & ~0x07) ) 412 413 LEDSTEP(); 414 415 /* Disable all peripheral interrupts */ 416 bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_intctl_ioh, 417 INTCTL_INTMSK, 0); 418 419 consinit(); 420 printf("consinit done\n"); 421 422 #ifdef KGDB 423 LEDSTEP(); 424 kgdb_port_init(); 425 #endif 426 LEDSTEP(); 427 428 /* Talk to the user */ 429 printf("\nNetBSD/evbarm (SMDK2800) booting ...\n"); 430 431 /* 432 * Ok we have the following memory map 433 * 434 * Physical Address Range Description 435 * ----------------------- ---------------------------------- 436 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB) 437 * 0x02000000 - 0x020fffff AMD flash Memory (1MB) 438 * or (depend on DIPSW setting) 439 * 0x00000000 - 0x000fffff AMD flash Memory (1MB) 440 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB) 441 * 442 * 0x08000000 - 0x09ffffff SDRAM (32MB) 443 * 0x20000000 - 0x3fffffff PCI space 444 * 445 * The initarm() has the responsibility for creating the kernel 446 * page tables. 447 * It must also set up various memory pointers that are used 448 * by pmap etc. 449 */ 450 451 /* Fake bootconfig structure for the benefit of pmap.c */ 452 /* XXX must make the memory description h/w independent */ 453 bootconfig.dramblocks = 1; 454 bootconfig.dram[0].address = SDRAM_START; 455 bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE; 456 457 /* 458 * Set up the variables that define the availablilty of 459 * physical memory. For now, we're going to set 460 * physical_freestart to 0x08200000 (where the kernel 461 * was loaded), and allocate the memory we need downwards. 462 * If we get too close to the bottom of SDRAM, we 463 * will panic. We will update physical_freestart and 464 * physical_freeend later to reflect what pmap_bootstrap() 465 * wants to see. 466 * 467 * XXX pmap_bootstrap() needs an enema. 468 */ 469 physical_start = bootconfig.dram[0].address; 470 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 471 #ifdef MEMORY_DISK_DYNAMIC 472 /* Reserve for ram disk */ 473 printf("Reserve %d bytes for memory disk\n", MD_ROOT_SIZE * L1_S_SIZE); 474 physical_end -= MD_ROOT_SIZE * L1_S_SIZE; 475 #endif 476 477 physical_freestart = 0x08000000UL; /* XXX */ 478 physical_freeend = 0x08200000UL; 479 480 physmem = (physical_end - physical_start) / PAGE_SIZE; 481 482 /* Tell the user about the memory */ 483 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 484 physical_start, physical_end - 1); 485 486 /* 487 * XXX 488 * Okay, the kernel starts 2MB in from the bottom of physical 489 * memory. We are going to allocate our bootstrap pages downwards 490 * from there. 491 * 492 * We need to allocate some fixed page tables to get the kernel 493 * going. We allocate one page directory and a number of page 494 * tables and store the physical addresses in the kernel_pt_table 495 * array. 496 * 497 * The kernel page directory must be on a 16K boundary. The page 498 * tables must be on 4K bounaries. What we do is allocate the 499 * page directory on the first 16K boundary that we encounter, and 500 * the page tables on 4K boundaries otherwise. Since we allocate 501 * at least 3 L2 page tables, we are guaranteed to encounter at 502 * least one 16K aligned region. 503 */ 504 505 #ifdef VERBOSE_INIT_ARM 506 printf("Allocating page tables\n"); 507 #endif 508 509 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 510 511 #ifdef VERBOSE_INIT_ARM 512 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 513 physical_freestart, free_pages, free_pages); 514 #endif 515 516 /* Define a macro to simplify memory allocation */ 517 #define valloc_pages(var, np) \ 518 alloc_pages((var).pv_pa, (np)); \ 519 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 520 521 #define alloc_pages(var, np) \ 522 physical_freeend -= ((np) * PAGE_SIZE); \ 523 if (physical_freeend < physical_freestart) \ 524 panic("initarm: out of memory"); \ 525 (var) = physical_freeend; \ 526 free_pages -= (np); \ 527 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 528 529 loop1 = 0; 530 kernel_l1pt.pv_pa = 0; 531 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 532 /* Are we 16KB aligned for an L1 ? */ 533 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 534 && kernel_l1pt.pv_pa == 0) { 535 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 536 } else { 537 valloc_pages(kernel_pt_table[loop1], 538 L2_TABLE_SIZE / PAGE_SIZE); 539 ++loop1; 540 } 541 } 542 543 /* This should never be able to happen but better confirm that. */ 544 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0) 545 panic("initarm: Failed to align the kernel page directory\n"); 546 547 /* 548 * Allocate a page for the system page mapped to V0x00000000 549 * This page will just contain the system vectors and can be 550 * shared by all processes. 551 */ 552 alloc_pages(systempage.pv_pa, 1); 553 554 /* Allocate stacks for all modes */ 555 valloc_pages(irqstack, IRQ_STACK_SIZE); 556 valloc_pages(abtstack, ABT_STACK_SIZE); 557 valloc_pages(undstack, UND_STACK_SIZE); 558 valloc_pages(kernelstack, UPAGES); 559 560 #ifdef VERBOSE_INIT_ARM 561 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 562 irqstack.pv_va); 563 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 564 abtstack.pv_va); 565 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 566 undstack.pv_va); 567 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 568 kernelstack.pv_va); 569 #endif 570 571 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 572 573 LEDSTEP(); 574 575 /* 576 * Ok we have allocated physical pages for the primary kernel 577 * page tables 578 */ 579 580 #ifdef VERBOSE_INIT_ARM 581 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 582 #endif 583 584 /* 585 * Now we start construction of the L1 page table 586 * We start by mapping the L2 page tables into the L1. 587 * This means that we can replace L1 mappings later on if necessary 588 */ 589 l1pagetable = kernel_l1pt.pv_pa; 590 591 /* Map the L2 pages tables in the L1 page table */ 592 pmap_link_l2pt(l1pagetable, 0x00000000, 593 &kernel_pt_table[KERNEL_PT_SYS]); 594 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 595 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 596 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 597 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 598 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 599 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 600 601 /* update the top of the kernel VM */ 602 pmap_curmaxkvaddr = 603 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 604 605 #ifdef VERBOSE_INIT_ARM 606 printf("Mapping kernel\n"); 607 #endif 608 609 /* Now we fill in the L2 pagetable for the kernel static code/data */ 610 { 611 size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE; 612 size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE; 613 u_int logical; 614 615 textsize = (textsize + PGOFSET) & ~PGOFSET; 616 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 617 618 logical = 0x00200000; /* offset of kernel in RAM */ 619 620 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 621 physical_start + logical, textsize, 622 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 623 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 624 physical_start + logical, totalsize - textsize, 625 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 626 } 627 628 #ifdef VERBOSE_INIT_ARM 629 printf("Constructing L2 page tables\n"); 630 #endif 631 632 /* Map the stack pages */ 633 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 634 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 635 PTE_CACHE); 636 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 637 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 638 PTE_CACHE); 639 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 640 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 641 PTE_CACHE); 642 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 643 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 644 645 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 646 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 647 648 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 649 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 650 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 651 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 652 } 653 654 /* Map the vector page. */ 655 #if 1 656 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 657 * cache-clean code there. */ 658 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 659 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 660 #else 661 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 662 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 663 #endif 664 665 #if 0 666 /* Map the core memory needed before autoconfig */ 667 loop = 0; 668 while (l1_sec_table[loop].size) { 669 vm_size_t sz; 670 671 #ifdef VERBOSE_INIT_ARM 672 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa, 673 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1, 674 l1_sec_table[loop].va); 675 #endif 676 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE) 677 pmap_map_section(l1pagetable, 678 l1_sec_table[loop].va + sz, 679 l1_sec_table[loop].pa + sz, 680 l1_sec_table[loop].prot, 681 l1_sec_table[loop].cache); 682 ++loop; 683 } 684 #endif 685 686 #ifdef MEMORY_DISK_DYNAMIC 687 /* Map ram for MD root This will overwrite old page table */ 688 bootstrap_bs_map(&bootstrap_bs_tag, physical_end, 689 MD_ROOT_SIZE * L1_S_SIZE, 0, (bus_space_handle_t *) & md_root_start); 690 /* map MD root image on ROM */ 691 bootstrap_bs_map(&bootstrap_bs_tag, MD_ROOT_START, 692 MD_ROOT_SIZE * L1_S_SIZE, 0, (bus_space_handle_t *) & md_root_rom); 693 694 #endif 695 /* 696 * map integrated peripherals at same address in l1pagetable 697 * so that we can continue to use console. 698 */ 699 copy_io_area_map((pd_entry_t *)l1pagetable); 700 701 /* 702 * Now we have the real page tables in place so we can switch to them. 703 * Once this is done we will be running with the REAL kernel page 704 * tables. 705 */ 706 707 /* 708 * Update the physical_freestart/physical_freeend/free_pages 709 * variables. 710 */ 711 { 712 physical_freestart = physical_start + 713 (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE); 714 physical_freeend = physical_end; 715 free_pages = 716 (physical_freeend - physical_freestart) / PAGE_SIZE; 717 } 718 719 /* Switch tables */ 720 #ifdef VERBOSE_INIT_ARM 721 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 722 physical_freestart, free_pages, free_pages); 723 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 724 #endif 725 LEDSTEP(); 726 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 727 setttb(kernel_l1pt.pv_pa); 728 cpu_tlb_flushID(); 729 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 730 731 /* 732 * Moved from cpu_startup() as data_abort_handler() references 733 * this during uvm init 734 */ 735 proc0paddr = (struct user *)kernelstack.pv_va; 736 lwp0.l_addr = proc0paddr; 737 738 #ifdef VERBOSE_INIT_ARM 739 printf("done!\n"); 740 #endif 741 742 #ifdef MEMORY_DISK_DYNAMIC 743 memcpy(md_root_start, md_root_rom, MD_ROOT_SIZE * L1_S_SIZE); 744 md_root_setconf(md_root_start, MD_ROOT_SIZE * L1_S_SIZE); 745 #endif 746 747 #if 0 748 /* 749 * The IFPGA registers have just moved. 750 * Detach the diagnostic serial port and reattach at the new address. 751 */ 752 plcomcndetach(); 753 /* 754 * XXX this should only be done in main() but it useful to 755 * have output earlier ... 756 */ 757 consinit(); 758 #endif 759 760 LEDSTEP(); 761 #ifdef VERBOSE_INIT_ARM 762 printf("bootstrap done.\n"); 763 #endif 764 765 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 766 767 /* 768 * Pages were allocated during the secondary bootstrap for the 769 * stacks for different CPU modes. 770 * We must now set the r13 registers in the different CPU modes to 771 * point to these stacks. 772 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 773 * of the stack memory. 774 */ 775 printf("init subsystems: stacks "); 776 777 set_stackptr(PSR_IRQ32_MODE, 778 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 779 set_stackptr(PSR_ABT32_MODE, 780 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 781 set_stackptr(PSR_UND32_MODE, 782 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 783 784 LEDSTEP(); 785 786 /* 787 * Well we should set a data abort handler. 788 * Once things get going this will change as we will need a proper 789 * handler. 790 * Until then we will use a handler that just panics but tells us 791 * why. 792 * Initialisation of the vectors will just panic on a data abort. 793 * This just fills in a slighly better one. 794 */ 795 printf("vectors "); 796 data_abort_handler_address = (u_int)data_abort_handler; 797 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 798 undefined_handler_address = (u_int)undefinedinstruction_bounce; 799 800 /* Initialise the undefined instruction handlers */ 801 printf("undefined "); 802 undefined_init(); 803 804 LEDSTEP(); 805 806 /* Load memory into UVM. */ 807 printf("page "); 808 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 809 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 810 atop(physical_freestart), atop(physical_freeend), 811 VM_FREELIST_DEFAULT); 812 813 LEDSTEP(); 814 /* Boot strap pmap telling it where the kernel page table is */ 815 printf("pmap "); 816 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE, 817 KERNEL_VM_BASE + KERNEL_VM_SIZE); 818 819 LEDSTEP(); 820 821 /* Setup the IRQ system */ 822 printf("irq "); 823 /* XXX irq_init(); */ 824 825 printf("done.\n"); 826 827 boothowto |= RB_SINGLE | RB_KDB | RB_ASKNAME; 828 829 #ifdef IPKDB 830 /* Initialise ipkdb */ 831 ipkdb_init(); 832 if (boothowto & RB_KDB) 833 ipkdb_connect(0); 834 #endif 835 836 #ifdef KGDB 837 if (boothowto & RB_KDB) { 838 kgdb_debug_init = 1; 839 kgdb_connect(1); 840 } 841 #endif 842 843 #if NKSYMS || defined(DDB) || defined(LKM) 844 /* Firmware doesn't load symbols. */ 845 ksyms_init(0, NULL, NULL); 846 #endif 847 848 #ifdef DDB 849 db_machine_init(); 850 if (boothowto & RB_KDB) 851 Debugger(); 852 #endif 853 854 /* We return the new stack pointer address */ 855 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP); 856 } 857 #ifndef SSCOM_FREQ 858 /* our PCLK is 50MHz */ 859 #define SSCOM_FREQ 50000000 860 #endif 861 862 void 863 consinit(void) 864 { 865 static int consinit_done = 0; 866 bus_space_tag_t iot = s3c2xx0_softc->sc_iot; 867 868 if (consinit_done != 0) 869 return; 870 871 consinit_done = 1; 872 873 #if NSSCOM > 0 874 #ifdef SSCOM0CONSOLE 875 if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed, 876 SSCOM_FREQ, comcnmode)) 877 return; 878 #endif 879 #ifdef SSCOM1CONSOLE 880 if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed, 881 SSCOM_FREQ, comcnmode)) 882 return; 883 #endif 884 #endif /* NSSCOM */ 885 #if NCOM>0 && defined(CONCOMADDR) 886 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed, 887 COM_FREQ, comcnmode)) 888 panic("can't init serial console @%x", CONCOMADDR); 889 return; 890 #endif 891 892 consinit_done = 0; 893 } 894 895 896 #ifdef KGDB 897 898 #if (NSSCOM > 0) 899 900 #ifdef KGDB_DEVNAME 901 const char kgdb_devname[] = KGDB_DEVNAME; 902 #else 903 const char kgdb_devname[] = ""; 904 #endif 905 906 #ifndef KGDB_DEVMODE 907 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */ 908 #endif 909 int kgdb_sscom_mode = KGDB_DEVMODE; 910 911 #endif /* NSSCOM */ 912 913 void 914 kgdb_port_init(void) 915 { 916 #if (NSSCOM > 0) 917 int unit = -1; 918 919 if (strcmp(kgdb_devname, "sscom0") == 0) 920 unit = 0; 921 else if (strcmp(kgdb_devname, "sscom1") == 0) 922 unit = 1; 923 924 if (unit >= 0) { 925 s3c2800_sscom_kgdb_attach(s3c2xx0_softc->sc_iot, 926 unit, kgdb_rate, SSCOM_FREQ, kgdb_sscom_mode); 927 } 928 #endif 929 } 930 #endif 931 932 static __inline 933 pd_entry_t * 934 read_ttb(void) 935 { 936 long ttb; 937 938 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb)); 939 940 941 return (pd_entry_t *)(ttb & ~((1 << 14) - 1)); 942 } 943 944 945 static __inline void 946 writeback_dcache_line(vaddr_t va) 947 { 948 /* writeback Dcache line */ 949 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9 950 * assume write-through cache, and always flush Dcache instead of 951 * cleaning it. Since Boot loader maps page table with write-back 952 * cached, we really need to clean Dcache. */ 953 asm("mcr p15, 0, %0, c7, c10, 1" 954 : : "r"(va)); 955 } 956 957 static __inline void 958 clean_dcache_line(vaddr_t va) 959 { 960 /* writeback and invalidate Dcache line */ 961 asm("mcr p15, 0, %0, c7, c14, 1" 962 : : "r"(va)); 963 } 964 965 static vaddr_t section_free = SMDK2800_VBASE_FREE; 966 967 /* 968 * simple memory mapping function used in early bootstrap stage 969 * before pmap is initialized. 970 * This assumes only peripheral registers to map. they are mapped to 971 * fixed address with section mapping. 972 */ 973 static int 974 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 975 int flag, bus_space_handle_t * bshp) 976 { 977 long offset, sec; 978 int modified = 0; 979 pd_entry_t *pagedir = read_ttb(); 980 /* This assumes PA==VA for page directory */ 981 982 if (S3C2800_PERIPHERALS <= bpa && bpa < S3C2800_PERIPHERALS + 0x200000) { 983 offset = bpa - S3C2800_PERIPHERALS; 984 if (offset < 0 || 2 * L1_S_SIZE < offset) 985 panic("bootstrap_bs_map: can't map"); 986 sec = (SMDK2800_IO_AREA_VBASE + offset) >> L1_S_SHIFT; 987 988 /* already mapped? */ 989 if ((pagedir[sec] & L1_S_FRAME) != (bpa & L1_S_FRAME)) { 990 pmap_map_section((vaddr_t)pagedir, sec << L1_S_SHIFT, 991 bpa & L1_S_FRAME, 992 VM_PROT_READ | VM_PROT_WRITE, 993 PTE_NOCACHE); 994 995 writeback_dcache_line((vaddr_t)&pagedir[sec]); 996 modified = 1; 997 } 998 *bshp = (bus_space_handle_t)(SMDK2800_IO_AREA_VBASE + offset); 999 } else { 1000 vaddr_t va; 1001 bus_addr_t pa; 1002 int cacheable = flag & BUS_SPACE_MAP_CACHEABLE; 1003 1004 1005 size = (size + L1_S_OFFSET) & ~L1_S_OFFSET; 1006 pa = bpa & ~L1_S_OFFSET; 1007 offset = bpa - pa; 1008 1009 va = section_free; 1010 while (size) { 1011 pmap_map_section((vaddr_t)pagedir, va, 1012 pa, VM_PROT_READ | VM_PROT_WRITE, 1013 cacheable ? PTE_CACHE : PTE_NOCACHE); 1014 writeback_dcache_line((vaddr_t)& pagedir[va >> L1_S_SHIFT]); 1015 va += L1_S_SIZE; 1016 pa += L1_S_SIZE; 1017 size -= L1_S_SIZE; 1018 } 1019 1020 *bshp = (bus_space_handle_t)(section_free + offset); 1021 section_free = va; 1022 } 1023 1024 1025 if (modified) { 1026 1027 cpu_drain_writebuf(); 1028 cpu_tlb_flushD(); 1029 } 1030 return (0); 1031 } 1032 1033 static void 1034 copy_io_area_map(pd_entry_t * new_pd) 1035 { 1036 pd_entry_t *cur_pd = read_ttb(); 1037 vaddr_t sec; 1038 1039 for (sec = SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT; 1040 sec < (section_free >> L1_S_SHIFT); ++sec) { 1041 new_pd[sec] = cur_pd[sec]; 1042 } 1043 } 1044
Indexes created Tue Sep 30 20:09:53 GMT 2025