smdk2800_machdep.c revision 1.9
1 /* $NetBSD: smdk2800_machdep.c,v 1.9 2003/05/13 08:30:33 bsh Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Fujitsu Component Limited 5 * Copyright (c) 2002 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 /* 36 * Copyright (c) 2001,2002 ARM Ltd 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. The name of the company may not be used to endorse or promote 48 * products derived from this software without specific prior written 49 * permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND 52 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 53 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 54 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD 55 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 56 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 57 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 58 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 59 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 60 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 61 * POSSIBILITY OF SUCH DAMAGE. 62 * 63 */ 64 65 /* 66 * Copyright (c) 1997,1998 Mark Brinicombe. 67 * Copyright (c) 1997,1998 Causality Limited. 68 * All rights reserved. 69 * 70 * Redistribution and use in source and binary forms, with or without 71 * modification, are permitted provided that the following conditions 72 * are met: 73 * 1. Redistributions of source code must retain the above copyright 74 * notice, this list of conditions and the following disclaimer. 75 * 2. Redistributions in binary form must reproduce the above copyright 76 * notice, this list of conditions and the following disclaimer in the 77 * documentation and/or other materials provided with the distribution. 78 * 3. All advertising materials mentioning features or use of this software 79 * must display the following acknowledgement: 80 * This product includes software developed by Mark Brinicombe 81 * for the NetBSD Project. 82 * 4. The name of the company nor the name of the author may be used to 83 * endorse or promote products derived from this software without specific 84 * prior written permission. 85 * 86 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 87 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 88 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 89 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 90 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 91 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 92 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 93 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 94 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 95 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 96 * SUCH DAMAGE. 97 * 98 * Machine dependant functions for kernel setup for integrator board 99 * 100 * Created : 24/11/97 101 */ 102 103 /* 104 * Machine dependant functions for kernel setup for Samsung SMDK2800 105 * derived from integrator_machdep.c 106 */ 107 108 #include "opt_ddb.h" 109 #include "opt_kgdb.h" 110 #include "opt_ipkdb.h" 111 #include "opt_pmap_debug.h" 112 #include "opt_md.h" 113 #include "pci.h" 114 115 #include <sys/param.h> 116 #include <sys/device.h> 117 #include <sys/systm.h> 118 #include <sys/kernel.h> 119 #include <sys/exec.h> 120 #include <sys/proc.h> 121 #include <sys/msgbuf.h> 122 #include <sys/reboot.h> 123 #include <sys/termios.h> 124 #include <sys/ksyms.h> 125 126 #include <uvm/uvm_extern.h> 127 128 #include <dev/cons.h> 129 #include <dev/md.h> 130 131 #include <machine/db_machdep.h> 132 #include <ddb/db_sym.h> 133 #include <ddb/db_extern.h> 134 #ifdef KGDB 135 #include <sys/kgdb.h> 136 #endif 137 138 #include <machine/bootconfig.h> 139 #include <machine/bus.h> 140 #include <machine/cpu.h> 141 #include <machine/frame.h> 142 #include <machine/intr.h> 143 #include <arm/undefined.h> 144 145 #include <arm/arm32/machdep.h> 146 147 #include <arm/s3c2xx0/s3c2800reg.h> 148 #include <arm/s3c2xx0/s3c2800var.h> 149 150 #include "ksyms.h" 151 152 #ifndef SDRAM_START 153 #define SDRAM_START S3C2800_DBANK0_START 154 #endif 155 #ifndef SDRAM_SIZE 156 #define SDRAM_SIZE (32*1024*1024) 157 #endif 158 159 /* 160 * Address to map I/O registers in early initialize stage. 161 */ 162 #define SMDK2800_IO_AREA_VBASE 0xfd000000 163 #define SMDK2800_VBASE_FREE 0xfd200000 164 165 /* Kernel text starts 2MB in from the bottom of the kernel address space. */ 166 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000) 167 168 /* Memory disk support */ 169 #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR) 170 #define DO_MEMORY_DISK 171 /* We have memory disk image outside of the kernel on ROM. */ 172 #ifdef MEMORY_DISK_ROOT_ROM 173 /* map the image directory and use read-only */ 174 #else 175 /* copy the image to RAM */ 176 #endif 177 #endif 178 179 180 /* 181 * Address to call from cpu_reset() to reset the machine. 182 * This is machine architecture dependant as it varies depending 183 * on where the ROM appears when you turn the MMU off. 184 */ 185 u_int cpu_reset_address = (u_int)0; 186 187 /* Define various stack sizes in pages */ 188 #define IRQ_STACK_SIZE 1 189 #define ABT_STACK_SIZE 1 190 #ifdef IPKDB 191 #define UND_STACK_SIZE 2 192 #else 193 #define UND_STACK_SIZE 1 194 #endif 195 196 BootConfig bootconfig; /* Boot config storage */ 197 char *boot_args = NULL; 198 char *boot_file = NULL; 199 200 vm_offset_t physical_start; 201 vm_offset_t physical_freestart; 202 vm_offset_t physical_freeend; 203 vm_offset_t physical_end; 204 u_int free_pages; 205 vm_offset_t pagetables_start; 206 int physmem = 0; 207 208 /*int debug_flags;*/ 209 #ifndef PMAP_STATIC_L1S 210 int max_processes = 64; /* Default number */ 211 #endif /* !PMAP_STATIC_L1S */ 212 213 /* Physical and virtual addresses for some global pages */ 214 pv_addr_t systempage; 215 pv_addr_t irqstack; 216 pv_addr_t undstack; 217 pv_addr_t abtstack; 218 pv_addr_t kernelstack; 219 220 vm_offset_t msgbufphys; 221 222 extern u_int data_abort_handler_address; 223 extern u_int prefetch_abort_handler_address; 224 extern u_int undefined_handler_address; 225 226 #ifdef PMAP_DEBUG 227 extern int pmap_debug_level; 228 #endif 229 230 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */ 231 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */ 232 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */ 233 234 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 235 236 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 237 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 238 239 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 240 241 struct user *proc0paddr; 242 243 /* Prototypes */ 244 245 void consinit(void); 246 void kgdb_port_init(void); 247 248 static int 249 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 250 int cacheable, bus_space_handle_t * bshp); 251 static void map_builtin_peripherals(void); 252 static void copy_io_area_map(pd_entry_t * new_pd); 253 254 /* A load of console goo. */ 255 #include "vga.h" 256 #if NVGA > 0 257 #include <dev/ic/mc6845reg.h> 258 #include <dev/ic/pcdisplayvar.h> 259 #include <dev/ic/vgareg.h> 260 #include <dev/ic/vgavar.h> 261 #endif 262 263 #include "com.h" 264 #if NCOM > 0 265 #include <dev/ic/comreg.h> 266 #include <dev/ic/comvar.h> 267 #endif 268 269 #include "sscom.h" 270 #if NSSCOM > 0 271 #include "opt_sscom.h" 272 #include <arm/s3c2xx0/sscom_var.h> 273 #endif 274 275 /* 276 * Define the default console speed for the board. This is generally 277 * what the firmware provided with the board defaults to. 278 */ 279 #ifndef CONSPEED 280 #define CONSPEED B115200 /* TTYDEF_SPEED */ 281 #endif 282 #ifndef CONMODE 283 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 284 #endif 285 286 int comcnspeed = CONSPEED; 287 int comcnmode = CONMODE; 288 289 struct bus_space bootstrap_bs_tag; 290 291 /* 292 * void cpu_reboot(int howto, char *bootstr) 293 * 294 * Reboots the system 295 * 296 * Deal with any syncing, unmounting, dumping and shutdown hooks, 297 * then reset the CPU. 298 */ 299 void 300 cpu_reboot(int howto, char *bootstr) 301 { 302 #ifdef DIAGNOSTIC 303 /* info */ 304 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 305 #endif 306 307 cpu_reset_address = vtophys((u_int)s3c2800_softreset); 308 309 /* 310 * If we are still cold then hit the air brakes 311 * and crash to earth fast 312 */ 313 if (cold) { 314 doshutdownhooks(); 315 printf("The operating system has halted.\n"); 316 printf("Please press any key to reboot.\n\n"); 317 cngetc(); 318 printf("rebooting...\n"); 319 cpu_reset(); 320 /* NOTREACHED */ 321 } 322 /* Disable console buffering */ 323 324 /* 325 * If RB_NOSYNC was not specified sync the discs. 326 * Note: Unless cold is set to 1 here, syslogd will die during the 327 * unmount. It looks like syslogd is getting woken up only to find 328 * that it cannot page part of the binary in as the filesystem has 329 * been unmounted. 330 */ 331 if (!(howto & RB_NOSYNC)) 332 bootsync(); 333 334 /* Say NO to interrupts */ 335 splhigh(); 336 337 /* Do a dump if requested. */ 338 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 339 dumpsys(); 340 341 /* Run any shutdown hooks */ 342 doshutdownhooks(); 343 344 /* Make sure IRQ's are disabled */ 345 IRQdisable; 346 347 if (howto & RB_HALT) { 348 printf("The operating system has halted.\n"); 349 printf("Please press any key to reboot.\n\n"); 350 cngetc(); 351 } 352 printf("rebooting...\n"); 353 cpu_reset(); 354 /* NOTREACHED */ 355 } 356 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v)) 357 358 /* 359 * u_int initarm(...) 360 * 361 * Initial entry point on startup. This gets called before main() is 362 * entered. 363 * It should be responsible for setting up everything that must be 364 * in place when main is called. 365 * This includes 366 * Taking a copy of the boot configuration structure. 367 * Initialising the physical console so characters can be printed. 368 * Setting up page tables for the kernel 369 * Relocating the kernel to the bottom of physical memory 370 */ 371 372 u_int 373 initarm(void *arg) 374 { 375 int loop; 376 int loop1; 377 u_int l1pagetable; 378 extern int etext asm("_etext"); 379 extern int end asm("_end"); 380 pv_addr_t kernel_l1pt; 381 struct s3c2800_softc temp_softc; /* used to initialize IO regs */ 382 int progress_counter = 0; 383 384 #ifdef DO_MEMORY_DISK 385 vm_offset_t md_root_start; 386 #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE) 387 #endif 388 389 #define gpio_read8(reg) bus_space_read_1(temp_softc.sc_sx.sc_iot, \ 390 temp_softc.sc_sx.sc_gpio_ioh, (reg)) 391 392 #define LEDSTEP() __LED(progress_counter++) 393 394 #define pdatc (*(volatile uint8_t *)(S3C2800_GPIO_BASE+GPIO_PDATC)) 395 #define __LED(x) (pdatc = (pdatc & ~0x07) | (~(x) & 0x07)) 396 397 LEDSTEP(); 398 /* 399 * Heads up ... Setup the CPU / MMU / TLB functions 400 */ 401 if (set_cpufuncs()) 402 panic("cpu not recognized!"); 403 404 LEDSTEP(); 405 406 map_builtin_peripherals(); 407 408 /* 409 * prepare fake bus space tag 410 */ 411 bootstrap_bs_tag = s3c2xx0_bs_tag; 412 bootstrap_bs_tag.bs_map = bootstrap_bs_map; 413 s3c2xx0_softc = &temp_softc.sc_sx; 414 s3c2xx0_softc->sc_iot = &bootstrap_bs_tag; 415 416 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_GPIO_BASE, 417 S3C2800_GPIO_SIZE, 0, &temp_softc.sc_sx.sc_gpio_ioh); 418 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_INTCTL_BASE, 419 S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_sx.sc_intctl_ioh); 420 bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_CLKMAN_BASE, 421 S3C2800_CLKMAN_SIZE, 0, &temp_softc.sc_sx.sc_clkman_ioh); 422 423 #undef __LED 424 #define __LED(x) \ 425 bus_space_write_1(&bootstrap_bs_tag, temp_softc.sc_sx.sc_gpio_ioh, \ 426 GPIO_PDATC, (~(x) & 0x07) | \ 427 (bus_space_read_1(&bootstrap_bs_tag, \ 428 temp_softc.sc_sx.sc_gpio_ioh, GPIO_PDATC ) & ~0x07)) 429 430 LEDSTEP(); 431 432 /* Disable all peripheral interrupts */ 433 bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_sx.sc_intctl_ioh, 434 INTCTL_INTMSK, 0); 435 436 s3c2800_clock_freq(&temp_softc); 437 438 consinit(); 439 printf("consinit done\n"); 440 441 #ifdef KGDB 442 LEDSTEP(); 443 kgdb_port_init(); 444 #endif 445 LEDSTEP(); 446 447 /* Talk to the user */ 448 printf("\nNetBSD/evbarm (SMDK2800) booting ...\n"); 449 450 /* 451 * Ok we have the following memory map 452 * 453 * Physical Address Range Description 454 * ----------------------- ---------------------------------- 455 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB) 456 * 0x02000000 - 0x020fffff AMD flash Memory (1MB) 457 * or (depend on DIPSW setting) 458 * 0x00000000 - 0x000fffff AMD flash Memory (1MB) 459 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB) 460 * 461 * 0x08000000 - 0x09ffffff SDRAM (32MB) 462 * 0x20000000 - 0x3fffffff PCI space 463 * 464 * The initarm() has the responsibility for creating the kernel 465 * page tables. 466 * It must also set up various memory pointers that are used 467 * by pmap etc. 468 */ 469 470 /* Fake bootconfig structure for the benefit of pmap.c */ 471 /* XXX must make the memory description h/w independent */ 472 bootconfig.dramblocks = 1; 473 bootconfig.dram[0].address = SDRAM_START; 474 bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE; 475 476 /* 477 * Set up the variables that define the availablilty of 478 * physical memory. For now, we're going to set 479 * physical_freestart to 0x08200000 (where the kernel 480 * was loaded), and allocate the memory we need downwards. 481 * If we get too close to the bottom of SDRAM, we 482 * will panic. We will update physical_freestart and 483 * physical_freeend later to reflect what pmap_bootstrap() 484 * wants to see. 485 * 486 * XXX pmap_bootstrap() needs an enema. 487 */ 488 physical_start = bootconfig.dram[0].address; 489 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 490 491 #if DO_MEMORY_DISK 492 #ifdef MEMORY_DISK_ROOT_ROM 493 md_root_start = MEMORY_DISK_ROOT_ADDR; 494 boothowto |= RB_RDONLY; 495 #else 496 /* Reserve physmem for ram disk */ 497 md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1)); 498 printf("Reserve %ld bytes for memory disk\n", 499 physical_end - md_root_start); 500 /* copy fs contents */ 501 memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR, 502 MD_ROOT_SIZE); 503 physical_end = md_root_start; 504 #endif 505 #endif 506 507 physical_freestart = 0x08000000UL; /* XXX */ 508 physical_freeend = 0x08200000UL; 509 510 physmem = (physical_end - physical_start) / PAGE_SIZE; 511 512 /* Tell the user about the memory */ 513 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 514 physical_start, physical_end - 1); 515 516 /* 517 * XXX 518 * Okay, the kernel starts 2MB in from the bottom of physical 519 * memory. We are going to allocate our bootstrap pages downwards 520 * from there. 521 * 522 * We need to allocate some fixed page tables to get the kernel 523 * going. We allocate one page directory and a number of page 524 * tables and store the physical addresses in the kernel_pt_table 525 * array. 526 * 527 * The kernel page directory must be on a 16K boundary. The page 528 * tables must be on 4K bounaries. What we do is allocate the 529 * page directory on the first 16K boundary that we encounter, and 530 * the page tables on 4K boundaries otherwise. Since we allocate 531 * at least 3 L2 page tables, we are guaranteed to encounter at 532 * least one 16K aligned region. 533 */ 534 535 #ifdef VERBOSE_INIT_ARM 536 printf("Allocating page tables\n"); 537 #endif 538 539 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 540 541 #ifdef VERBOSE_INIT_ARM 542 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 543 physical_freestart, free_pages, free_pages); 544 #endif 545 546 /* Define a macro to simplify memory allocation */ 547 #define valloc_pages(var, np) \ 548 alloc_pages((var).pv_pa, (np)); \ 549 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 550 551 #define alloc_pages(var, np) \ 552 physical_freeend -= ((np) * PAGE_SIZE); \ 553 if (physical_freeend < physical_freestart) \ 554 panic("initarm: out of memory"); \ 555 (var) = physical_freeend; \ 556 free_pages -= (np); \ 557 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 558 559 loop1 = 0; 560 kernel_l1pt.pv_pa = 0; 561 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 562 /* Are we 16KB aligned for an L1 ? */ 563 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 564 && kernel_l1pt.pv_pa == 0) { 565 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 566 } else { 567 valloc_pages(kernel_pt_table[loop1], 568 L2_TABLE_SIZE / PAGE_SIZE); 569 ++loop1; 570 } 571 } 572 573 /* This should never be able to happen but better confirm that. */ 574 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0) 575 panic("initarm: Failed to align the kernel page directory\n"); 576 577 /* 578 * Allocate a page for the system page mapped to V0x00000000 579 * This page will just contain the system vectors and can be 580 * shared by all processes. 581 */ 582 alloc_pages(systempage.pv_pa, 1); 583 584 /* Allocate stacks for all modes */ 585 valloc_pages(irqstack, IRQ_STACK_SIZE); 586 valloc_pages(abtstack, ABT_STACK_SIZE); 587 valloc_pages(undstack, UND_STACK_SIZE); 588 valloc_pages(kernelstack, UPAGES); 589 590 #ifdef VERBOSE_INIT_ARM 591 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 592 irqstack.pv_va); 593 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 594 abtstack.pv_va); 595 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 596 undstack.pv_va); 597 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 598 kernelstack.pv_va); 599 #endif 600 601 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 602 603 LEDSTEP(); 604 605 /* 606 * Ok we have allocated physical pages for the primary kernel 607 * page tables 608 */ 609 610 #ifdef VERBOSE_INIT_ARM 611 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 612 #endif 613 614 /* 615 * Now we start construction of the L1 page table 616 * We start by mapping the L2 page tables into the L1. 617 * This means that we can replace L1 mappings later on if necessary 618 */ 619 l1pagetable = kernel_l1pt.pv_pa; 620 621 /* Map the L2 pages tables in the L1 page table */ 622 pmap_link_l2pt(l1pagetable, 0x00000000, 623 &kernel_pt_table[KERNEL_PT_SYS]); 624 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 625 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 626 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 627 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 628 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 629 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 630 631 /* update the top of the kernel VM */ 632 pmap_curmaxkvaddr = 633 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 634 635 #ifdef VERBOSE_INIT_ARM 636 printf("Mapping kernel\n"); 637 #endif 638 639 /* Now we fill in the L2 pagetable for the kernel static code/data */ 640 { 641 size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE; 642 size_t totalsize = (uintptr_t)&end - KERNEL_TEXT_BASE; 643 u_int logical; 644 645 textsize = (textsize + PGOFSET) & ~PGOFSET; 646 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 647 648 logical = 0x00200000; /* offset of kernel in RAM */ 649 650 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 651 physical_start + logical, textsize, 652 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 653 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 654 physical_start + logical, totalsize - textsize, 655 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 656 } 657 658 #ifdef VERBOSE_INIT_ARM 659 printf("Constructing L2 page tables\n"); 660 #endif 661 662 /* Map the stack pages */ 663 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 664 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 665 PTE_CACHE); 666 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 667 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 668 PTE_CACHE); 669 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 670 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, 671 PTE_CACHE); 672 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 673 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 674 675 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 676 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 677 678 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 679 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 680 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 681 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 682 } 683 684 /* Map the vector page. */ 685 #if 1 686 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 687 * cache-clean code there. */ 688 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 689 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 690 #else 691 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 692 VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 693 #endif 694 695 #if 0 696 /* Map the core memory needed before autoconfig */ 697 loop = 0; 698 while (l1_sec_table[loop].size) { 699 vm_size_t sz; 700 701 #ifdef VERBOSE_INIT_ARM 702 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa, 703 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1, 704 l1_sec_table[loop].va); 705 #endif 706 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE) 707 pmap_map_section(l1pagetable, 708 l1_sec_table[loop].va + sz, 709 l1_sec_table[loop].pa + sz, 710 l1_sec_table[loop].prot, 711 l1_sec_table[loop].cache); 712 ++loop; 713 } 714 #endif 715 716 #ifdef MEMORY_DISK_DYNAMIC 717 /* map MD root image */ 718 bootstrap_bs_map(&bootstrap_bs_tag, md_root_start, MD_ROOT_SIZE, 719 BUS_SPACE_MAP_CACHEABLE | BUS_SPACE_MAP_LINEAR, 720 (bus_space_handle_t *)&md_root_start); 721 722 md_root_setconf((void *)md_root_start, MD_ROOT_SIZE); 723 #endif /* MEMORY_DISK_DYNAMIC */ 724 /* 725 * map integrated peripherals at same address in l1pagetable 726 * so that we can continue to use console. 727 */ 728 copy_io_area_map((pd_entry_t *)l1pagetable); 729 730 /* 731 * Now we have the real page tables in place so we can switch to them. 732 * Once this is done we will be running with the REAL kernel page 733 * tables. 734 */ 735 736 /* 737 * Update the physical_freestart/physical_freeend/free_pages 738 * variables. 739 */ 740 { 741 physical_freestart = physical_start + 742 (((((uintptr_t)&end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE); 743 physical_freeend = physical_end; 744 free_pages = 745 (physical_freeend - physical_freestart) / PAGE_SIZE; 746 } 747 748 /* Switch tables */ 749 #ifdef VERBOSE_INIT_ARM 750 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 751 physical_freestart, free_pages, free_pages); 752 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 753 #endif 754 LEDSTEP(); 755 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 756 setttb(kernel_l1pt.pv_pa); 757 cpu_tlb_flushID(); 758 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 759 760 /* 761 * Moved from cpu_startup() as data_abort_handler() references 762 * this during uvm init 763 */ 764 proc0paddr = (struct user *)kernelstack.pv_va; 765 lwp0.l_addr = proc0paddr; 766 767 #ifdef VERBOSE_INIT_ARM 768 printf("done!\n"); 769 #endif 770 771 #if 0 772 /* 773 * The IFPGA registers have just moved. 774 * Detach the diagnostic serial port and reattach at the new address. 775 */ 776 plcomcndetach(); 777 /* 778 * XXX this should only be done in main() but it useful to 779 * have output earlier ... 780 */ 781 consinit(); 782 #endif 783 784 LEDSTEP(); 785 #ifdef VERBOSE_INIT_ARM 786 printf("bootstrap done.\n"); 787 #endif 788 789 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 790 791 /* 792 * Pages were allocated during the secondary bootstrap for the 793 * stacks for different CPU modes. 794 * We must now set the r13 registers in the different CPU modes to 795 * point to these stacks. 796 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 797 * of the stack memory. 798 */ 799 printf("init subsystems: stacks "); 800 801 set_stackptr(PSR_IRQ32_MODE, 802 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 803 set_stackptr(PSR_ABT32_MODE, 804 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 805 set_stackptr(PSR_UND32_MODE, 806 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 807 808 LEDSTEP(); 809 810 /* 811 * Well we should set a data abort handler. 812 * Once things get going this will change as we will need a proper 813 * handler. 814 * Until then we will use a handler that just panics but tells us 815 * why. 816 * Initialisation of the vectors will just panic on a data abort. 817 * This just fills in a slighly better one. 818 */ 819 printf("vectors "); 820 data_abort_handler_address = (u_int)data_abort_handler; 821 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 822 undefined_handler_address = (u_int)undefinedinstruction_bounce; 823 824 /* Initialise the undefined instruction handlers */ 825 printf("undefined "); 826 undefined_init(); 827 828 LEDSTEP(); 829 830 /* Load memory into UVM. */ 831 printf("page "); 832 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 833 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 834 atop(physical_freestart), atop(physical_freeend), 835 VM_FREELIST_DEFAULT); 836 837 LEDSTEP(); 838 /* Boot strap pmap telling it where the kernel page table is */ 839 printf("pmap "); 840 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE, 841 KERNEL_VM_BASE + KERNEL_VM_SIZE); 842 843 LEDSTEP(); 844 845 /* Setup the IRQ system */ 846 printf("irq "); 847 /* XXX irq_init(); */ 848 849 printf("done.\n"); 850 851 #ifdef BOOTHOWTO_INIT 852 boothowto |= BOOTHOWTO_INIT; 853 #endif 854 { 855 uint8_t gpio = ~gpio_read8(GPIO_PDATF); 856 857 if (gpio & (1<<5)) /* SW3 */ 858 boothowto ^= RB_SINGLE; 859 if (gpio & (1<<7)) /* SW7 */ 860 boothowto ^= RB_KDB; 861 printf( "sw: %x boothowto: %x\n", gpio, boothowto ); 862 } 863 864 #ifdef IPKDB 865 /* Initialise ipkdb */ 866 ipkdb_init(); 867 if (boothowto & RB_KDB) 868 ipkdb_connect(0); 869 #endif 870 871 #ifdef KGDB 872 if (boothowto & RB_KDB) { 873 kgdb_debug_init = 1; 874 kgdb_connect(1); 875 } 876 #endif 877 878 #if NKSYMS || defined(DDB) || defined(LKM) 879 /* Firmware doesn't load symbols. */ 880 ksyms_init(0, NULL, NULL); 881 #endif 882 883 #ifdef DDB 884 db_machine_init(); 885 if (boothowto & RB_KDB) 886 Debugger(); 887 #endif 888 889 /* We return the new stack pointer address */ 890 return (kernelstack.pv_va + USPACE_SVC_STACK_TOP); 891 } 892 893 void 894 consinit(void) 895 { 896 static int consinit_done = 0; 897 bus_space_tag_t iot = s3c2xx0_softc->sc_iot; 898 int pclk = s3c2xx0_softc->sc_pclk; 899 900 if (consinit_done != 0) 901 return; 902 903 consinit_done = 1; 904 905 #if NSSCOM > 0 906 #ifdef SSCOM0CONSOLE 907 if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed, 908 pclk, comcnmode)) 909 return; 910 #endif 911 #ifdef SSCOM1CONSOLE 912 if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed, 913 pclk, comcnmode)) 914 return; 915 #endif 916 #endif /* NSSCOM */ 917 #if NCOM>0 && defined(CONCOMADDR) 918 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed, 919 COM_FREQ, comcnmode)) 920 panic("can't init serial console @%x", CONCOMADDR); 921 return; 922 #endif 923 924 consinit_done = 0; 925 } 926 927 928 #ifdef KGDB 929 930 #if (NSSCOM > 0) 931 932 #ifdef KGDB_DEVNAME 933 const char kgdb_devname[] = KGDB_DEVNAME; 934 #else 935 const char kgdb_devname[] = ""; 936 #endif 937 938 #ifndef KGDB_DEVMODE 939 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */ 940 #endif 941 int kgdb_sscom_mode = KGDB_DEVMODE; 942 943 #endif /* NSSCOM */ 944 945 void 946 kgdb_port_init(void) 947 { 948 #if (NSSCOM > 0) 949 int unit = -1; 950 int pclk = s3c2xx0_softc->sc_pclk; 951 952 if (strcmp(kgdb_devname, "sscom0") == 0) 953 unit = 0; 954 else if (strcmp(kgdb_devname, "sscom1") == 0) 955 unit = 1; 956 957 if (unit >= 0) { 958 s3c2800_sscom_kgdb_attach(s3c2xx0_softc->sc_iot, 959 unit, kgdb_rate, pclk, kgdb_sscom_mode); 960 } 961 #endif 962 } 963 #endif 964 965 static __inline 966 pd_entry_t * 967 read_ttb(void) 968 { 969 long ttb; 970 971 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb)); 972 973 974 return (pd_entry_t *)(ttb & ~((1 << 14) - 1)); 975 } 976 977 978 static __inline void 979 writeback_dcache_line(vaddr_t va) 980 { 981 /* writeback Dcache line */ 982 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9 983 * assume write-through cache, and always flush Dcache instead of 984 * cleaning it. Since Boot loader maps page table with write-back 985 * cached, we really need to clean Dcache. */ 986 asm("mcr p15, 0, %0, c7, c10, 1" 987 : : "r"(va)); 988 } 989 990 static __inline void 991 clean_dcache_line(vaddr_t va) 992 { 993 /* writeback and invalidate Dcache line */ 994 asm("mcr p15, 0, %0, c7, c14, 1" 995 : : "r"(va)); 996 } 997 998 static vaddr_t section_free = SMDK2800_VBASE_FREE; 999 1000 static void 1001 map_builtin_peripherals(void) 1002 { 1003 pd_entry_t *pagedir = read_ttb(); 1004 int i, sec; 1005 1006 for (i=0; i < 2; ++i) { 1007 1008 pmap_map_section((vaddr_t)pagedir, 1009 SMDK2800_IO_AREA_VBASE + (i <<L1_S_SHIFT), 1010 S3C2800_PERIPHERALS + (i << L1_S_SHIFT), 1011 VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE); 1012 1013 sec = (SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT) + i; 1014 writeback_dcache_line((vaddr_t)&pagedir[sec]); 1015 } 1016 1017 cpu_drain_writebuf(); 1018 cpu_tlb_flushD(); 1019 } 1020 1021 /* 1022 * simple memory mapping function used in early bootstrap stage 1023 * before pmap is initialized. 1024 * This assumes only peripheral registers to map. they are mapped to 1025 * fixed address with section mapping. 1026 */ 1027 static int 1028 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size, 1029 int flag, bus_space_handle_t * bshp) 1030 { 1031 long offset; 1032 int modified = 0; 1033 pd_entry_t *pagedir = read_ttb(); 1034 /* This assumes PA==VA for page directory */ 1035 1036 if (S3C2800_PERIPHERALS <= bpa && bpa < S3C2800_PERIPHERALS + 0x200000) { 1037 offset = bpa - S3C2800_PERIPHERALS; 1038 if (offset < 0 || 2 * L1_S_SIZE < offset) 1039 panic("bootstrap_bs_map: can't map"); 1040 *bshp = (bus_space_handle_t)(SMDK2800_IO_AREA_VBASE + offset); 1041 } else { 1042 vaddr_t va; 1043 bus_addr_t pa; 1044 int cacheable = flag & BUS_SPACE_MAP_CACHEABLE; 1045 1046 1047 size = (size + L1_S_OFFSET) & ~L1_S_OFFSET; 1048 pa = bpa & ~L1_S_OFFSET; 1049 offset = bpa - pa; 1050 1051 va = section_free; 1052 while (size) { 1053 pmap_map_section((vaddr_t)pagedir, va, 1054 pa, VM_PROT_READ | VM_PROT_WRITE, 1055 cacheable ? PTE_CACHE : PTE_NOCACHE); 1056 writeback_dcache_line((vaddr_t)& pagedir[va >> L1_S_SHIFT]); 1057 va += L1_S_SIZE; 1058 pa += L1_S_SIZE; 1059 size -= L1_S_SIZE; 1060 } 1061 1062 *bshp = (bus_space_handle_t)(section_free + offset); 1063 section_free = va; 1064 } 1065 1066 1067 if (modified) { 1068 1069 cpu_drain_writebuf(); 1070 cpu_tlb_flushD(); 1071 } 1072 return (0); 1073 } 1074 1075 static void 1076 copy_io_area_map(pd_entry_t * new_pd) 1077 { 1078 pd_entry_t *cur_pd = read_ttb(); 1079 int sec; 1080 1081 for (sec = SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT; 1082 sec < (section_free >> L1_S_SHIFT); ++sec) { 1083 new_pd[sec] = cur_pd[sec]; 1084 } 1085 } 1086
Indexes created Tue Sep 30 20:09:53 GMT 2025