smdk2800var.h revision 1.2 1 1.1 bsh /*
2 1.1 bsh * Copyright (c) 2005 Genetec Corporation. All rights reserved.
3 1.1 bsh * Written by Hiroyuki Bessho for Genetec Corporation.
4 1.1 bsh *
5 1.1 bsh * Redistribution and use in source and binary forms, with or without
6 1.1 bsh * modification, are permitted provided that the following conditions
7 1.1 bsh * are met:
8 1.1 bsh * 1. Redistributions of source code must retain the above copyright
9 1.1 bsh * notice, this list of conditions and the following disclaimer.
10 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
11 1.1 bsh * notice, this list of conditions and the following disclaimer in the
12 1.1 bsh * documentation and/or other materials provided with the distribution.
13 1.1 bsh * 3. The name of Genetec Corporation may not be used to endorse or
14 1.1 bsh * promote products derived from this software without specific prior
15 1.1 bsh * written permission.
16 1.1 bsh *
17 1.1 bsh * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
18 1.1 bsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 1.1 bsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 1.1 bsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
21 1.1 bsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 1.1 bsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 1.1 bsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 1.1 bsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.1 bsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 1.1 bsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.1 bsh * POSSIBILITY OF SUCH DAMAGE.
28 1.1 bsh */
29 1.1 bsh
30 1.1 bsh
31 1.1 bsh #ifndef _EVBARM_SMDK2XX0_SMDK2800VAR_H
32 1.1 bsh #define _EVBARM_SMDK2XX0_SMDK2800VAR_H
33 1.1 bsh
34 1.1 bsh #ifndef SDRAM_START
35 1.1 bsh #define SDRAM_START S3C2800_DBANK0_START
36 1.1 bsh #endif
37 1.1 bsh #ifndef SDRAM_SIZE
38 1.1 bsh #define SDRAM_SIZE (32*1024*1024)
39 1.1 bsh #endif
40 1.1 bsh
41 1.1 bsh /*
42 1.1 bsh * Address to map I/O registers in early initialize stage.
43 1.1 bsh */
44 1.2 bsh #define SMDK2800_IO_AREA_VBASE 0xfd000000 /* 2MBytes */
45 1.2 bsh #define SMDK2800_MEMORY_DISK_VADDR 0xfd200000
46 1.1 bsh
47 1.1 bsh #endif /* _EVBARM_SMDK2XX0_SMDK2800VAR_H */
48