entry.S revision 1.1 
1/*-
2 * Copyright (c) 2012 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Paul Fleischer <paul@xpg.dk>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 * POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#define _LOCORE
31#define _KERNEL
32
33#include <machine/asm.h>
34#include <arm/armreg.h>
35#include <arm/arm32/pte.h>
36#include <arm/arm32/pmap.h>		/* for PMAP_DOMAIN_KERNEL */
37
38#include <arm/s3c2xx0/s3c2440reg.h>	/* for S3C2440_SDRAM_START */
39
40#ifndef	SDRAM_START
41#define	SDRAM_START	S3C2440_SDRAM_START
42#endif
43
44#define LED1 (1<<5)
45#define LED2 (1<<6)
46#define LED3 (1<<7)
47#define LED4 (1<<8)
48
49	.text
50	.global _start
51_start:
52	/* Get arguments from boot-loader (stored in r0 and r1) */
53	adr	r2, bootloader_args
54	stmia	r2, {r0, r1}
55
56	/* Disable interrupt */
57	mrs	r0, cpsr
58	orr	r0, r0, #I32_bit
59	msr	cpsr, r0
60
61        /* Turn off all LEDS except LED2 */
62        mov     r1, #S3C2440_GPIO_BASE
63        add     r1, r1, #0x14
64        ldr     r3, [r1]
65        orr     r3, r3, #LED1 /* LEDS are active-low, so we set their bit to turn them off */
66        bic     r3, r3, #LED2
67        orr     r3, r3, #LED3
68        orr     r3, r3, #LED4
69        str     r3, [r1]
70
71        /* Setup BANK6/7 memory map */
72        mov     r1, #S3C2440_MEMCTL_BASE
73        ldr     r2, [r1, #MEMCTL_BANKSIZE]
74        bic     r2, r2, #0x7 /* Clear the three lowest bits (BK67MAP) */
75        add     r2, r2, #0x1 /* Set BK67MAP to b001 = 64MB/64MB */
76        str     r2, [r1, #MEMCTL_BANKSIZE]
77
78	/* Disable MMU for a while */
79	mrc	p15, 0, r2, c1, c0, 0
80	bic	r2, r2, #CPU_CONTROL_MMU_ENABLE
81	mcr	p15, 0, r2, c1, c0, 0
82
83	nop
84	nop
85	nop
86
87	ldr	r0, LpageTable      /* pagetable */
88	adr	r4, mmu_init_table
89	b	2f
901:
91	str	r3, [r0, r2]
92	add	r2, r2, #4
93	add	r3, r3, #(L1_S_SIZE)
94	adds	r1, r1, #-1
95	bhi	1b
962:
97	ldmia	r4!, {r1,r2,r3}   /* # of sections, PA|attr, VA */
98	cmp	r1, #0
99	bne	1b
100
101	mcr	p15, 0, r0, c2, c0, 0	/* Set TTB */
102	mcr	p15, 0, r0, c8, c7, 0	/* Flush TLB */
103
104	/* Set the Domain Access register.  Very important! */
105	mov	r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT)
106	mcr	p15, 0, r0, c3, c0, 0
107
108	/* Enable MMU */
109	mrc	p15, 0, r0, c1, c0, 0
110	orr	r0, r0, #CPU_CONTROL_MMU_ENABLE
111	mcr	p15, 0, r0, c1, c0, 0
112
113	nop
114	nop
115	nop
116
117	/* Prepare stack */
118	adr	r1, Lcrtsetup
119	ldmia	r1, {r1, r2, sp}
120	sub     r2, r2, r1              /* get zero init data */
121        mov     r3, #0
122.L1:
123        str     r3, [r1], #0x0004       /* zero the bss */
124        subs    r2, r2, #4
125        bgt     .L1
126
127
128	adr	r2, bootloader_args
129	ldmia	r2, {r0, r1}
130
131	/* Jump to kernel code in TRUE VA */
132	ldr	pc, Lstart
133
134Lstart:
135	.word	main
136
137	.macro clock_data  hdivn, pdivn, mdiv, pdiv, sdiv
138	.word	(\hdivn)<<1 | \pdivn
139	.word	(\mdiv)<<PLLCON_MDIV_SHIFT | (\pdiv)<<PLLCON_PDIV_SHIFT | (\sdiv)<<PLLCON_SDIV_SHIFT
140	.endm
141
142#define MMU_INIT(va,pa,n_sec,attr) \
143	.word	n_sec					    ; \
144	.word	4*((va)>>L1_S_SHIFT)			    ; \
145	.word	(pa)|(attr)				    ;
146
147mmu_init_table:
148	/* fill all table VA==PA */
149	MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP(AP_KRW))
150	/* map SDRAM VA==PA, WT cacheable */
151	MMU_INIT(SDRAM_START, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
152	/* map VA 0xc0000000..0xc3ffffff to PA 0x30000000..0x33ffffff */
153	MMU_INIT(0xc0000000, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
154
155	.word 0	/* end of table */
156
157LpageTable:
158	.word	0x30000000
159Lcrtsetup:
160	.word	_edata	/* Start of BSS */
161	.word	_end	/* End of BSS */
162	.word	0x30A00000 /* Place stack-bottom at load-point of libsa bootloader */
163
164	.global _C_LABEL(bootloader_args)
165_C_LABEL(bootloader_args):
166	.space	8 /* Two registers */
167