clock_prep.c revision 1.2.2.3
1 1.2.2.2 yamt /* $Id: clock_prep.c,v 1.2.2.3 2013/01/23 00:05:46 yamt Exp $ */ 2 1.2.2.2 yamt 3 1.2.2.2 yamt /* 4 1.2.2.2 yamt * Copyright (c) 2012 The NetBSD Foundation, Inc. 5 1.2.2.2 yamt * All rights reserved. 6 1.2.2.2 yamt * 7 1.2.2.2 yamt * This code is derived from software contributed to The NetBSD Foundation 8 1.2.2.2 yamt * by Petri Laakso. 9 1.2.2.2 yamt * 10 1.2.2.2 yamt * Redistribution and use in source and binary forms, with or without 11 1.2.2.2 yamt * modification, are permitted provided that the following conditions 12 1.2.2.2 yamt * are met: 13 1.2.2.2 yamt * 1. Redistributions of source code must retain the above copyright 14 1.2.2.2 yamt * notice, this list of conditions and the following disclaimer. 15 1.2.2.2 yamt * 2. Redistributions in binary form must reproduce the above copyright 16 1.2.2.2 yamt * notice, this list of conditions and the following disclaimer in the 17 1.2.2.2 yamt * documentation and/or other materials provided with the distribution. 18 1.2.2.2 yamt * 19 1.2.2.2 yamt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.2.2.2 yamt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.2.2.2 yamt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.2.2.2 yamt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.2.2.2 yamt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.2.2.2 yamt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.2.2.2 yamt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.2.2.2 yamt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.2.2.2 yamt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.2.2.2 yamt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.2.2.2 yamt * POSSIBILITY OF SUCH DAMAGE. 30 1.2.2.2 yamt */ 31 1.2.2.2 yamt 32 1.2.2.2 yamt #include <sys/param.h> 33 1.2.2.2 yamt #include <sys/cdefs.h> 34 1.2.2.2 yamt #include <sys/types.h> 35 1.2.2.2 yamt 36 1.2.2.2 yamt #include <arm/imx/imx23_clkctrlreg.h> 37 1.2.2.2 yamt 38 1.2.2.2 yamt #include <lib/libsa/stand.h> 39 1.2.2.2 yamt 40 1.2.2.2 yamt #include "common.h" 41 1.2.2.2 yamt 42 1.2.2.3 yamt static void enable_pll(void); 43 1.2.2.3 yamt static void enable_ref_cpu(int); 44 1.2.2.3 yamt static void enable_ref_emi(int); 45 1.2.2.3 yamt static void enable_ref_io(int); 46 1.2.2.3 yamt static void use_ref_cpu(void); 47 1.2.2.3 yamt static void use_ref_emi(void); 48 1.2.2.3 yamt static void use_ref_io(void); 49 1.2.2.3 yamt static void set_hbus_div(int); 50 1.2.2.3 yamt static void set_emi_div(int); 51 1.2.2.3 yamt static void set_ssp_div(int); 52 1.2.2.3 yamt 53 1.2.2.3 yamt /* 54 1.2.2.3 yamt * Clock frequences set by clock_prep() 55 1.2.2.3 yamt */ 56 1.2.2.3 yamt #define CPU_FRAC 0x13 /* CPUCLK @ 454.74 MHz */ 57 1.2.2.3 yamt #define HBUS_DIV 0x3 /* AHBCLK @ 151.58 MHz */ 58 1.2.2.3 yamt #define EMI_FRAC 0x21 /* EMICLK @ 130.91 MHz */ 59 1.2.2.3 yamt #define EMI_DIV 0x2 60 1.2.2.3 yamt #define IO_FRAC 0x12 /* IOCLK @ 480.00 MHz */ 61 1.2.2.3 yamt #define SSP_DIV 0x5 /* SSPCLK @ 96.00 MHz */ 62 1.2.2.2 yamt 63 1.2.2.3 yamt /* Offset to frac register for CLKCTRL_WR_BYTE macro. */ 64 1.2.2.2 yamt #define HW_CLKCTRL_FRAC_CPU (HW_CLKCTRL_FRAC+0) 65 1.2.2.2 yamt #define HW_CLKCTRL_FRAC_EMI (HW_CLKCTRL_FRAC+1) 66 1.2.2.2 yamt #define HW_CLKCTRL_FRAC_IO (HW_CLKCTRL_FRAC+3) 67 1.2.2.2 yamt 68 1.2.2.2 yamt #define CLKCTRL_RD(reg) *(volatile uint32_t *)((HW_CLKCTRL_BASE) + (reg)) 69 1.2.2.2 yamt #define CLKCTRL_WR(reg, val) \ 70 1.2.2.2 yamt do { \ 71 1.2.2.2 yamt *(volatile uint32_t *)((HW_CLKCTRL_BASE) + (reg)) = val; \ 72 1.2.2.2 yamt } while (0) 73 1.2.2.2 yamt #define CLKCTRL_WR_BYTE(reg, val) \ 74 1.2.2.2 yamt do { \ 75 1.2.2.2 yamt *(volatile uint8_t *)((HW_CLKCTRL_BASE) + (reg)) = val; \ 76 1.2.2.2 yamt } while (0) 77 1.2.2.2 yamt 78 1.2.2.2 yamt /* 79 1.2.2.2 yamt * Initializes fast PLL based clocks for CPU, HBUS and DRAM. 80 1.2.2.2 yamt */ 81 1.2.2.2 yamt int 82 1.2.2.2 yamt clock_prep(void) 83 1.2.2.2 yamt { 84 1.2.2.2 yamt 85 1.2.2.2 yamt enable_pll(); 86 1.2.2.2 yamt enable_ref_cpu(CPU_FRAC); 87 1.2.2.2 yamt enable_ref_emi(EMI_FRAC); 88 1.2.2.2 yamt enable_ref_io(IO_FRAC); 89 1.2.2.2 yamt set_emi_div(EMI_DIV); 90 1.2.2.2 yamt set_hbus_div(HBUS_DIV); 91 1.2.2.2 yamt use_ref_cpu(); 92 1.2.2.2 yamt use_ref_emi(); 93 1.2.2.2 yamt use_ref_io(); 94 1.2.2.2 yamt set_ssp_div(SSP_DIV); 95 1.2.2.2 yamt 96 1.2.2.2 yamt return 0; 97 1.2.2.2 yamt } 98 1.2.2.2 yamt 99 1.2.2.2 yamt /* 100 1.2.2.2 yamt * Turn PLL on and wait until it's locked to 480 MHz. 101 1.2.2.2 yamt */ 102 1.2.2.3 yamt static void 103 1.2.2.2 yamt enable_pll(void) 104 1.2.2.2 yamt { 105 1.2.2.2 yamt 106 1.2.2.2 yamt CLKCTRL_WR(HW_CLKCTRL_PLLCTRL0_SET, HW_CLKCTRL_PLLCTRL0_POWER); 107 1.2.2.2 yamt while (!(CLKCTRL_RD(HW_CLKCTRL_PLLCTRL1) & HW_CLKCTRL_PLLCTRL1_LOCK)); 108 1.2.2.2 yamt 109 1.2.2.2 yamt return; 110 1.2.2.2 yamt } 111 1.2.2.2 yamt 112 1.2.2.2 yamt /* 113 1.2.2.2 yamt * Enable fractional divider clock ref_cpu with divide value "frac". 114 1.2.2.2 yamt */ 115 1.2.2.3 yamt static void 116 1.2.2.2 yamt enable_ref_cpu(int frac) 117 1.2.2.2 yamt { 118 1.2.2.2 yamt uint32_t reg; 119 1.2.2.2 yamt 120 1.2.2.2 yamt reg = CLKCTRL_RD(HW_CLKCTRL_FRAC); 121 1.2.2.2 yamt reg &= ~(HW_CLKCTRL_FRAC_CLKGATECPU | HW_CLKCTRL_FRAC_CPUFRAC); 122 1.2.2.2 yamt reg |= __SHIFTIN(frac, HW_CLKCTRL_FRAC_CPUFRAC); 123 1.2.2.2 yamt CLKCTRL_WR_BYTE(HW_CLKCTRL_FRAC_CPU, reg); 124 1.2.2.2 yamt 125 1.2.2.2 yamt return; 126 1.2.2.2 yamt } 127 1.2.2.2 yamt 128 1.2.2.2 yamt /* 129 1.2.2.2 yamt * Enable fractional divider clock ref_emi with divide value "frac". 130 1.2.2.2 yamt */ 131 1.2.2.3 yamt static void 132 1.2.2.2 yamt enable_ref_emi(int frac) 133 1.2.2.2 yamt { 134 1.2.2.2 yamt uint32_t reg; 135 1.2.2.2 yamt 136 1.2.2.2 yamt reg = CLKCTRL_RD(HW_CLKCTRL_FRAC); 137 1.2.2.2 yamt reg &= ~(HW_CLKCTRL_FRAC_CLKGATEEMI | HW_CLKCTRL_FRAC_EMIFRAC); 138 1.2.2.2 yamt reg |= __SHIFTIN(frac, HW_CLKCTRL_FRAC_EMIFRAC); 139 1.2.2.2 yamt CLKCTRL_WR_BYTE(HW_CLKCTRL_FRAC_EMI, (reg >> 8)); 140 1.2.2.2 yamt 141 1.2.2.2 yamt return; 142 1.2.2.2 yamt } 143 1.2.2.2 yamt 144 1.2.2.2 yamt /* 145 1.2.2.2 yamt * Enable fractional divider clock ref_io with divide value "frac". 146 1.2.2.2 yamt */ 147 1.2.2.3 yamt static void 148 1.2.2.2 yamt enable_ref_io(int frac) 149 1.2.2.2 yamt { 150 1.2.2.2 yamt uint32_t reg; 151 1.2.2.2 yamt 152 1.2.2.2 yamt reg = CLKCTRL_RD(HW_CLKCTRL_FRAC); 153 1.2.2.2 yamt reg &= ~(HW_CLKCTRL_FRAC_CLKGATEIO | HW_CLKCTRL_FRAC_IOFRAC); 154 1.2.2.2 yamt reg |= __SHIFTIN(frac, HW_CLKCTRL_FRAC_IOFRAC); 155 1.2.2.2 yamt CLKCTRL_WR_BYTE(HW_CLKCTRL_FRAC_IO, (reg >> 24)); 156 1.2.2.2 yamt 157 1.2.2.2 yamt return; 158 1.2.2.2 yamt } 159 1.2.2.2 yamt 160 1.2.2.2 yamt /* 161 1.2.2.2 yamt * Divide CLK_P by "div" to get CLK_H frequency. 162 1.2.2.2 yamt */ 163 1.2.2.3 yamt static void 164 1.2.2.2 yamt set_hbus_div(int div) 165 1.2.2.2 yamt { 166 1.2.2.2 yamt uint32_t reg; 167 1.2.2.2 yamt 168 1.2.2.2 yamt reg = CLKCTRL_RD(HW_CLKCTRL_HBUS); 169 1.2.2.2 yamt reg &= ~(HW_CLKCTRL_HBUS_DIV); 170 1.2.2.2 yamt reg |= __SHIFTIN(div, HW_CLKCTRL_HBUS_DIV); 171 1.2.2.2 yamt while (CLKCTRL_RD(HW_CLKCTRL_HBUS) & HW_CLKCTRL_HBUS_BUSY); 172 1.2.2.2 yamt CLKCTRL_WR(HW_CLKCTRL_HBUS, reg); 173 1.2.2.2 yamt 174 1.2.2.2 yamt return; 175 1.2.2.2 yamt } 176 1.2.2.2 yamt 177 1.2.2.2 yamt /* 178 1.2.2.2 yamt * ref_emi is divied "div" to get CLK_EMI. 179 1.2.2.2 yamt */ 180 1.2.2.3 yamt static void 181 1.2.2.2 yamt set_emi_div(int div) 182 1.2.2.2 yamt { 183 1.2.2.2 yamt uint32_t reg; 184 1.2.2.2 yamt 185 1.2.2.2 yamt reg = CLKCTRL_RD(HW_CLKCTRL_EMI); 186 1.2.2.2 yamt reg &= ~(HW_CLKCTRL_EMI_DIV_EMI); 187 1.2.2.2 yamt reg |= __SHIFTIN(div, HW_CLKCTRL_EMI_DIV_EMI); 188 1.2.2.2 yamt CLKCTRL_WR(HW_CLKCTRL_EMI, reg); 189 1.2.2.2 yamt 190 1.2.2.2 yamt return; 191 1.2.2.2 yamt } 192 1.2.2.2 yamt 193 1.2.2.2 yamt /* 194 1.2.2.2 yamt * ref_io is divied "div" to get CLK_SSP. 195 1.2.2.2 yamt */ 196 1.2.2.3 yamt static void 197 1.2.2.2 yamt set_ssp_div(int div) 198 1.2.2.2 yamt { 199 1.2.2.2 yamt uint32_t reg; 200 1.2.2.2 yamt 201 1.2.2.2 yamt reg = CLKCTRL_RD(HW_CLKCTRL_SSP); 202 1.2.2.2 yamt reg &= ~(HW_CLKCTRL_SSP_DIV); 203 1.2.2.2 yamt reg |= __SHIFTIN(div, HW_CLKCTRL_SSP_DIV); 204 1.2.2.2 yamt CLKCTRL_WR(HW_CLKCTRL_SSP, reg); 205 1.2.2.2 yamt 206 1.2.2.2 yamt return; 207 1.2.2.2 yamt } 208 1.2.2.2 yamt 209 1.2.2.2 yamt /* 210 1.2.2.2 yamt * Transition from ref_xtal to use ref_cpu. 211 1.2.2.2 yamt */ 212 1.2.2.3 yamt static void 213 1.2.2.2 yamt use_ref_cpu(void) 214 1.2.2.2 yamt { 215 1.2.2.2 yamt CLKCTRL_WR(HW_CLKCTRL_CLKSEQ_CLR, HW_CLKCTRL_CLKSEQ_BYPASS_CPU); 216 1.2.2.2 yamt return; 217 1.2.2.2 yamt } 218 1.2.2.2 yamt 219 1.2.2.2 yamt /* 220 1.2.2.2 yamt * Transition from ref_xtal to use ref_emi and source CLK_EMI from ref_emi. 221 1.2.2.2 yamt */ 222 1.2.2.3 yamt static void 223 1.2.2.2 yamt use_ref_emi(void) 224 1.2.2.2 yamt { 225 1.2.2.2 yamt uint32_t reg; 226 1.2.2.2 yamt 227 1.2.2.2 yamt /* Enable ref_emi. */ 228 1.2.2.2 yamt CLKCTRL_WR(HW_CLKCTRL_CLKSEQ_CLR, HW_CLKCTRL_CLKSEQ_BYPASS_EMI); 229 1.2.2.2 yamt 230 1.2.2.2 yamt /* CLK_EMI sourced by the ref_emi. */ 231 1.2.2.2 yamt reg = CLKCTRL_RD(HW_CLKCTRL_EMI); 232 1.2.2.2 yamt reg &= ~(HW_CLKCTRL_EMI_CLKGATE); 233 1.2.2.2 yamt CLKCTRL_WR(HW_CLKCTRL_EMI, reg); 234 1.2.2.2 yamt 235 1.2.2.2 yamt return; 236 1.2.2.2 yamt } 237 1.2.2.2 yamt 238 1.2.2.2 yamt /* 239 1.2.2.2 yamt * Transition from ref_xtal to use ref_io and source CLK_SSP from ref_io. 240 1.2.2.2 yamt */ 241 1.2.2.3 yamt static void 242 1.2.2.2 yamt use_ref_io(void) 243 1.2.2.2 yamt { 244 1.2.2.2 yamt uint32_t reg; 245 1.2.2.2 yamt 246 1.2.2.2 yamt /* Enable ref_io for SSP. */ 247 1.2.2.2 yamt CLKCTRL_WR(HW_CLKCTRL_CLKSEQ_CLR, HW_CLKCTRL_CLKSEQ_BYPASS_SSP); 248 1.2.2.2 yamt 249 1.2.2.2 yamt /* CLK_SSP sourced by the ref_io. */ 250 1.2.2.2 yamt reg = CLKCTRL_RD(HW_CLKCTRL_SSP); 251 1.2.2.2 yamt reg &= ~(HW_CLKCTRL_SSP_CLKGATE); 252 1.2.2.2 yamt CLKCTRL_WR(HW_CLKCTRL_SSP, reg); 253 1.2.2.2 yamt 254 1.2.2.2 yamt return; 255 1.2.2.2 yamt } 256
Indexes created Sat Oct 25 00:10:07 GMT 2025