emi_prep.c revision 1.2.2.4
1 1.2.2.4 yamt /* $Id: emi_prep.c,v 1.2.2.4 2014/05/22 11:39:43 yamt Exp $ */ 2 1.2.2.2 yamt 3 1.2.2.2 yamt /* 4 1.2.2.2 yamt * Copyright (c) 2012 The NetBSD Foundation, Inc. 5 1.2.2.2 yamt * All rights reserved. 6 1.2.2.2 yamt * 7 1.2.2.2 yamt * This code is derived from software contributed to The NetBSD Foundation 8 1.2.2.2 yamt * by Petri Laakso. 9 1.2.2.2 yamt * 10 1.2.2.2 yamt * Redistribution and use in source and binary forms, with or without 11 1.2.2.2 yamt * modification, are permitted provided that the following conditions 12 1.2.2.2 yamt * are met: 13 1.2.2.2 yamt * 1. Redistributions of source code must retain the above copyright 14 1.2.2.2 yamt * notice, this list of conditions and the following disclaimer. 15 1.2.2.2 yamt * 2. Redistributions in binary form must reproduce the above copyright 16 1.2.2.2 yamt * notice, this list of conditions and the following disclaimer in the 17 1.2.2.2 yamt * documentation and/or other materials provided with the distribution. 18 1.2.2.2 yamt * 19 1.2.2.2 yamt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.2.2.2 yamt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.2.2.2 yamt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.2.2.2 yamt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.2.2.2 yamt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.2.2.2 yamt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.2.2.2 yamt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.2.2.2 yamt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.2.2.2 yamt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.2.2.2 yamt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.2.2.2 yamt * POSSIBILITY OF SUCH DAMAGE. 30 1.2.2.2 yamt */ 31 1.2.2.2 yamt #include <sys/cdefs.h> 32 1.2.2.4 yamt #include <sys/param.h> 33 1.2.2.2 yamt #include <sys/types.h> 34 1.2.2.2 yamt 35 1.2.2.2 yamt #include <arm/imx/imx23_emireg.h> 36 1.2.2.2 yamt 37 1.2.2.2 yamt #include "common.h" 38 1.2.2.2 yamt 39 1.2.2.3 yamt static void init_dram_registers(void); 40 1.2.2.3 yamt static uint32_t get_dram_int_status(void); 41 1.2.2.2 yamt 42 1.2.2.4 yamt #define DRAM_REGS 41 43 1.2.2.4 yamt 44 1.2.2.4 yamt uint32_t dram_regs[DRAM_REGS] = { 45 1.2.2.4 yamt 0x01010001, 0x00010100, 0x01000101, 0x00000001, 46 1.2.2.4 yamt 0x00000101, 0x00000000, 0x00010000, 0x01000001, 47 1.2.2.4 yamt 0x00000000, 0x00000001, 0x07000200, 0x00070202, 48 1.2.2.4 yamt 0x02020000, 0x04040a01, 0x00000201, 0x02040000, 49 1.2.2.4 yamt 0x02000000, 0x19000f08, 0x0d0d0000, 0x02021313, 50 1.2.2.4 yamt 0x02061521, 0x0000000a, 0x00080008, 0x00200020, 51 1.2.2.4 yamt 0x00200020, 0x00200020, 0x000003f7, 0x00000000, 52 1.2.2.4 yamt 0x00000000, 0x00000020, 0x00000020, 0x00c80000, 53 1.2.2.4 yamt 0x000a23cd, 0x000000c8, 0x00006665, 0x00000000, 54 1.2.2.4 yamt 0x00000101, 0x00040001, 0x00000000, 0x00000000, 55 1.2.2.4 yamt 0x00010000 56 1.2.2.4 yamt }; 57 1.2.2.4 yamt 58 1.2.2.2 yamt /* 59 1.2.2.4 yamt * Initialize DRAM memory. 60 1.2.2.2 yamt */ 61 1.2.2.2 yamt int 62 1.2.2.2 yamt emi_prep(void) 63 1.2.2.2 yamt { 64 1.2.2.4 yamt uint32_t tmp_r; 65 1.2.2.4 yamt 66 1.2.2.4 yamt REG_WR(HW_EMI_CTRL_BASE + HW_EMI_CTRL_CLR, HW_EMI_CTRL_SFTRST); 67 1.2.2.4 yamt delay(10000); 68 1.2.2.4 yamt 69 1.2.2.4 yamt tmp_r = REG_RD(HW_DRAM_BASE + HW_DRAM_CTL08); 70 1.2.2.4 yamt tmp_r &= ~(HW_DRAM_CTL08_START | HW_DRAM_CTL08_SREFRESH); 71 1.2.2.4 yamt REG_WR(HW_DRAM_BASE + HW_DRAM_CTL08, tmp_r); 72 1.2.2.2 yamt 73 1.2.2.2 yamt init_dram_registers(); 74 1.2.2.2 yamt 75 1.2.2.4 yamt /* START */ 76 1.2.2.4 yamt tmp_r = REG_RD(HW_DRAM_BASE + HW_DRAM_CTL08); 77 1.2.2.4 yamt tmp_r |= HW_DRAM_CTL08_START; 78 1.2.2.4 yamt REG_WR(HW_DRAM_BASE + HW_DRAM_CTL08, tmp_r); 79 1.2.2.4 yamt 80 1.2.2.4 yamt delay(20000); 81 1.2.2.4 yamt 82 1.2.2.4 yamt /* 83 1.2.2.4 yamt * Set memory power-down with memory 84 1.2.2.4 yamt * clock gating mode (Mode 2). 85 1.2.2.4 yamt */ 86 1.2.2.4 yamt tmp_r = REG_RD(HW_DRAM_BASE + HW_DRAM_CTL16); 87 1.2.2.4 yamt tmp_r |= (1 << 19); 88 1.2.2.4 yamt REG_WR(HW_DRAM_BASE + HW_DRAM_CTL16, tmp_r); 89 1.2.2.4 yamt 90 1.2.2.4 yamt tmp_r = REG_RD(HW_DRAM_BASE + HW_DRAM_CTL16); 91 1.2.2.4 yamt tmp_r |= (1<<11); 92 1.2.2.4 yamt REG_WR(HW_DRAM_BASE + HW_DRAM_CTL16, tmp_r); 93 1.2.2.2 yamt 94 1.2.2.4 yamt /* Wait until DRAM initialization is complete. */ 95 1.2.2.4 yamt while(!(get_dram_int_status() & (1<<2))); 96 1.2.2.2 yamt 97 1.2.2.4 yamt delay(20000); 98 1.2.2.2 yamt 99 1.2.2.4 yamt return 0; 100 1.2.2.2 yamt } 101 1.2.2.2 yamt /* 102 1.2.2.4 yamt * Set DRAM register values. 103 1.2.2.2 yamt */ 104 1.2.2.3 yamt static void 105 1.2.2.4 yamt init_dram_registers(void) 106 1.2.2.2 yamt { 107 1.2.2.4 yamt volatile uint32_t *dram_r; 108 1.2.2.4 yamt int i; 109 1.2.2.2 yamt 110 1.2.2.4 yamt dram_r = (uint32_t *)(HW_DRAM_BASE); 111 1.2.2.3 yamt 112 1.2.2.4 yamt for (i=0; i < DRAM_REGS; i++) { 113 1.2.2.4 yamt /* Skip ctrl register 8, obsolete registers 27 and 28, 114 1.2.2.4 yamt * read only register 35 */ 115 1.2.2.4 yamt if (i == 8 || i == 27 || i == 28 || i == 35) 116 1.2.2.4 yamt continue; 117 1.2.2.4 yamt *(dram_r + i) = dram_regs[i]; 118 1.2.2.4 yamt } 119 1.2.2.4 yamt 120 1.2.2.4 yamt /* Set tRAS lockout on. */ 121 1.2.2.4 yamt *(dram_r + 8) |= HW_DRAM_CTL08_TRAS_LOCKOUT; 122 1.2.2.2 yamt 123 1.2.2.2 yamt return; 124 1.2.2.2 yamt } 125 1.2.2.2 yamt /* 126 1.2.2.2 yamt * Return DRAM controller interrupt status register. 127 1.2.2.2 yamt */ 128 1.2.2.3 yamt static uint32_t 129 1.2.2.2 yamt get_dram_int_status(void) 130 1.2.2.2 yamt { 131 1.2.2.2 yamt uint32_t reg; 132 1.2.2.3 yamt 133 1.2.2.3 yamt reg = REG_RD(HW_DRAM_BASE + HW_DRAM_CTL18); 134 1.2.2.2 yamt return __SHIFTOUT(reg, HW_DRAM_CTL18_INT_STATUS); 135 1.2.2.2 yamt } 136
Indexes created Wed Oct 22 13:09:56 GMT 2025