power_prep.c revision 1.3.6.2
1 1.3.6.2 tls /* $Id: power_prep.c,v 1.3.6.2 2013/02/25 00:28:38 tls Exp $ */ 2 1.3.6.2 tls 3 1.3.6.2 tls /* 4 1.3.6.2 tls * Copyright (c) 2012 The NetBSD Foundation, Inc. 5 1.3.6.2 tls * All rights reserved. 6 1.3.6.2 tls * 7 1.3.6.2 tls * This code is derived from software contributed to The NetBSD Foundation 8 1.3.6.2 tls * by Petri Laakso. 9 1.3.6.2 tls * 10 1.3.6.2 tls * Redistribution and use in source and binary forms, with or without 11 1.3.6.2 tls * modification, are permitted provided that the following conditions 12 1.3.6.2 tls * are met: 13 1.3.6.2 tls * 1. Redistributions of source code must retain the above copyright 14 1.3.6.2 tls * notice, this list of conditions and the following disclaimer. 15 1.3.6.2 tls * 2. Redistributions in binary form must reproduce the above copyright 16 1.3.6.2 tls * notice, this list of conditions and the following disclaimer in the 17 1.3.6.2 tls * documentation and/or other materials provided with the distribution. 18 1.3.6.2 tls * 19 1.3.6.2 tls * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.3.6.2 tls * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.3.6.2 tls * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.3.6.2 tls * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.3.6.2 tls * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.3.6.2 tls * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.3.6.2 tls * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.3.6.2 tls * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.3.6.2 tls * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.3.6.2 tls * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.3.6.2 tls * POSSIBILITY OF SUCH DAMAGE. 30 1.3.6.2 tls */ 31 1.3.6.2 tls 32 1.3.6.2 tls #include <sys/param.h> 33 1.3.6.2 tls #include <sys/types.h> 34 1.3.6.2 tls #include <sys/cdefs.h> 35 1.3.6.2 tls 36 1.3.6.2 tls #include <arm/imx/imx23_powerreg.h> 37 1.3.6.2 tls 38 1.3.6.2 tls #include <lib/libsa/stand.h> 39 1.3.6.2 tls 40 1.3.6.2 tls #include "common.h" 41 1.3.6.2 tls 42 1.3.6.2 tls static void set_vddd_target(uint8_t); 43 1.3.6.2 tls static void set_vdda_target(uint8_t); 44 1.3.6.2 tls static void set_vddio_target(uint8_t); 45 1.3.6.2 tls static void set_vddmem_target(uint8_t); 46 1.3.6.2 tls #ifdef DEBUG 47 1.3.6.2 tls static void print_regs(void); 48 1.3.6.2 tls #endif 49 1.3.6.2 tls 50 1.3.6.2 tls #define VDDD_TARGET 0x1e /* 1550 mV */ 51 1.3.6.2 tls #define VDDA_TARGET 0x0a /* 1750 mV */ 52 1.3.6.2 tls #define VDDIO_TARGET 0x0c /* 3100 mV */ 53 1.3.6.2 tls #define VDDMEM_TARGET 0x10 /* 2500 mV */ 54 1.3.6.2 tls 55 1.3.6.2 tls static int five_volts = 0; 56 1.3.6.2 tls 57 1.3.6.2 tls /* 58 1.3.6.2 tls * If 5V is present, all power rails are powered from the LinRegs. 59 1.3.6.2 tls * 60 1.3.6.2 tls * If powered from the battery, the DC-DC converter starts when battery power 61 1.3.6.2 tls * is detected and the PSWITCH button is pressed. In this state, the VDDA and 62 1.3.6.2 tls * VDDIO rails are powered on from DC-DC, but the VDDD rail is powered from its 63 1.3.6.2 tls * LinReg. 64 1.3.6.2 tls */ 65 1.3.6.2 tls int 66 1.3.6.2 tls power_prep(void) 67 1.3.6.2 tls { 68 1.3.6.2 tls if (REG_RD(HW_POWER_BASE + HW_POWER_STS) & HW_POWER_STS_VDD5V_GT_VDDIO) 69 1.3.6.2 tls five_volts = 1; 70 1.3.6.2 tls #ifdef DEBUG 71 1.3.6.2 tls if (five_volts) 72 1.3.6.2 tls printf("Powered from 5V\n\r"); 73 1.3.6.2 tls else 74 1.3.6.2 tls printf("Powered from the battery.\n\r"); 75 1.3.6.2 tls print_regs(); 76 1.3.6.2 tls #endif 77 1.3.6.2 tls set_vddd_target(VDDD_TARGET); 78 1.3.6.2 tls set_vdda_target(VDDA_TARGET); 79 1.3.6.2 tls set_vddio_target(VDDIO_TARGET); 80 1.3.6.2 tls set_vddmem_target(VDDMEM_TARGET); 81 1.3.6.2 tls #ifdef DEBUG 82 1.3.6.2 tls print_regs(); 83 1.3.6.2 tls #endif 84 1.3.6.2 tls return 0; 85 1.3.6.2 tls } 86 1.3.6.2 tls 87 1.3.6.2 tls /* 88 1.3.6.2 tls * Set VDDD target voltage. 89 1.3.6.2 tls */ 90 1.3.6.2 tls static void 91 1.3.6.2 tls set_vddd_target(uint8_t target) 92 1.3.6.2 tls { 93 1.3.6.2 tls uint32_t vddd; 94 1.3.6.2 tls uint8_t curtrg; 95 1.3.6.2 tls 96 1.3.6.2 tls vddd = REG_RD(HW_POWER_BASE + HW_POWER_VDDDCTRL); 97 1.3.6.2 tls 98 1.3.6.2 tls /* 99 1.3.6.2 tls * VDDD is always powered from the linear regulator. 100 1.3.6.2 tls * 101 1.3.6.2 tls * Setting LINREG_OFFSET to 0 is recommended when powering VDDD from 102 1.3.6.2 tls * the linear regulator. It is also recommended to set DISABLE_STEPPING 103 1.3.6.2 tls * when powering VDDD from the linear regulators. 104 1.3.6.2 tls */ 105 1.3.6.2 tls vddd &= ~(HW_POWER_VDDDCTRL_LINREG_OFFSET); 106 1.3.6.2 tls vddd |= HW_POWER_VDDDCTRL_DISABLE_STEPPING; 107 1.3.6.2 tls 108 1.3.6.2 tls REG_WR(HW_POWER_BASE + HW_POWER_VDDDCTRL, vddd); 109 1.3.6.2 tls delay(1000); 110 1.3.6.2 tls 111 1.3.6.2 tls curtrg = __SHIFTOUT(vddd, HW_POWER_VDDDCTRL_TRG); 112 1.3.6.2 tls 113 1.3.6.2 tls /* Because HW stepping is disabled, raise voltage to target slowly. */ 114 1.3.6.2 tls for (curtrg++; curtrg <= target; curtrg++) { 115 1.3.6.2 tls vddd = REG_RD(HW_POWER_BASE + HW_POWER_VDDDCTRL); 116 1.3.6.2 tls vddd &= ~(HW_POWER_VDDDCTRL_TRG); 117 1.3.6.2 tls vddd |= __SHIFTIN(curtrg, HW_POWER_VDDDCTRL_TRG); 118 1.3.6.2 tls REG_WR(HW_POWER_BASE + HW_POWER_VDDDCTRL, vddd); 119 1.3.6.2 tls delay(1000); 120 1.3.6.2 tls } 121 1.3.6.2 tls 122 1.3.6.2 tls return; 123 1.3.6.2 tls } 124 1.3.6.2 tls 125 1.3.6.2 tls static void 126 1.3.6.2 tls set_vdda_target(uint8_t target) 127 1.3.6.2 tls { 128 1.3.6.2 tls uint32_t vdda; 129 1.3.6.2 tls uint8_t curtrg; 130 1.3.6.2 tls 131 1.3.6.2 tls vdda = REG_RD(HW_POWER_BASE + HW_POWER_VDDACTRL); 132 1.3.6.2 tls 133 1.3.6.2 tls /* 134 1.3.6.2 tls * Setting LINREG_OFFSET to 0 is recommended when powering VDDA from 135 1.3.6.2 tls * the linear regulator. It is also recommended to set DISABLE_STEPPING 136 1.3.6.2 tls * when powering VDDA from the linear regulators. 137 1.3.6.2 tls */ 138 1.3.6.2 tls if (five_volts) { 139 1.3.6.2 tls vdda &= ~(HW_POWER_VDDACTRL_LINREG_OFFSET); 140 1.3.6.2 tls vdda |= HW_POWER_VDDACTRL_DISABLE_STEPPING; 141 1.3.6.2 tls REG_WR(HW_POWER_BASE + HW_POWER_VDDACTRL, vdda); 142 1.3.6.2 tls delay(1000); 143 1.3.6.2 tls 144 1.3.6.2 tls curtrg = __SHIFTOUT(vdda, HW_POWER_VDDACTRL_TRG); 145 1.3.6.2 tls 146 1.3.6.2 tls /* 147 1.3.6.2 tls * Because HW stepping is disabled, raise voltage to target 148 1.3.6.2 tls * slowly. 149 1.3.6.2 tls */ 150 1.3.6.2 tls for (curtrg++; curtrg <= target; curtrg++) { 151 1.3.6.2 tls vdda = REG_RD(HW_POWER_BASE + HW_POWER_VDDACTRL); 152 1.3.6.2 tls vdda &= ~(HW_POWER_VDDACTRL_TRG); 153 1.3.6.2 tls vdda |= __SHIFTIN(curtrg, HW_POWER_VDDACTRL_TRG); 154 1.3.6.2 tls REG_WR(HW_POWER_BASE + HW_POWER_VDDACTRL, vdda); 155 1.3.6.2 tls delay(1000); 156 1.3.6.2 tls } 157 1.3.6.2 tls } else { 158 1.3.6.2 tls vdda |= __SHIFTIN(target, HW_POWER_VDDACTRL_TRG); 159 1.3.6.2 tls REG_WR(HW_POWER_BASE + HW_POWER_VDDACTRL, vdda); 160 1.3.6.2 tls } 161 1.3.6.2 tls 162 1.3.6.2 tls return; 163 1.3.6.2 tls } 164 1.3.6.2 tls 165 1.3.6.2 tls static void 166 1.3.6.2 tls set_vddio_target(uint8_t target) 167 1.3.6.2 tls { 168 1.3.6.2 tls uint32_t vddio; 169 1.3.6.2 tls uint8_t curtrg; 170 1.3.6.2 tls 171 1.3.6.2 tls vddio = REG_RD(HW_POWER_BASE + HW_POWER_VDDIOCTRL); 172 1.3.6.2 tls 173 1.3.6.2 tls /* 174 1.3.6.2 tls * Setting LINREG_OFFSET to 0 is recommended when powering VDDIO from 175 1.3.6.2 tls * the linear regulator. It is also recommended to set DISABLE_STEPPING 176 1.3.6.2 tls * when powering VDDIO from the linear regulators. 177 1.3.6.2 tls */ 178 1.3.6.2 tls if (five_volts) { 179 1.3.6.2 tls vddio &= ~(HW_POWER_VDDIOCTRL_LINREG_OFFSET); 180 1.3.6.2 tls vddio |= HW_POWER_VDDIOCTRL_DISABLE_STEPPING; 181 1.3.6.2 tls REG_WR(HW_POWER_BASE + HW_POWER_VDDIOCTRL, vddio); 182 1.3.6.2 tls delay(1000); 183 1.3.6.2 tls 184 1.3.6.2 tls curtrg = __SHIFTOUT(vddio, HW_POWER_VDDIOCTRL_TRG); 185 1.3.6.2 tls 186 1.3.6.2 tls /* 187 1.3.6.2 tls * Because HW stepping is disabled, raise voltage to target 188 1.3.6.2 tls * slowly. 189 1.3.6.2 tls */ 190 1.3.6.2 tls for (curtrg++; curtrg <= target; curtrg++) { 191 1.3.6.2 tls vddio = REG_RD(HW_POWER_BASE + HW_POWER_VDDIOCTRL); 192 1.3.6.2 tls vddio &= ~(HW_POWER_VDDIOCTRL_TRG); 193 1.3.6.2 tls vddio |= __SHIFTIN(curtrg, HW_POWER_VDDIOCTRL_TRG); 194 1.3.6.2 tls REG_WR(HW_POWER_BASE + HW_POWER_VDDIOCTRL, vddio); 195 1.3.6.2 tls delay(1000); 196 1.3.6.2 tls } 197 1.3.6.2 tls } else { 198 1.3.6.2 tls vddio |= __SHIFTIN(target, HW_POWER_VDDIOCTRL_TRG); 199 1.3.6.2 tls REG_WR(HW_POWER_BASE + HW_POWER_VDDIOCTRL, vddio); 200 1.3.6.2 tls } 201 1.3.6.2 tls 202 1.3.6.2 tls return; 203 1.3.6.2 tls } 204 1.3.6.2 tls 205 1.3.6.2 tls static void 206 1.3.6.2 tls set_vddmem_target(uint8_t target) 207 1.3.6.2 tls { 208 1.3.6.2 tls uint32_t vddmem; 209 1.3.6.2 tls 210 1.3.6.2 tls /* Set target. */ 211 1.3.6.2 tls vddmem = REG_RD(HW_POWER_BASE + HW_POWER_VDDMEMCTRL); 212 1.3.6.2 tls vddmem &= ~(HW_POWER_VDDMEMCTRL_TRG); 213 1.3.6.2 tls vddmem |= __SHIFTIN(target, HW_POWER_VDDMEMCTRL_TRG); 214 1.3.6.2 tls REG_WR(HW_POWER_BASE + HW_POWER_VDDMEMCTRL, vddmem); 215 1.3.6.2 tls delay(1000); 216 1.3.6.2 tls 217 1.3.6.2 tls /* Enable VDDMEM */ 218 1.3.6.2 tls vddmem = REG_RD(HW_POWER_BASE + HW_POWER_VDDMEMCTRL); 219 1.3.6.2 tls vddmem |= (HW_POWER_VDDMEMCTRL_PULLDOWN_ACTIVE | 220 1.3.6.2 tls HW_POWER_VDDMEMCTRL_ENABLE_ILIMIT | 221 1.3.6.2 tls HW_POWER_VDDMEMCTRL_ENABLE_LINREG); 222 1.3.6.2 tls REG_WR(HW_POWER_BASE + HW_POWER_VDDMEMCTRL, vddmem); 223 1.3.6.2 tls delay(500); 224 1.3.6.2 tls vddmem &= ~(HW_POWER_VDDMEMCTRL_PULLDOWN_ACTIVE | 225 1.3.6.2 tls HW_POWER_VDDMEMCTRL_ENABLE_ILIMIT); 226 1.3.6.2 tls REG_WR(HW_POWER_BASE + HW_POWER_VDDMEMCTRL, vddmem); 227 1.3.6.2 tls 228 1.3.6.2 tls return; 229 1.3.6.2 tls } 230 1.3.6.2 tls #ifdef DEBUG 231 1.3.6.2 tls #define PRINT_REG(REG) \ 232 1.3.6.2 tls printf(#REG "\t%x\n\r", REG_RD(HW_POWER_BASE + REG)); 233 1.3.6.2 tls 234 1.3.6.2 tls static void 235 1.3.6.2 tls print_regs(void) 236 1.3.6.2 tls { 237 1.3.6.2 tls PRINT_REG(HW_POWER_CTRL); 238 1.3.6.2 tls PRINT_REG(HW_POWER_5VCTRL); 239 1.3.6.2 tls PRINT_REG(HW_POWER_MINPWR); 240 1.3.6.2 tls PRINT_REG(HW_POWER_CHARGE); 241 1.3.6.2 tls PRINT_REG(HW_POWER_VDDDCTRL); 242 1.3.6.2 tls PRINT_REG(HW_POWER_VDDACTRL); 243 1.3.6.2 tls PRINT_REG(HW_POWER_VDDIOCTRL); 244 1.3.6.2 tls PRINT_REG(HW_POWER_VDDMEMCTRL); 245 1.3.6.2 tls PRINT_REG(HW_POWER_DCDC4P2); 246 1.3.6.2 tls PRINT_REG(HW_POWER_MISC); 247 1.3.6.2 tls PRINT_REG(HW_POWER_DCLIMITS); 248 1.3.6.2 tls PRINT_REG(HW_POWER_LOOPCTRL); 249 1.3.6.2 tls PRINT_REG(HW_POWER_STS); 250 1.3.6.2 tls PRINT_REG(HW_POWER_SPEED); 251 1.3.6.2 tls PRINT_REG(HW_POWER_BATTMONITOR); 252 1.3.6.2 tls PRINT_REG(HW_POWER_RESET); 253 1.3.6.2 tls PRINT_REG(HW_POWER_DEBUG); 254 1.3.6.2 tls PRINT_REG(HW_POWER_SPECIAL); 255 1.3.6.2 tls PRINT_REG(HW_POWER_VERSION); 256 1.3.6.2 tls 257 1.3.6.2 tls return; 258 1.3.6.2 tls } 259 1.3.6.2 tls #endif 260
Indexes created Fri Oct 17 09:09:57 GMT 2025