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tslcd.c revision 1.2
      1 /* $NetBSD: tslcd.c,v 1.2 2005/01/09 15:48:51 joff Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jesse Off.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *	This product includes software developed by the NetBSD
     21  *	Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 #include <sys/cdefs.h>
     39 __KERNEL_RCSID(0, "$NetBSD: tslcd.c,v 1.2 2005/01/09 15:48:51 joff Exp $");
     40 
     41 #include <sys/param.h>
     42 #include <sys/systm.h>
     43 #include <sys/proc.h>
     44 #include <sys/poll.h>
     45 #include <sys/conf.h>
     46 #include <sys/uio.h>
     47 #include <sys/types.h>
     48 #include <sys/kernel.h>
     49 #include <sys/device.h>
     50 #include <sys/callout.h>
     51 #include <sys/select.h>
     52 #include <sys/conf.h>
     53 
     54 #include <machine/bus.h>
     55 #include <machine/autoconf.h>
     56 
     57 #include <arm/ep93xx/ep93xxreg.h>
     58 #include <dev/ic/hd44780reg.h>
     59 #include <dev/ic/hd44780_subr.h>
     60 #include <evbarm/tsarm/tspldvar.h>
     61 #include <evbarm/tsarm/tsarmreg.h>
     62 
     63 struct tslcd_softc {
     64 	struct device sc_dev;
     65 	struct hd44780_chip sc_lcd;
     66 	bus_space_tag_t sc_iot;
     67 	bus_space_handle_t sc_gpioh;
     68 };
     69 
     70 static int	tslcd_match(struct device *, struct cfdata *, void *);
     71 static void	tslcd_attach(struct device *, struct device *, void *);
     72 
     73 static void	tslcd_writereg(struct hd44780_chip *, u_int32_t, u_int8_t);
     74 static u_int8_t	tslcd_readreg(struct hd44780_chip *, u_int32_t);
     75 
     76 dev_type_open(tslcdopen);
     77 dev_type_close(tslcdclose);
     78 dev_type_read(tslcdread);
     79 dev_type_write(tslcdwrite);
     80 dev_type_ioctl(tslcdioctl);
     81 dev_type_poll(tslcdpoll);
     82 
     83 const struct cdevsw tslcd_cdevsw = {
     84 	tslcdopen, tslcdclose, tslcdread, tslcdwrite, tslcdioctl,
     85 	nostop, notty, tslcdpoll, nommap,
     86 };
     87 
     88 extern struct cfdriver tslcd_cd;
     89 
     90 CFATTACH_DECL(tslcd, sizeof(struct tslcd_softc),
     91     tslcd_match, tslcd_attach, NULL, NULL);
     92 
     93 static int
     94 tslcd_match(parent, match, aux)
     95 	struct device *parent;
     96 	struct cfdata *match;
     97 	void *aux;
     98 {
     99 	return 1;
    100 }
    101 
    102 #define GPIO_GET(x)	bus_space_read_1(sc->sc_iot, sc->sc_gpioh, \
    103 	(EP93XX_GPIO_ ## x))
    104 
    105 #define GPIO_SET(x, y)	bus_space_write_1(sc->sc_iot, sc->sc_gpioh, \
    106 	(EP93XX_GPIO_ ## x), (y))
    107 
    108 #define GPIO_SETBITS(x, y)	bus_space_write_1(sc->sc_iot, sc->sc_gpioh, \
    109 	(EP93XX_GPIO_ ## x), GPIO_GET(x) | (y))
    110 
    111 #define GPIO_CLEARBITS(x, y)	bus_space_write_1(sc->sc_iot, sc->sc_gpioh, \
    112 	(EP93XX_GPIO_ ## x), GPIO_GET(x) & (~(y)))
    113 
    114 static void
    115 tslcd_attach(parent, self, aux)
    116 	struct device *parent;
    117 	struct device *self;
    118 	void *aux;
    119 {
    120 	struct tslcd_softc *sc = (void *)self;
    121 	struct tspld_attach_args *taa = aux;
    122 
    123 	sc->sc_iot = taa->ta_iot;
    124 	if (bus_space_map(sc->sc_iot, EP93XX_APB_HWBASE + EP93XX_APB_GPIO,
    125 		EP93XX_APB_GPIO_SIZE, 0, &sc->sc_gpioh))
    126 		panic("tslcd_attach: couldn't map GPIO registers");
    127 
    128 	sc->sc_lcd.sc_dev_ok = 1;
    129 	sc->sc_lcd.sc_rows = 24;
    130 	sc->sc_lcd.sc_vrows = 40;
    131 	sc->sc_lcd.sc_flags = HD_8BIT | HD_MULTILINE;
    132 	sc->sc_lcd.sc_dev = self;
    133 
    134 	sc->sc_lcd.sc_writereg = tslcd_writereg;
    135 	sc->sc_lcd.sc_readreg = tslcd_readreg;
    136 
    137 	GPIO_SET(PADDR, 0);		/* Port A to inputs */
    138 	GPIO_SETBITS(PHDDR, 0x38);	/* Bits 3:5 of Port H to outputs */
    139 	GPIO_CLEARBITS(PHDR, 0x18);	/* De-assert EN, De-assert RS */
    140 
    141 	printf("\n");
    142 
    143 	hd44780_attach_subr(&sc->sc_lcd);
    144 }
    145 
    146 static void
    147 tslcd_writereg(hd, rs, cmd)
    148 	struct hd44780_chip *hd;
    149 	u_int32_t rs;
    150 	u_int8_t cmd;
    151 {
    152 	struct tslcd_softc *sc = (struct tslcd_softc *)hd->sc_dev;
    153 	u_int8_t ctrl;
    154 
    155 	if (hd->sc_dev_ok == 0)
    156 		return;
    157 
    158 	/* Step 1: Apply RS & WR, Send data */
    159 	ctrl = GPIO_GET(PHDR);
    160 	GPIO_SET(PADDR, 0xff); /* set port A to outputs */
    161 	GPIO_SET(PADR, cmd);
    162 	if (rs) {
    163 		ctrl |= 0x10;	/* assert RS */
    164 		ctrl &= ~0x20;	/* assert WR */
    165 	} else {
    166 		ctrl &= ~0x30;	/* de-assert WR, de-assert RS */
    167 	}
    168 	GPIO_SET(PHDR, ctrl);
    169 
    170 	/* Step 2: setup time delay */
    171 	delay(1);
    172 
    173 	/* Step 3: assert EN */
    174 	ctrl |= 0x8;
    175 	GPIO_SET(PHDR, ctrl);
    176 
    177 	/* Step 4: pulse time delay */
    178 	delay(1);
    179 
    180 	/* Step 5: de-assert EN */
    181 	ctrl &= ~0x8;
    182 	GPIO_SET(PHDR, ctrl);
    183 
    184 	/* Step 6: hold time delay */
    185 	delay(1);
    186 
    187 	/* Step 7: de-assert WR */
    188 	ctrl |= 0x2;
    189 	GPIO_SET(PHDR, ctrl);
    190 
    191 	/* Step 8: minimum delay till next bus-cycle */
    192 	delay(1000);
    193 }
    194 
    195 static u_int8_t
    196 tslcd_readreg(hd, rs)
    197 	struct hd44780_chip *hd;
    198 	u_int32_t rs;
    199 {
    200 	struct tslcd_softc *sc = (struct tslcd_softc *)hd->sc_dev;
    201 	u_int8_t ret, ctrl;
    202 
    203 	if (hd->sc_dev_ok == 0)
    204 		return 0;
    205 
    206 	/* Step 1: Apply RS & WR, Send data */
    207 	ctrl = GPIO_GET(PHDR);
    208 	GPIO_SET(PADDR, 0x0);	/* set port A to inputs */
    209 	if (rs) {
    210 		ctrl |= 0x30;	/* de-assert WR, assert RS */
    211 	} else {
    212 		ctrl |= 0x20;	/* de-assert WR */
    213 		ctrl &= ~0x10;	/* de-assert RS */
    214 	}
    215 	GPIO_SET(PHDR, ctrl);
    216 
    217 	/* Step 2: setup time delay */
    218 	delay(1);
    219 
    220 	/* Step 3: assert EN */
    221 	ctrl |= 0x8;
    222 	GPIO_SET(PHDR, ctrl);
    223 
    224 	/* Step 4: pulse time delay */
    225 	delay(1);
    226 
    227 	/* Step 5: de-assert EN */
    228 	ret = GPIO_GET(PADR) & 0xff;
    229 	ctrl &= ~0x8;
    230 	GPIO_SET(PHDR, ctrl);
    231 
    232 	/* Step 6: hold time delay + min bus cycle interval*/
    233 	delay(1000);
    234 	return ret;
    235 }
    236 
    237 int
    238 tslcdopen(dev, flag, mode, p)
    239 	dev_t dev;
    240 	int flag, mode;
    241 	struct proc *p;
    242 {
    243 	struct tslcd_softc *sc = device_lookup(&tslcd_cd, minor(dev));
    244 
    245 	if (sc->sc_lcd.sc_dev_ok == 0)
    246 		return hd44780_init(&sc->sc_lcd);
    247 	else
    248 		return 0;
    249 }
    250 
    251 int
    252 tslcdclose(dev, flag, mode, p)
    253 	dev_t dev;
    254 	int flag, mode;
    255 	struct proc *p;
    256 {
    257 	return 0;
    258 }
    259 
    260 int
    261 tslcdread(dev, uio, flag)
    262 	dev_t dev;
    263 	struct uio *uio;
    264 	int flag;
    265 {
    266 	return EIO;
    267 }
    268 
    269 int
    270 tslcdwrite(dev, uio, flag)
    271 	dev_t dev;
    272 	struct uio *uio;
    273 	int flag;
    274 {
    275 	int error;
    276 	struct hd44780_io io;
    277 	struct tslcd_softc *sc = device_lookup(&tslcd_cd, minor(dev));
    278 
    279 	if (sc->sc_lcd.sc_dev_ok == 0)
    280 		return EIO;
    281 
    282 	io.dat = 0;
    283 	io.len = uio->uio_resid;
    284 	if (io.len > HD_MAX_CHARS)
    285 		io.len = HD_MAX_CHARS;
    286 
    287 	if ((error = uiomove((void*)io.buf, io.len, uio)) != 0)
    288 		return error;
    289 
    290 	hd44780_ddram_redraw(&sc->sc_lcd, &io);
    291 	return 0;
    292 }
    293 
    294 int
    295 tslcdioctl(dev, cmd, data, flag, p)
    296 	dev_t dev;
    297 	u_long cmd;
    298 	caddr_t data;
    299 	int flag;
    300 	struct proc *p;
    301 {
    302 	struct tslcd_softc *sc = device_lookup(&tslcd_cd, minor(dev));
    303 	return hd44780_ioctl_subr(&sc->sc_lcd, cmd, data);
    304 }
    305 
    306 int
    307 tslcdpoll(dev, events, p)
    308 	dev_t dev;
    309 	int events;
    310 	struct proc *p;
    311 {
    312 	return 0;
    313 }
    314