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machdep.c revision 1.5.2.1
      1 /* $NetBSD: machdep.c,v 1.5.2.1 2008/07/03 18:37:53 simonb Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or
      8  * without modification, are permitted provided that the following
      9  * conditions are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above
     13  *    copyright notice, this list of conditions and the following
     14  *    disclaimer in the documentation and/or other materials provided
     15  *    with the distribution.
     16  * 3. The names of the authors may not be used to endorse or promote
     17  *    products derived from this software without specific prior
     18  *    written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
     21  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     22  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
     23  * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS
     24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
     25  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     26  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
     27  * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
     29  * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
     30  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
     31  * OF SUCH DAMAGE.
     32  */
     33 /*
     34  * Copyright (c) 1992, 1993
     35  *	The Regents of the University of California.  All rights reserved.
     36  *
     37  * This code is derived from software contributed to Berkeley by
     38  * the Systems Programming Group of the University of Utah Computer
     39  * Science Department, The Mach Operating System project at
     40  * Carnegie-Mellon University and Ralph Campbell.
     41  *
     42  * Redistribution and use in source and binary forms, with or without
     43  * modification, are permitted provided that the following conditions
     44  * are met:
     45  * 1. Redistributions of source code must retain the above copyright
     46  *    notice, this list of conditions and the following disclaimer.
     47  * 2. Redistributions in binary form must reproduce the above copyright
     48  *    notice, this list of conditions and the following disclaimer in the
     49  *    documentation and/or other materials provided with the distribution.
     50  * 3. Neither the name of the University nor the names of its contributors
     51  *    may be used to endorse or promote products derived from this software
     52  *    without specific prior written permission.
     53  *
     54  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     55  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     56  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     57  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     58  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     59  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     60  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     61  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     62  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     63  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     64  * SUCH DAMAGE.
     65  *
     66  *	@(#)machdep.c	8.3 (Berkeley) 1/12/94
     67  * 	from: Utah Hdr: machdep.c 1.63 91/04/24
     68  */
     69 /*
     70  * Copyright (c) 1988 University of Utah.
     71  *
     72  * This code is derived from software contributed to Berkeley by
     73  * the Systems Programming Group of the University of Utah Computer
     74  * Science Department, The Mach Operating System project at
     75  * Carnegie-Mellon University and Ralph Campbell.
     76  *
     77  * Redistribution and use in source and binary forms, with or without
     78  * modification, are permitted provided that the following conditions
     79  * are met:
     80  * 1. Redistributions of source code must retain the above copyright
     81  *    notice, this list of conditions and the following disclaimer.
     82  * 2. Redistributions in binary form must reproduce the above copyright
     83  *    notice, this list of conditions and the following disclaimer in the
     84  *    documentation and/or other materials provided with the distribution.
     85  * 3. All advertising materials mentioning features or use of this software
     86  *    must display the following acknowledgement:
     87  *	This product includes software developed by the University of
     88  *	California, Berkeley and its contributors.
     89  * 4. Neither the name of the University nor the names of its contributors
     90  *    may be used to endorse or promote products derived from this software
     91  *    without specific prior written permission.
     92  *
     93  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     94  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     95  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     96  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     97  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     98  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     99  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    100  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    101  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    102  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    103  * SUCH DAMAGE.
    104  *
    105  *	@(#)machdep.c	8.3 (Berkeley) 1/12/94
    106  * 	from: Utah Hdr: machdep.c 1.63 91/04/24
    107  */
    108 
    109 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
    110 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.5.2.1 2008/07/03 18:37:53 simonb Exp $");
    111 
    112 #include "opt_ddb.h"
    113 #include "opt_kgdb.h"
    114 
    115 #include "opt_memsize.h"
    116 #include "opt_ethaddr.h"
    117 
    118 #include "opt_pci.h"
    119 #include "pci.h"
    120 
    121 #include <sys/param.h>
    122 #include <sys/systm.h>
    123 #include <sys/kernel.h>
    124 #include <sys/buf.h>
    125 #include <sys/reboot.h>
    126 #include <sys/user.h>
    127 #include <sys/mount.h>
    128 #include <sys/kcore.h>
    129 #include <sys/boot_flag.h>
    130 #include <sys/termios.h>
    131 #include <sys/ksyms.h>
    132 
    133 #include <net/if.h>
    134 #include <net/if_ether.h>
    135 
    136 #include <uvm/uvm_extern.h>
    137 
    138 #include <dev/cons.h>
    139 
    140 #include "ksyms.h"
    141 
    142 #if NKSYMS || defined(DDB) || defined(LKM)
    143 #include <machine/db_machdep.h>
    144 #include <ddb/db_extern.h>
    145 #endif
    146 
    147 #include <mips/cache.h>
    148 #include <mips/locore.h>
    149 
    150 #include <mips/adm5120/include/adm5120reg.h>
    151 #include <mips/adm5120/include/adm5120var.h>
    152 #include <mips/adm5120/include/adm5120_extiovar.h>
    153 #include <mips/adm5120/include/adm5120_obiovar.h>
    154 #include <mips/adm5120/include/adm5120_mainbusvar.h>
    155 #include <mips/adm5120/include/adm5120_pcivar.h>
    156 #include <mips/adm5120/dev/uart.h>
    157 
    158 #ifndef	MEMSIZE
    159 #define	MEMSIZE 4 * 1024 * 1024
    160 #endif /* !MEMSIZE */
    161 
    162 struct	user *proc0paddr;
    163 
    164 /* Our exported CPU info; we can have only one. */
    165 struct cpu_info cpu_info_store;
    166 
    167 /* Maps for VM objects. */
    168 struct vm_map *mb_map = NULL;
    169 struct vm_map *phys_map = NULL;
    170 
    171 int physmem;		/* # pages of physical memory */
    172 int maxmem;			/* max memory per process */
    173 
    174 int mem_cluster_cnt;
    175 phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
    176 
    177 struct adm5120_config adm5120_configuration;
    178 
    179 void adm5120_setcpufreq(void);
    180 
    181 void
    182 adm5120_setcpufreq(void)
    183 {
    184 	uint32_t v, freq;
    185 
    186 	v = SW_READ(SW_CODE_REG);
    187 	switch (v & CLKS_MASK) {
    188 	case CLKS_175MHZ:
    189 		freq = 175 * 1000 * 1000;
    190 		break;
    191 	case CLKS_200MHZ:
    192 		freq = 200 * 1000 * 1000;
    193 		break;
    194 	default:
    195 		panic("adm5120: cannot determine CPU clock speed");
    196 	}
    197 
    198 	curcpu()->ci_cpu_freq = freq;
    199 	curcpu()->ci_cycles_per_hz = (freq + hz / 2) / hz / 2;
    200 	curcpu()->ci_divisor_delay = ((freq + 500000) / 1000000) / 2;
    201 }
    202 
    203 void	mach_init(int, char **, void *, void *); /* XXX */
    204 
    205 static void
    206 copy_args(int argc, char **argv)
    207 {
    208 	struct adm5120_config *admc = &adm5120_configuration;
    209 	int i;
    210 	char *buf;
    211 	size_t buflen, rc;
    212 
    213 	buf = admc->args;
    214 	buflen = sizeof(admc->args);
    215 
    216 	if (argc >= __arraycount(admc->argv))
    217 		panic("%s: too many boot args\n", __func__);
    218 
    219 	for (i = 0; buflen > 0 && i < argc && argv[i] != NULL; i++) {
    220 		admc->argv[i] = buf;
    221 		if ((rc = strlcpy(buf, argv[i], buflen)) >= buflen)
    222 			panic("%s: boot args too long\n", __func__);
    223 
    224 		buf += rc;
    225 		buflen -= rc;
    226 		*buf++ = '\0';
    227 		buflen--;
    228 	}
    229 	if (i < argc)
    230 		panic("%s: boot args too long\n", __func__);
    231 
    232 	admc->argc = argc;
    233 }
    234 
    235 static void
    236 parse_args(prop_dictionary_t properties, int argc, char **argv,
    237     uint32_t *memsizep)
    238 {
    239 	char buf[32];
    240 	char *key, *val, *valend;
    241 	unsigned long tmp;
    242 	int i;
    243 	uint8_t enaddr[ETHER_ADDR_LEN];
    244 
    245 	if (memsizep != NULL)
    246 		*memsizep = MEMSIZE;
    247 
    248 	for (i = 0; i < argc && argv[i] != NULL; i++) {
    249 		if (strlcpy(buf, argv[i], sizeof(buf)) >= sizeof(buf))
    250 			goto err;
    251 		val = buf;
    252 		key = strsep(&val, "=");
    253 		if (val == NULL)
    254 			goto err;
    255 		if (strcmp(key, "mem") == 0) {
    256 			tmp = strtoul(val, &valend, 10);
    257 			if (val == valend || *valend != 'M')
    258 				goto err;
    259 			if (memsizep != NULL)
    260 				*memsizep = tmp * 1024 * 1024;
    261 		} else if (strcmp(key, "HZ") == 0)
    262 			;
    263 		else if (strcmp(key, "gpio") == 0) {
    264 			prop_number_t pn;
    265 
    266 			tmp = strtoul(val, &valend, 10);
    267 			if (val == valend || *valend != '\0')
    268 				goto err;
    269 			if (properties == NULL)
    270 				continue;
    271 			pn = prop_number_create_unsigned_integer(tmp);
    272 			if (pn == NULL) {
    273 				printf(
    274 				   "%s: prop_number_create_unsigned_integer\n",
    275 				   __func__);
    276 				continue;
    277 			}
    278 			if (!prop_dictionary_set(properties, "initial-gpio",
    279 			    pn)) {
    280 				printf("%s: prop_dictionary_set(gpio)\n",
    281 				    __func__);
    282 			}
    283 			prop_object_release(pn);
    284 		} else if (strcmp(key, "kmac") == 0) {
    285 			prop_data_t pd;
    286 
    287 			ether_nonstatic_aton(enaddr, val);
    288 			if (properties == NULL)
    289 				continue;
    290 			pd = prop_data_create_data(enaddr, sizeof(enaddr));
    291 			if (pd == NULL) {
    292 				printf("%s: prop_data_create_data\n", __func__);
    293 				continue;
    294 			}
    295 			if (!prop_dictionary_set(properties, "mac-addr", pd)) {
    296 				printf("%s: prop_dictionary_set(mac)\n",
    297 				    __func__);
    298 			}
    299 			prop_object_release(pd);
    300 		} else if (strcmp(key, "board") == 0)
    301 			printf("Routerboard %s\n", val);
    302 		else if (strcmp(key, "boot") == 0)
    303 			;
    304 		continue;
    305 	err:
    306 		printf("bad argv[%d] (%s)\n", i, argv[i]);
    307 	}
    308 }
    309 
    310 void
    311 mach_init(int argc, char **argv, void *a2, void *a3)
    312 {
    313 	struct adm5120_config *admc = &adm5120_configuration;
    314 	uint32_t memsize;
    315 	vaddr_t kernend;
    316 	u_long first, last;
    317 	vaddr_t v;
    318 
    319 	extern char edata[], end[];	/* XXX */
    320 
    321 	/* clear the BSS segment */
    322 	kernend = mips_round_page(end);
    323 	memset(edata, 0, kernend - (vaddr_t)edata);
    324 
    325 	/* set CPU model info for sysctl_hw */
    326 	strcpy(cpu_model, "Infineon ADM5120");
    327 
    328 	/*
    329 	 * Set up the exception vectors and CPU-specific function
    330 	 * vectors early on.  We need the wbflush() vector set up
    331 	 * before comcnattach() is called (or at least before the
    332 	 * first printf() after that is called).
    333 	 * Sets up mips_cpu_flags that may be queried by other
    334 	 * functions called during startup.
    335 	 * Also clears the I+D caches.
    336 	 */
    337 	mips_vector_init();
    338 
    339 	/*
    340 	 * Set the VM page size.
    341 	 */
    342 	uvm_setpagesize();
    343 
    344 	adm5120_setcpufreq();
    345 
    346 	/*
    347 	 * Initialize bus space tags.
    348 	 */
    349 	obio_bus_mem_init(&admc->obio_space, admc);
    350 	extio_bus_mem_init(&admc->extio_space, admc);
    351 #if NPCI > 0
    352 	pciio_bus_mem_init(&admc->pciio_space, admc);
    353 	pcimem_bus_mem_init(&admc->pcimem_space, admc);
    354 #endif
    355 
    356 	/*
    357 	 * Initialize bus DMA tag.
    358 	 */
    359 	obio_dma_init(&admc->obio_dmat);
    360 
    361 	/*
    362 	 * Attach serial console.
    363 	 */
    364 	uart_cnattach();
    365 
    366 	/*
    367 	 * Look at arguments passed to us and compute boothowto.
    368 	 */
    369 	boothowto = RB_AUTOBOOT;
    370 #ifdef KADB
    371 	boothowto |= RB_KDB;
    372 #endif
    373 
    374 	parse_args(NULL, argc, argv, &memsize);
    375 
    376 	/*
    377 	 * Determine the memory size.
    378 	 *
    379 	 * Note: Reserve the first page!  That's where the trap
    380 	 * vectors are located.
    381 	 */
    382 
    383 #if 0
    384 	if (GET_MEMSIZE(memsize) == 0) {
    385 		uint32_t val;
    386 
    387 		/* This does not seem to work... --dyoung */
    388 		val = SW_READ(SW_MEMCONT_REG);
    389 		printf("SW_MEMCONT_REG: 0x%08" PRIx32 "\n", val);
    390 		switch (val & SDRAM_SIZE_MASK) {
    391 		case SDRAM_SIZE_4MBYTES:
    392 			memsize = 4 * 1024 * 1024;
    393 			break;
    394 		case SDRAM_SIZE_8MBYTES:
    395 			memsize = 8 * 1024 * 1024;
    396 			break;
    397 		case SDRAM_SIZE_16MBYTES:
    398 			memsize = 16 * 1024 * 1024;
    399 			break;
    400 		case SDRAM_SIZE_64MBYTES:
    401 			memsize = 64 * 1024 * 1024;
    402 			break;
    403 		case SDRAM_SIZE_128MBYTES:
    404 			memsize = 128 * 1024 * 1024;
    405 			break;
    406 		default:
    407 			panic("adm5120: cannot determine memory size");
    408 		}
    409 	}
    410 #endif
    411 
    412 	physmem = btoc(memsize);
    413 
    414 	mem_clusters[mem_cluster_cnt].start = PAGE_SIZE;
    415 	mem_clusters[mem_cluster_cnt].size =
    416 	    memsize - mem_clusters[mem_cluster_cnt].start;
    417 	mem_cluster_cnt++;
    418 
    419 	/*
    420 	 * Load the rest of the available pages into the VM system.
    421 	 */
    422 	first = round_page(MIPS_KSEG0_TO_PHYS(kernend));
    423 	last = mem_clusters[0].start + mem_clusters[0].size;
    424 	uvm_page_physload(atop(first), atop(last), atop(first), atop(last),
    425 	    VM_FREELIST_DEFAULT);
    426 
    427 	/*
    428 	 * Initialize message buffer (at end of core).
    429 	 */
    430 	mips_init_msgbuf();
    431 
    432 	/*
    433 	 * Initialize the virtual memory system.
    434 	 */
    435 	pmap_bootstrap();
    436 
    437 	/*
    438 	 * Init mapping for u page(s) for proc0.
    439 	 */
    440 	v = uvm_pageboot_alloc(USPACE);
    441 	lwp0.l_addr = proc0paddr = (struct user *)v;
    442 	lwp0.l_md.md_regs = (struct frame *)(v + USPACE) - 1;
    443 	proc0paddr->u_pcb.pcb_context[11] =
    444 	    MIPS_INT_MASK | MIPS_SR_INT_IE; /* SR */
    445 
    446 	/*
    447 	 * Initialize debuggers, and break into them, if appropriate.
    448 	 */
    449 #if NKSYMS || defined(DDB) || defined(LKM)
    450 	ksyms_init(0, 0, 0);
    451 #endif
    452 #ifdef DDB
    453 	if (boothowto & RB_KDB)
    454 		Debugger();
    455 #endif
    456 
    457 	copy_args(argc, argv);
    458 }
    459 
    460 void
    461 consinit(void)
    462 {
    463 
    464 	/*
    465 	 * Everything related to console initialization is done
    466 	 * in mach_init().
    467 	 */
    468 }
    469 
    470 void
    471 cpu_startup(void)
    472 {
    473 	struct adm5120_config *admc = &adm5120_configuration;
    474 	char pbuf[9];
    475 	vaddr_t minaddr, maxaddr;
    476 #ifdef DEBUG
    477 	extern int pmapdebug;		/* XXX */
    478 	int opmapdebug = pmapdebug;
    479 
    480 	pmapdebug = 0;		/* Shut up pmap debug during bootstrap */
    481 #endif
    482 
    483 	if ((admc->properties = prop_dictionary_create()) == NULL)
    484 		printf("%s: prop_dictionary_create\n", __func__);
    485 	parse_args(admc->properties, admc->argc, admc->argv, NULL);
    486 
    487 	/*
    488 	 * Good {morning,afternoon,evening,night}.
    489 	 */
    490 	printf("%s%s", copyright, version);
    491 	printf("%s\n", cpu_model);
    492 	format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
    493 	printf("total memory = %s\n", pbuf);
    494 
    495 	minaddr = 0;
    496 
    497 	/*
    498 	 * Allocate a submap for physio
    499 	 */
    500 	phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
    501 	    VM_PHYS_SIZE, 0, FALSE, NULL);
    502 
    503 	/*
    504 	 * No need to allocate an mbuf cluster submap.  Mbuf clusters
    505 	 * are allocated via the pool allocator, and we use KSEG to
    506 	 * map those pages.
    507 	 */
    508 
    509 #ifdef DEBUG
    510 	pmapdebug = opmapdebug;
    511 #endif
    512 	format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
    513 	printf("avail memory = %s\n", pbuf);
    514 }
    515 
    516 void
    517 cpu_reboot(int howto, char *bootstr)
    518 {
    519 	static int waittime = -1;
    520 
    521 	/* Take a snapshot before clobbering any registers. */
    522 	if (curproc)
    523 		savectx((struct user *)curpcb);
    524 
    525 	/* If "always halt" was specified as a boot flag, obey. */
    526 	if (boothowto & RB_HALT)
    527 		howto |= RB_HALT;
    528 
    529 	boothowto = howto;
    530 
    531 	/* If system is cold, just halt. */
    532 	if (cold) {
    533 		boothowto |= RB_HALT;
    534 		goto haltsys;
    535 	}
    536 
    537 	if ((boothowto & RB_NOSYNC) == 0 && waittime < 0) {
    538 		waittime = 0;
    539 
    540 		/*
    541 		 * Synchronize the disks....
    542 		 */
    543 		vfs_shutdown();
    544 
    545 		/*
    546 		 * If we've been adjusting the clock, the todr
    547 		 * will be out of synch; adjust it now.
    548 		 */
    549 		resettodr();
    550 	}
    551 
    552 	/* Disable interrupts. */
    553 	splhigh();
    554 
    555 	if (boothowto & RB_DUMP)
    556 		dumpsys();
    557 
    558  haltsys:
    559 	/* Run any shutdown hooks. */
    560 	doshutdownhooks();
    561 
    562 	/*
    563 	 * Routerboard BIOS may autoboot, so "pseudo-halt".
    564 	 */
    565 	if (boothowto & RB_HALT) {
    566 		printf("\n");
    567 		printf("The operating system has halted.\n");
    568 		printf("Please press any key to reboot.\n\n");
    569 		cnpollc(1);	/* For proper keyboard command handling */
    570 		cngetc();
    571 		cnpollc(0);
    572 	}
    573 
    574 	printf("reseting board...\n\n");
    575 	mips_icache_sync_all();
    576 	mips_dcache_wbinv_all();
    577 	SW_WRITE(SW_SFTRES_REG, 0);			/* reset */
    578 	for (;;)
    579 		/* spin forever */ ;	/* XXX */
    580 	/*NOTREACHED*/
    581 }
    582