dbau1550.c revision 1.3 1 1.3 gdamore /* $NetBSD: dbau1550.c,v 1.3 2006/02/13 02:37:05 gdamore Exp $ */
2 1.1 gdamore
3 1.1 gdamore /*-
4 1.1 gdamore * Copyright (c) 2006 Itronix Inc.
5 1.1 gdamore * All rights reserved.
6 1.1 gdamore *
7 1.1 gdamore * Written by Garrett D'Amore for Itronix Inc.
8 1.1 gdamore *
9 1.1 gdamore * Redistribution and use in source and binary forms, with or without
10 1.1 gdamore * modification, are permitted provided that the following conditions
11 1.1 gdamore * are met:
12 1.1 gdamore * 1. Redistributions of source code must retain the above copyright
13 1.1 gdamore * notice, this list of conditions and the following disclaimer.
14 1.1 gdamore * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 gdamore * notice, this list of conditions and the following disclaimer in the
16 1.1 gdamore * documentation and/or other materials provided with the distribution.
17 1.1 gdamore * 3. The name of Itronix Inc. may not be used to endorse
18 1.1 gdamore * or promote products derived from this software without specific
19 1.1 gdamore * prior written permission.
20 1.1 gdamore *
21 1.1 gdamore * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
22 1.1 gdamore * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 1.1 gdamore * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 1.1 gdamore * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
25 1.1 gdamore * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 1.1 gdamore * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 1.1 gdamore * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 1.1 gdamore * ON ANY THEORY OF LIABILITY, WHETHER IN
29 1.1 gdamore * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 1.1 gdamore * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 1.1 gdamore * POSSIBILITY OF SUCH DAMAGE.
32 1.1 gdamore */
33 1.1 gdamore
34 1.1 gdamore #include <sys/cdefs.h>
35 1.3 gdamore __KERNEL_RCSID(0, "$NetBSD: dbau1550.c,v 1.3 2006/02/13 02:37:05 gdamore Exp $");
36 1.1 gdamore
37 1.1 gdamore #include <sys/param.h>
38 1.1 gdamore #include <machine/bus.h>
39 1.1 gdamore #include <machine/locore.h>
40 1.1 gdamore #include <evbmips/alchemy/obiovar.h>
41 1.1 gdamore #include <evbmips/alchemy/board.h>
42 1.1 gdamore #include <evbmips/alchemy/dbau1550reg.h>
43 1.1 gdamore
44 1.3 gdamore #define GET32(x) \
45 1.3 gdamore (*((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(x)))
46 1.3 gdamore #define PUT32(x, v) \
47 1.3 gdamore (*((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(x)) = (v))
48 1.3 gdamore #define PUT16(x, v) \
49 1.3 gdamore (*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)) = (v))
50 1.3 gdamore
51 1.1 gdamore static void dbau1550_init(void);
52 1.1 gdamore static int dbau1550_pci_intr_map(struct pci_attach_args *,
53 1.1 gdamore pci_intr_handle_t *);
54 1.3 gdamore static void dbau1550_poweroff(void);
55 1.3 gdamore static void dbau1550_reboot(void);
56 1.1 gdamore
57 1.1 gdamore static const struct obiodev dbau1550_devices[] = {
58 1.1 gdamore #if 0
59 1.1 gdamore { "aupcmcia", -1, -1 },
60 1.1 gdamore { "aupsc", -1, -1 },
61 1.1 gdamore { "aupsc", -1, -1 },
62 1.1 gdamore { "aupsc", -1, -1 },
63 1.1 gdamore #endif
64 1.1 gdamore { NULL },
65 1.1 gdamore };
66 1.1 gdamore
67 1.1 gdamore static struct alchemy_board dbau1550_info = {
68 1.1 gdamore "AMD Alchemy DBAu1550",
69 1.1 gdamore dbau1550_devices,
70 1.1 gdamore dbau1550_init,
71 1.1 gdamore dbau1550_pci_intr_map,
72 1.3 gdamore dbau1550_reboot,
73 1.3 gdamore dbau1550_poweroff,
74 1.1 gdamore };
75 1.1 gdamore
76 1.1 gdamore const struct alchemy_board *
77 1.1 gdamore board_info(void)
78 1.1 gdamore {
79 1.1 gdamore
80 1.1 gdamore return &dbau1550_info;
81 1.1 gdamore }
82 1.1 gdamore
83 1.1 gdamore void
84 1.1 gdamore dbau1550_init(void)
85 1.1 gdamore {
86 1.2 gdamore uint32_t whoami;
87 1.1 gdamore
88 1.1 gdamore if (MIPS_PRID_COPTS(cpu_id) != MIPS_AU1550)
89 1.1 gdamore panic("dbau1550: CPU not Au1550");
90 1.1 gdamore
91 1.1 gdamore /* check the whoami register for a match */
92 1.2 gdamore whoami = *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(DBAU1550_WHOAMI));
93 1.1 gdamore
94 1.1 gdamore if (DBAU1550_WHOAMI_BOARD(whoami) != DBAU1550_WHOAMI_DBAU1550_REV1)
95 1.1 gdamore panic("dbau1550: WHOAMI (%x) not DBAu1550!", whoami);
96 1.1 gdamore
97 1.1 gdamore printf("DBAu1550 (cabernet), CPLDv%d, ",
98 1.1 gdamore DBAU1550_WHOAMI_CPLD(whoami));
99 1.1 gdamore
100 1.1 gdamore if (DBAU1550_WHOAMI_DAUGHTER(whoami) != 0xf)
101 1.1 gdamore printf("daughtercard 0x%x\n",
102 1.1 gdamore DBAU1550_WHOAMI_DAUGHTER(whoami));
103 1.1 gdamore else
104 1.1 gdamore printf("no daughtercard\n");
105 1.1 gdamore
106 1.1 gdamore /* leave console and clocks alone -- YAMON should have got it right! */
107 1.1 gdamore }
108 1.1 gdamore
109 1.1 gdamore int
110 1.1 gdamore dbau1550_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
111 1.1 gdamore {
112 1.1 gdamore /*
113 1.1 gdamore * This platform has one onboard PCI IDE controller, and two
114 1.1 gdamore * PCI expansion slots.
115 1.1 gdamore */
116 1.1 gdamore static const int irqmap[3/*device*/][4/*pin*/] = {
117 1.1 gdamore { 5, -1, -1, -1 }, /* 11: IDE */
118 1.1 gdamore { 2, 5, 6, 1 }, /* 12: PCI Slot 2 */
119 1.1 gdamore { 1, 2, 5, 6 }, /* 13: PCI Slot 3 */
120 1.1 gdamore };
121 1.1 gdamore int pin, dev, irq;
122 1.1 gdamore
123 1.1 gdamore /* if interrupt pin not used... */
124 1.1 gdamore if ((pin = pa->pa_intrpin) == 0)
125 1.1 gdamore return 1;
126 1.1 gdamore
127 1.1 gdamore if (pin > 4) {
128 1.1 gdamore printf("pci: bad interrupt pin %d\n", pin);
129 1.1 gdamore return 1;
130 1.1 gdamore }
131 1.1 gdamore
132 1.1 gdamore pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, NULL, &dev, NULL);
133 1.1 gdamore if ((dev < 11) || (dev > 13)) {
134 1.1 gdamore printf("pci: bad device %d\n", dev);
135 1.1 gdamore return 1;
136 1.1 gdamore }
137 1.1 gdamore
138 1.1 gdamore if ((irq = irqmap[dev - 11][pin - 1]) == -1) {
139 1.1 gdamore printf("pci: no IRQ routing for device %d pin %d\n", dev, pin);
140 1.1 gdamore return 1;
141 1.1 gdamore }
142 1.1 gdamore
143 1.1 gdamore *ihp = irq;
144 1.1 gdamore return 0;
145 1.1 gdamore }
146 1.3 gdamore
147 1.3 gdamore void
148 1.3 gdamore dbau1550_reboot(void)
149 1.3 gdamore {
150 1.3 gdamore PUT16(DBAU1550_SOFTWARE_RESET, 0);
151 1.3 gdamore delay(100000); /* 100 msec */
152 1.3 gdamore }
153 1.3 gdamore
154 1.3 gdamore void
155 1.3 gdamore dbau1550_poweroff(void)
156 1.3 gdamore {
157 1.3 gdamore printf("\n- poweroff -\n");
158 1.3 gdamore PUT16(DBAU1550_SOFTWARE_RESET,
159 1.3 gdamore DBAU1550_SOFTWARE_RESET_PWROFF | DBAU1550_SOFTWARE_RESET_RESET);
160 1.3 gdamore delay(100000); /* 100 msec */
161 1.3 gdamore }
162