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dbau1550.c revision 1.7 
      1 /* $NetBSD: dbau1550.c,v 1.7 2006/10/02 08:13:53 gdamore Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2006 Itronix Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Garrett D'Amore for Itronix Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. The name of Itronix Inc. may not be used to endorse
     18  *    or promote products derived from this software without specific
     19  *    prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
     22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
     25  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     28  * ON ANY THEORY OF LIABILITY, WHETHER IN
     29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31  * POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 #include <sys/cdefs.h>
     35 __KERNEL_RCSID(0, "$NetBSD: dbau1550.c,v 1.7 2006/10/02 08:13:53 gdamore Exp $");
     36 
     37 #include <sys/param.h>
     38 #include <sys/kernel.h>
     39 #include <sys/param.h>
     40 #include <sys/time.h>
     41 #include <sys/proc.h>
     42 #include <machine/bus.h>
     43 #include <machine/locore.h>
     44 #include <mips/alchemy/include/aureg.h>
     45 #include <mips/alchemy/dev/aupcmciavar.h>
     46 #include <mips/alchemy/dev/aupcmciareg.h>
     47 #include <mips/alchemy/dev/augpioreg.h>
     48 #include <mips/alchemy/dev/auspivar.h>
     49 #include <evbmips/alchemy/obiovar.h>
     50 #include <evbmips/alchemy/board.h>
     51 #include <evbmips/alchemy/dbau1550reg.h>
     52 
     53 #include "auspi.h"
     54 
     55 /*
     56  * This should be converted to use bus_space routines.
     57  */
     58 #define	GET16(x)	\
     59 	(*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)))
     60 #define	PUT16(x, v)	\
     61 	(*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)) = (v))
     62 #define	GET32(x)	\
     63 	(*((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(x)))
     64 #define	PUT32(x, v)	\
     65 	(*((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(x)) = (v))
     66 
     67 static void dbau1550_init(void);
     68 static int dbau1550_pci_intr_map(struct pci_attach_args *,
     69 				 pci_intr_handle_t *);
     70 static void dbau1550_poweroff(void);
     71 static void dbau1550_reboot(void);
     72 static bus_addr_t dbau1550_slot_offset(int);
     73 static int dbau1550_slot_irq(int, int);
     74 static void dbau1550_slot_enable(int);
     75 static void dbau1550_slot_disable(int);
     76 static int dbau1550_slot_status(int);
     77 static const char *dbau1550_slot_name(int);
     78 static const struct auspi_machdep *dbau1550_spi(bus_addr_t);
     79 
     80 static const struct obiodev dbau1550_devices[] = {
     81 	{ NULL },
     82 };
     83 
     84 static struct aupcmcia_machdep dbau1550_pcmcia = {
     85 	2,	/* nslots */
     86 	dbau1550_slot_offset,
     87 	dbau1550_slot_irq,
     88 	dbau1550_slot_enable,
     89 	dbau1550_slot_disable,
     90 	dbau1550_slot_status,
     91 	dbau1550_slot_name,
     92 };
     93 
     94 static struct alchemy_board dbau1550_info = {
     95 	.ab_name = "AMD Alchemy DBAu1550",
     96 	.ab_devices = dbau1550_devices,
     97 	.ab_init = dbau1550_init,
     98 	.ab_pci_intr_map =dbau1550_pci_intr_map,
     99 	.ab_reboot = dbau1550_reboot,
    100 	.ab_poweroff = dbau1550_poweroff,
    101 	.ab_pcmcia = &dbau1550_pcmcia,
    102 	.ab_spi = dbau1550_spi,
    103 };
    104 
    105 const struct alchemy_board *
    106 board_info(void)
    107 {
    108 
    109 	return &dbau1550_info;
    110 }
    111 
    112 void
    113 dbau1550_init(void)
    114 {
    115 	uint16_t		whoami;
    116 	uint32_t		sysclk;
    117 	uint32_t		pinfunc;
    118 
    119 	if (MIPS_PRID_COPTS(cpu_id) != MIPS_AU1550)
    120 		panic("dbau1550: CPU not Au1550");
    121 
    122 	/* check the whoami register for a match */
    123 	whoami = GET16(DBAU1550_WHOAMI);
    124 
    125 	if (DBAU1550_WHOAMI_BOARD(whoami) != DBAU1550_WHOAMI_DBAU1550_REV1)
    126 		panic("dbau1550: WHOAMI (%x) not DBAu1550!", whoami);
    127 
    128 	printf("DBAu1550 (cabernet), CPLDv%d, ",
    129 	    DBAU1550_WHOAMI_CPLD(whoami));
    130 
    131 	if (DBAU1550_WHOAMI_DAUGHTER(whoami) != 0xf)
    132 		printf("daughtercard 0x%x\n",
    133 		    DBAU1550_WHOAMI_DAUGHTER(whoami));
    134 	else
    135 		printf("no daughtercard\n");
    136 
    137 	/* leave console and clocks alone -- YAMON should have got it right! */
    138 
    139 	/*
    140 	 * Initialize PSC clocks.
    141 	 *
    142 	 * PSC0 is SPI.   Use 48MHz FREQ1.
    143 	 * PSC1 is AC97.
    144 	 * PSC2 is SMBus, and must be 48MHz.  (Configured by YAMON)
    145 	 * PSC3 is I2S.
    146 	 *
    147 	 * FREQ2 is 48MHz for USBH/USBD.
    148 	 */
    149 	sysclk = GET32(SYS_CLKSRC);
    150 	sysclk &= ~(SCS_MP0(7) | SCS_DP0 | SCS_CP0);
    151 	sysclk |= SCS_MP0(3);
    152 	PUT32(SYS_CLKSRC, sysclk);
    153 
    154 	/*
    155 	 * Configure pin function for PSC devices.
    156 	 */
    157 	pinfunc = GET32(SYS_PINFUNC);
    158 	/* configure PSC0 SYNC1 */
    159 	pinfunc |= SPF_S0;
    160 	/* configure PSC2 for SMBus (YAMON default) */
    161 	pinfunc &= ~SPF_PSC2_MASK;
    162 	pinfunc |= SPF_PSC2_SMBUS;
    163 	/* configure PSC3 for I2S (YAMON default) */
    164 	pinfunc &= ~SPF_PSC3_MASK;
    165 	pinfunc |= SPF_PSC3_I2S;
    166 	PUT32(SYS_PINFUNC, pinfunc);
    167 }
    168 
    169 int
    170 dbau1550_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
    171 {
    172 	/*
    173 	 * This platform has one onboard PCI IDE controller, and two
    174 	 * PCI expansion slots.
    175 	 */
    176 	static const int irqmap[3/*device*/][4/*pin*/] = {
    177 		{  5, -1, -1, -1 },	/* 11: IDE */
    178 		{  2,  5,  6,  1 },	/* 12: PCI Slot 2 */
    179 		{  1,  2,  5,  6 },	/* 13: PCI Slot 3 */
    180 	};
    181 	int	pin, dev, irq;
    182 
    183 	/* if interrupt pin not used... */
    184 	if ((pin = pa->pa_intrpin) == 0)
    185 		return 1;
    186 
    187 	if (pin > 4) {
    188 		printf("pci: bad interrupt pin %d\n", pin);
    189 		return 1;
    190 	}
    191 
    192 	pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, NULL, &dev, NULL);
    193 	if ((dev < 11) || (dev > 13)) {
    194 		printf("pci: bad device %d\n", dev);
    195 		return 1;
    196 	}
    197 
    198 	if ((irq = irqmap[dev - 11][pin - 1]) == -1) {
    199 		printf("pci: no IRQ routing for device %d pin %d\n", dev, pin);
    200 		return 1;
    201 	}
    202 
    203 	*ihp = irq;
    204 	return 0;
    205 }
    206 
    207 void
    208 dbau1550_reboot(void)
    209 {
    210 	PUT16(DBAU1550_SOFTWARE_RESET, 0);
    211 	wbflush();
    212 	delay(100000);	/* 100 msec */
    213 }
    214 
    215 void
    216 dbau1550_poweroff(void)
    217 {
    218 	printf("\n- poweroff -\n");
    219 	PUT16(DBAU1550_SOFTWARE_RESET,
    220 	    DBAU1550_SOFTWARE_RESET_PWROFF | DBAU1550_SOFTWARE_RESET_RESET);
    221 	wbflush();
    222 	delay(100000);	/* 100 msec */
    223 }
    224 
    225 int
    226 dbau1550_slot_irq(int slot, int which)
    227 {
    228 	static const int irqmap[2/*slot*/][2/*which*/] = {
    229 		{ 35, 32 },		/* Slot 0: Bottom */
    230 		{ 37, 33 },		/* Slot 1: Top */
    231 	};
    232 
    233 	if ((slot >= 2) || (which >= 2))
    234 		return -1;
    235 
    236 	return (irqmap[slot][which]);
    237 }
    238 
    239 bus_addr_t
    240 dbau1550_slot_offset(int slot)
    241 {
    242 	switch (slot) {
    243 	case 0:
    244 		return (DBAU1550_PC0_ADDR);
    245 	case 1:
    246 		return (DBAU1550_PC1_ADDR);
    247 	}
    248 
    249 	return (bus_addr_t)-1;
    250 }
    251 
    252 void
    253 dbau1550_slot_enable(int slot)
    254 {
    255 	uint16_t	status;
    256 	uint16_t	vcc, vpp;
    257 	int		shift;
    258 
    259 	status = GET16(DBAU1550_STATUS);
    260 	switch (slot) {
    261 	case 0:
    262 		status >>= DBAU1550_STATUS_PCMCIA0_VS_SHIFT;
    263 		shift = DBAU1550_PCMCIA_PC0_SHIFT;
    264 		break;
    265 	case 1:
    266 		status >>= DBAU1550_STATUS_PCMCIA1_VS_SHIFT;
    267 		shift = DBAU1550_PCMCIA_PC1_SHIFT;
    268 		break;
    269 	default:
    270 		return;
    271 	}
    272 
    273 	status &= DBAU1550_STATUS_PCMCIA_VS_MASK;
    274 	switch (status) {
    275 	case DBAU1550_STATUS_PCMCIA_VS_GND:
    276 		vcc = DBAU1550_PCMCIA_VCC_GND;
    277 		vpp = DBAU1550_PCMCIA_VPP_GND;
    278 		break;
    279 	case DBAU1550_STATUS_PCMCIA_VS_5V:
    280 		vcc = DBAU1550_PCMCIA_VCC_5V;
    281 		vpp = DBAU1550_PCMCIA_VPP_VCC;
    282 		break;
    283 	default:	/* covers both 3.3v cases */
    284 		vcc = DBAU1550_PCMCIA_VCC_3V;
    285 		vpp = DBAU1550_PCMCIA_VPP_VCC;
    286 		break;
    287 	}
    288 
    289 	status = GET16(DBAU1550_PCMCIA);
    290 
    291 	/* this clears all bits for this slot */
    292 	status &= ~(DBAU1550_PCMCIA_MASK << shift);
    293 
    294 	status |= vcc << shift;
    295 	status |= vpp << shift;
    296 
    297 	PUT16(DBAU1550_PCMCIA, status);
    298 	wbflush();
    299 	tsleep(&status, PWAIT, "pcmcia_reset_0", mstohz(100));
    300 
    301 	status |= (DBAU1550_PCMCIA_DRV_EN << shift);
    302 	PUT16(DBAU1550_PCMCIA, status);
    303 	wbflush();
    304 	tsleep(&status, PWAIT, "pcmcia_reset_start", mstohz(300));
    305 
    306 	/* take it out of reset */
    307 	status |= (DBAU1550_PCMCIA_RST << shift);
    308 	PUT16(DBAU1550_PCMCIA, status);
    309 	wbflush();
    310 
    311 	/* spec says 20 msec, but experience shows even 200 is not enough */
    312 	tsleep(&status, PWAIT, "pcmcia_reset_finish", mstohz(1000));
    313 
    314 	/* NOTE: WE DO NOT SUPPORT DIFFERENT VCC/VPP LEVELS! */
    315 	/* This means that 12V cards are not supported! */
    316 }
    317 
    318 void
    319 dbau1550_slot_disable(int slot)
    320 {
    321 	int		shift;
    322 	uint16_t	status;
    323 
    324 	switch (slot) {
    325 	case 0:
    326 		shift = DBAU1550_PCMCIA_PC0_SHIFT;
    327 		break;
    328 	case 1:
    329 		shift = DBAU1550_PCMCIA_PC1_SHIFT;
    330 		break;
    331 	}
    332 
    333 	status = GET16(DBAU1550_PCMCIA);
    334 	status &= ~(DBAU1550_PCMCIA_MASK);
    335 	PUT16(DBAU1550_PCMCIA, status);
    336 	wbflush();
    337 }
    338 
    339 int
    340 dbau1550_slot_status(int slot)
    341 {
    342 	uint16_t	status, mask;
    343 	status = GET16(DBAU1550_STATUS);
    344 	switch (slot) {
    345 	case 0:
    346 		mask = DBAU1550_STATUS_PCMCIA0_INSERTED;
    347 		break;
    348 	case 1:
    349 		mask = DBAU1550_STATUS_PCMCIA1_INSERTED;
    350 		break;
    351 
    352 	default:
    353 		return 0;
    354 	}
    355 
    356 	return ((mask & status) ? 0 : 1);
    357 }
    358 
    359 const char *
    360 dbau1550_slot_name(int slot)
    361 {
    362 	switch (slot) {
    363 	case 0:
    364 		return "bottom slot";
    365 	case 1:
    366 		return "top slot";
    367 	default:
    368 		return "???";
    369 	}
    370 }
    371 
    372 #if NAUSPI > 0
    373 
    374 static int
    375 dbau1550_spi_select(void *arg, int slave)
    376 {
    377 	uint16_t	status;
    378 	if ((slave < 0) || (slave > 1))
    379 		return EINVAL;
    380 	status = GET16(DBAU1550_BOARD_SPECIFIC);
    381 
    382 	if (slave) {
    383 		status |= DBAU1550_SPI_DEV_SEL;
    384 	} else {
    385 		status &= ~DBAU1550_SPI_DEV_SEL;
    386 	}
    387 	PUT16(DBAU1550_BOARD_SPECIFIC, status);
    388 	return 0;
    389 }
    390 
    391 const struct auspi_machdep *
    392 dbau1550_spi(bus_addr_t ba)
    393 {
    394 	static const struct auspi_machdep md = {
    395 		.am_nslaves = 2,
    396 		.am_cookie = NULL,
    397 		.am_select = dbau1550_spi_select,
    398 	};
    399 
    400 	/* DBAU1550 only has SPI on PSC0 */
    401 	if (ba != PSC0_BASE)
    402 		return NULL;
    403 
    404 	return &md;
    405 }
    406 
    407 #endif	/* NAUSPI > 0 */
    408