machdep.c revision 1.41 1 1.41 apb /* $NetBSD: machdep.c,v 1.41 2009/02/13 22:41:01 apb Exp $ */
2 1.1 simonb
3 1.24 gdamore /*-
4 1.24 gdamore * Copyright (c) 2006 Itronix Inc.
5 1.24 gdamore * All rights reserved.
6 1.24 gdamore *
7 1.24 gdamore * Portions written by Garrett D'Amore for Itronix Inc.
8 1.24 gdamore *
9 1.24 gdamore * Redistribution and use in source and binary forms, with or without
10 1.24 gdamore * modification, are permitted provided that the following conditions
11 1.24 gdamore * are met:
12 1.24 gdamore * 1. Redistributions of source code must retain the above copyright
13 1.24 gdamore * notice, this list of conditions and the following disclaimer.
14 1.24 gdamore * 2. Redistributions in binary form must reproduce the above copyright
15 1.24 gdamore * notice, this list of conditions and the following disclaimer in the
16 1.24 gdamore * documentation and/or other materials provided with the distribution.
17 1.24 gdamore * 3. The name of Itronix Inc. may not be used to endorse
18 1.24 gdamore * or promote products derived from this software without specific
19 1.24 gdamore * prior written permission.
20 1.24 gdamore *
21 1.24 gdamore * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
22 1.24 gdamore * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 1.24 gdamore * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 1.24 gdamore * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
25 1.24 gdamore * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 1.24 gdamore * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 1.24 gdamore * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 1.24 gdamore * ON ANY THEORY OF LIABILITY, WHETHER IN
29 1.24 gdamore * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 1.24 gdamore * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 1.24 gdamore * POSSIBILITY OF SUCH DAMAGE.
32 1.24 gdamore */
33 1.1 simonb /*
34 1.1 simonb * Copyright (c) 1992, 1993
35 1.1 simonb * The Regents of the University of California. All rights reserved.
36 1.1 simonb *
37 1.1 simonb * This code is derived from software contributed to Berkeley by
38 1.1 simonb * the Systems Programming Group of the University of Utah Computer
39 1.1 simonb * Science Department, The Mach Operating System project at
40 1.1 simonb * Carnegie-Mellon University and Ralph Campbell.
41 1.1 simonb *
42 1.1 simonb * Redistribution and use in source and binary forms, with or without
43 1.1 simonb * modification, are permitted provided that the following conditions
44 1.1 simonb * are met:
45 1.1 simonb * 1. Redistributions of source code must retain the above copyright
46 1.1 simonb * notice, this list of conditions and the following disclaimer.
47 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
48 1.1 simonb * notice, this list of conditions and the following disclaimer in the
49 1.1 simonb * documentation and/or other materials provided with the distribution.
50 1.11 agc * 3. Neither the name of the University nor the names of its contributors
51 1.11 agc * may be used to endorse or promote products derived from this software
52 1.11 agc * without specific prior written permission.
53 1.11 agc *
54 1.11 agc * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
55 1.11 agc * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
56 1.11 agc * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
57 1.11 agc * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
58 1.11 agc * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
59 1.11 agc * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
60 1.11 agc * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
61 1.11 agc * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
62 1.11 agc * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
63 1.11 agc * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 1.11 agc * SUCH DAMAGE.
65 1.11 agc *
66 1.11 agc * @(#)machdep.c 8.3 (Berkeley) 1/12/94
67 1.11 agc * from: Utah Hdr: machdep.c 1.63 91/04/24
68 1.11 agc */
69 1.11 agc /*
70 1.11 agc * Copyright (c) 1988 University of Utah.
71 1.11 agc *
72 1.11 agc * This code is derived from software contributed to Berkeley by
73 1.11 agc * the Systems Programming Group of the University of Utah Computer
74 1.11 agc * Science Department, The Mach Operating System project at
75 1.11 agc * Carnegie-Mellon University and Ralph Campbell.
76 1.11 agc *
77 1.11 agc * Redistribution and use in source and binary forms, with or without
78 1.11 agc * modification, are permitted provided that the following conditions
79 1.11 agc * are met:
80 1.11 agc * 1. Redistributions of source code must retain the above copyright
81 1.11 agc * notice, this list of conditions and the following disclaimer.
82 1.11 agc * 2. Redistributions in binary form must reproduce the above copyright
83 1.11 agc * notice, this list of conditions and the following disclaimer in the
84 1.11 agc * documentation and/or other materials provided with the distribution.
85 1.1 simonb * 3. All advertising materials mentioning features or use of this software
86 1.1 simonb * must display the following acknowledgement:
87 1.1 simonb * This product includes software developed by the University of
88 1.1 simonb * California, Berkeley and its contributors.
89 1.1 simonb * 4. Neither the name of the University nor the names of its contributors
90 1.1 simonb * may be used to endorse or promote products derived from this software
91 1.1 simonb * without specific prior written permission.
92 1.1 simonb *
93 1.1 simonb * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
94 1.1 simonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
95 1.1 simonb * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
96 1.1 simonb * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
97 1.1 simonb * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
98 1.1 simonb * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
99 1.1 simonb * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
100 1.1 simonb * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
101 1.1 simonb * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
102 1.1 simonb * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
103 1.1 simonb * SUCH DAMAGE.
104 1.1 simonb *
105 1.1 simonb * @(#)machdep.c 8.3 (Berkeley) 1/12/94
106 1.1 simonb * from: Utah Hdr: machdep.c 1.63 91/04/24
107 1.1 simonb */
108 1.1 simonb
109 1.1 simonb #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
110 1.41 apb __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.41 2009/02/13 22:41:01 apb Exp $");
111 1.1 simonb
112 1.1 simonb #include "opt_ddb.h"
113 1.1 simonb #include "opt_kgdb.h"
114 1.1 simonb
115 1.1 simonb #include "opt_memsize.h"
116 1.41 apb #include "opt_modular.h"
117 1.1 simonb #include "opt_ethaddr.h"
118 1.1 simonb
119 1.1 simonb #include <sys/param.h>
120 1.1 simonb #include <sys/systm.h>
121 1.1 simonb #include <sys/kernel.h>
122 1.1 simonb #include <sys/buf.h>
123 1.1 simonb #include <sys/reboot.h>
124 1.1 simonb #include <sys/user.h>
125 1.1 simonb #include <sys/mount.h>
126 1.1 simonb #include <sys/kcore.h>
127 1.1 simonb #include <sys/boot_flag.h>
128 1.1 simonb #include <sys/termios.h>
129 1.8 ragge #include <sys/ksyms.h>
130 1.38 dyoung #include <sys/device.h>
131 1.1 simonb
132 1.1 simonb #include <net/if.h>
133 1.1 simonb #include <net/if_ether.h>
134 1.1 simonb
135 1.1 simonb #include <uvm/uvm_extern.h>
136 1.1 simonb
137 1.1 simonb #include <dev/cons.h>
138 1.1 simonb
139 1.8 ragge #include "ksyms.h"
140 1.8 ragge
141 1.39 ad #if NKSYMS || defined(DDB) || defined(MODULAR)
142 1.1 simonb #include <machine/db_machdep.h>
143 1.1 simonb #include <ddb/db_extern.h>
144 1.1 simonb #endif
145 1.1 simonb
146 1.1 simonb #include <mips/cache.h>
147 1.1 simonb #include <mips/locore.h>
148 1.1 simonb #include <machine/yamon.h>
149 1.1 simonb
150 1.24 gdamore #include <evbmips/alchemy/board.h>
151 1.25 gdamore #include <mips/alchemy/dev/aupcivar.h>
152 1.27 gdamore #include <mips/alchemy/dev/aupcmciavar.h>
153 1.31 gdamore #include <mips/alchemy/dev/auspivar.h>
154 1.1 simonb #include <mips/alchemy/include/aureg.h>
155 1.1 simonb #include <mips/alchemy/include/auvar.h>
156 1.1 simonb #include <mips/alchemy/include/aubusvar.h>
157 1.1 simonb
158 1.29 gdamore #include "com.h"
159 1.29 gdamore #if NCOM > 0
160 1.1 simonb
161 1.20 christos int aucomcnrate = 0;
162 1.1 simonb #endif /* NAUCOM > 0 */
163 1.1 simonb
164 1.6 hpeyerl #include "ohci.h"
165 1.6 hpeyerl
166 1.1 simonb struct user *proc0paddr;
167 1.1 simonb
168 1.1 simonb /* Our exported CPU info; we can have only one. */
169 1.1 simonb struct cpu_info cpu_info_store;
170 1.1 simonb
171 1.1 simonb /* Maps for VM objects. */
172 1.1 simonb struct vm_map *mb_map = NULL;
173 1.1 simonb struct vm_map *phys_map = NULL;
174 1.1 simonb
175 1.1 simonb int physmem; /* # pages of physical memory */
176 1.1 simonb int maxmem; /* max memory per process */
177 1.1 simonb
178 1.1 simonb int mem_cluster_cnt;
179 1.1 simonb phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
180 1.1 simonb
181 1.1 simonb yamon_env_var *yamon_envp;
182 1.24 gdamore struct mips_bus_space alchemy_cpuregt;
183 1.1 simonb
184 1.1 simonb void mach_init(int, char **, yamon_env_var *, u_long); /* XXX */
185 1.1 simonb
186 1.1 simonb void
187 1.1 simonb mach_init(int argc, char **argv, yamon_env_var *envp, u_long memsize)
188 1.1 simonb {
189 1.1 simonb bus_space_handle_t sh;
190 1.33 christos void *kernend;
191 1.1 simonb const char *cp;
192 1.1 simonb u_long first, last;
193 1.33 christos void *v;
194 1.13 simonb int freqok, howto, i;
195 1.24 gdamore const struct alchemy_board *board;
196 1.1 simonb
197 1.1 simonb extern char edata[], end[]; /* XXX */
198 1.1 simonb
199 1.24 gdamore board = board_info();
200 1.24 gdamore KASSERT(board != NULL);
201 1.24 gdamore
202 1.1 simonb /* clear the BSS segment */
203 1.33 christos kernend = (void *)mips_round_page(end);
204 1.34 simonb memset(edata, 0, (char *)kernend - edata);
205 1.1 simonb
206 1.16 wiz /* set CPU model info for sysctl_hw */
207 1.24 gdamore strcpy(cpu_model, board->ab_name);
208 1.2 simonb
209 1.1 simonb /* save the yamon environment pointer */
210 1.1 simonb yamon_envp = envp;
211 1.1 simonb
212 1.1 simonb /* Use YAMON callbacks for early console I/O */
213 1.1 simonb cn_tab = &yamon_promcd;
214 1.1 simonb
215 1.1 simonb /*
216 1.16 wiz * Set up the exception vectors and CPU-specific function
217 1.1 simonb * vectors early on. We need the wbflush() vector set up
218 1.1 simonb * before comcnattach() is called (or at least before the
219 1.1 simonb * first printf() after that is called).
220 1.13 simonb * Sets up mips_cpu_flags that may be queried by other
221 1.13 simonb * functions called during startup.
222 1.1 simonb * Also clears the I+D caches.
223 1.1 simonb */
224 1.1 simonb mips_vector_init();
225 1.1 simonb
226 1.1 simonb /*
227 1.1 simonb * Set the VM page size.
228 1.1 simonb */
229 1.1 simonb uvm_setpagesize();
230 1.1 simonb
231 1.1 simonb /*
232 1.13 simonb * Use YAMON's CPU frequency if available.
233 1.13 simonb */
234 1.13 simonb freqok = yamon_setcpufreq(1);
235 1.13 simonb
236 1.13 simonb /*
237 1.1 simonb * Initialize bus space tags.
238 1.1 simonb */
239 1.24 gdamore au_cpureg_bus_mem_init(&alchemy_cpuregt, &alchemy_cpuregt);
240 1.24 gdamore aubus_st = &alchemy_cpuregt;
241 1.1 simonb
242 1.1 simonb /*
243 1.13 simonb * Calibrate the timer if YAMON failed to tell us.
244 1.1 simonb */
245 1.13 simonb if (!freqok) {
246 1.24 gdamore bus_space_map(aubus_st, PC_BASE, PC_SIZE, 0, &sh);
247 1.24 gdamore au_cal_timers(aubus_st, sh);
248 1.24 gdamore bus_space_unmap(aubus_st, sh, PC_SIZE);
249 1.13 simonb }
250 1.1 simonb
251 1.1 simonb /*
252 1.24 gdamore * Perform board-specific initialization.
253 1.24 gdamore */
254 1.24 gdamore board->ab_init();
255 1.24 gdamore
256 1.24 gdamore /*
257 1.1 simonb * Bring up the console.
258 1.1 simonb */
259 1.29 gdamore #if NCOM > 0
260 1.20 christos #ifdef CONSPEED
261 1.20 christos if (aucomcnrate == 0)
262 1.20 christos aucomcnrate = CONSPEED;
263 1.20 christos #else /* !CONSPEED */
264 1.20 christos /*
265 1.20 christos * Learn default console speed. We use the YAMON environment,
266 1.20 christos * though we could probably also figure it out by checking the
267 1.20 christos * aucom registers directly.
268 1.20 christos */
269 1.20 christos if ((aucomcnrate == 0) && ((cp = yamon_getenv("modetty0")) != NULL))
270 1.20 christos aucomcnrate = strtoul(cp, NULL, 0);
271 1.20 christos
272 1.20 christos if (aucomcnrate == 0) {
273 1.24 gdamore printf("FATAL: `modetty0' YAMON variable not set. Set it\n");
274 1.24 gdamore printf(" to the speed of the console and try again.\n");
275 1.24 gdamore printf(" Or, build a kernel with the `CONSPEED' "
276 1.24 gdamore "option.\n");
277 1.24 gdamore panic("mach_init");
278 1.20 christos }
279 1.20 christos #endif /* CONSPEED */
280 1.20 christos
281 1.1 simonb /*
282 1.1 simonb * Delay to allow firmware putchars to complete.
283 1.1 simonb * FIFO depth * character time.
284 1.1 simonb * character time = (1000000 / (defaultrate / 10))
285 1.1 simonb */
286 1.1 simonb delay(160000000 / aucomcnrate);
287 1.29 gdamore if (com_aubus_cnattach(UART0_BASE, aucomcnrate) != 0)
288 1.24 gdamore panic("mach_init: unable to initialize serial console");
289 1.29 gdamore
290 1.29 gdamore #else /* NCOM > 0 */
291 1.24 gdamore panic("mach_init: not configured to use serial console");
292 1.1 simonb #endif /* NAUCOM > 0 */
293 1.1 simonb
294 1.1 simonb /*
295 1.1 simonb * Look at arguments passed to us and compute boothowto.
296 1.1 simonb */
297 1.1 simonb boothowto = RB_AUTOBOOT;
298 1.1 simonb #ifdef KADB
299 1.1 simonb boothowto |= RB_KDB;
300 1.1 simonb #endif
301 1.1 simonb for (i = 1; i < argc; i++) {
302 1.1 simonb for (cp = argv[i]; *cp; cp++) {
303 1.1 simonb /* Ignore superfluous '-', if there is one */
304 1.1 simonb if (*cp == '-')
305 1.1 simonb continue;
306 1.1 simonb
307 1.1 simonb howto = 0;
308 1.1 simonb BOOT_FLAG(*cp, howto);
309 1.1 simonb if (! howto)
310 1.1 simonb printf("bootflag '%c' not recognised\n", *cp);
311 1.1 simonb else
312 1.1 simonb boothowto |= howto;
313 1.1 simonb }
314 1.1 simonb }
315 1.1 simonb
316 1.1 simonb /*
317 1.1 simonb * Determine the memory size. Use the `memsize' PMON
318 1.1 simonb * variable. If that's not available, panic.
319 1.1 simonb *
320 1.1 simonb * Note: Reserve the first page! That's where the trap
321 1.1 simonb * vectors are located.
322 1.1 simonb */
323 1.1 simonb
324 1.1 simonb #if defined(MEMSIZE)
325 1.4 scw memsize = MEMSIZE;
326 1.1 simonb #else
327 1.1 simonb if (memsize == 0) {
328 1.1 simonb if ((cp = yamon_getenv("memsize")) != NULL)
329 1.1 simonb memsize = strtoul(cp, NULL, 0);
330 1.1 simonb else {
331 1.1 simonb printf("FATAL: `memsize' YAMON variable not set. Set it to\n");
332 1.1 simonb printf(" the amount of memory (in MB) and try again.\n");
333 1.1 simonb printf(" Or, build a kernel with the `MEMSIZE' "
334 1.1 simonb "option.\n");
335 1.24 gdamore panic("mach_init");
336 1.1 simonb }
337 1.1 simonb }
338 1.1 simonb #endif /* MEMSIZE */
339 1.1 simonb printf("Memory size: 0x%08lx\n", memsize);
340 1.1 simonb physmem = btoc(memsize);
341 1.1 simonb
342 1.7 thorpej mem_clusters[mem_cluster_cnt].start = PAGE_SIZE;
343 1.1 simonb mem_clusters[mem_cluster_cnt].size =
344 1.1 simonb memsize - mem_clusters[mem_cluster_cnt].start;
345 1.1 simonb mem_cluster_cnt++;
346 1.1 simonb
347 1.1 simonb /*
348 1.1 simonb * Load the rest of the available pages into the VM system.
349 1.1 simonb */
350 1.1 simonb first = round_page(MIPS_KSEG0_TO_PHYS(kernend));
351 1.1 simonb last = mem_clusters[0].start + mem_clusters[0].size;
352 1.1 simonb uvm_page_physload(atop(first), atop(last), atop(first), atop(last),
353 1.1 simonb VM_FREELIST_DEFAULT);
354 1.1 simonb
355 1.1 simonb /*
356 1.1 simonb * Initialize message buffer (at end of core).
357 1.1 simonb */
358 1.1 simonb mips_init_msgbuf();
359 1.1 simonb
360 1.1 simonb /*
361 1.1 simonb * Initialize the virtual memory system.
362 1.1 simonb */
363 1.1 simonb pmap_bootstrap();
364 1.1 simonb
365 1.1 simonb /*
366 1.1 simonb * Init mapping for u page(s) for proc0.
367 1.1 simonb */
368 1.33 christos v = (void *) uvm_pageboot_alloc(USPACE);
369 1.5 thorpej lwp0.l_addr = proc0paddr = (struct user *)v;
370 1.34 simonb lwp0.l_md.md_regs = (struct frame *)((char *)v + USPACE) - 1;
371 1.35 yamt proc0paddr->u_pcb.pcb_context[11] =
372 1.35 yamt MIPS_INT_MASK | MIPS_SR_INT_IE; /* SR */
373 1.1 simonb
374 1.1 simonb /*
375 1.1 simonb * Initialize debuggers, and break into them, if appropriate.
376 1.1 simonb */
377 1.1 simonb #ifdef DDB
378 1.1 simonb if (boothowto & RB_KDB)
379 1.1 simonb Debugger();
380 1.1 simonb #endif
381 1.1 simonb }
382 1.1 simonb
383 1.1 simonb void
384 1.1 simonb consinit(void)
385 1.1 simonb {
386 1.1 simonb
387 1.1 simonb /*
388 1.1 simonb * Everything related to console initialization is done
389 1.1 simonb * in mach_init().
390 1.1 simonb */
391 1.1 simonb }
392 1.1 simonb
393 1.1 simonb void
394 1.1 simonb cpu_startup(void)
395 1.1 simonb {
396 1.1 simonb char pbuf[9];
397 1.1 simonb vaddr_t minaddr, maxaddr;
398 1.1 simonb #ifdef DEBUG
399 1.1 simonb extern int pmapdebug; /* XXX */
400 1.1 simonb int opmapdebug = pmapdebug;
401 1.1 simonb
402 1.1 simonb pmapdebug = 0; /* Shut up pmap debug during bootstrap */
403 1.1 simonb #endif
404 1.1 simonb
405 1.1 simonb /*
406 1.1 simonb * Good {morning,afternoon,evening,night}.
407 1.1 simonb */
408 1.18 lukem printf("%s%s", copyright, version);
409 1.1 simonb printf("%s\n", cpu_model);
410 1.1 simonb format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
411 1.1 simonb printf("total memory = %s\n", pbuf);
412 1.1 simonb
413 1.15 pk minaddr = 0;
414 1.1 simonb
415 1.1 simonb /*
416 1.1 simonb * Allocate a submap for physio
417 1.1 simonb */
418 1.1 simonb phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
419 1.32 thorpej VM_PHYS_SIZE, 0, false, NULL);
420 1.1 simonb
421 1.1 simonb /*
422 1.1 simonb * No need to allocate an mbuf cluster submap. Mbuf clusters
423 1.1 simonb * are allocated via the pool allocator, and we use KSEG to
424 1.1 simonb * map those pages.
425 1.1 simonb */
426 1.1 simonb
427 1.1 simonb #ifdef DEBUG
428 1.1 simonb pmapdebug = opmapdebug;
429 1.1 simonb #endif
430 1.1 simonb format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
431 1.1 simonb printf("avail memory = %s\n", pbuf);
432 1.1 simonb }
433 1.1 simonb
434 1.1 simonb void
435 1.1 simonb cpu_reboot(int howto, char *bootstr)
436 1.1 simonb {
437 1.1 simonb static int waittime = -1;
438 1.26 gdamore const struct alchemy_board *board;
439 1.1 simonb
440 1.1 simonb /* Take a snapshot before clobbering any registers. */
441 1.1 simonb if (curproc)
442 1.1 simonb savectx((struct user *)curpcb);
443 1.1 simonb
444 1.26 gdamore board = board_info();
445 1.26 gdamore KASSERT(board != NULL);
446 1.26 gdamore
447 1.1 simonb /* If "always halt" was specified as a boot flag, obey. */
448 1.1 simonb if (boothowto & RB_HALT)
449 1.1 simonb howto |= RB_HALT;
450 1.1 simonb
451 1.1 simonb boothowto = howto;
452 1.1 simonb
453 1.1 simonb /* If system is cold, just halt. */
454 1.1 simonb if (cold) {
455 1.1 simonb boothowto |= RB_HALT;
456 1.1 simonb goto haltsys;
457 1.1 simonb }
458 1.1 simonb
459 1.1 simonb if ((boothowto & RB_NOSYNC) == 0 && waittime < 0) {
460 1.1 simonb waittime = 0;
461 1.1 simonb
462 1.1 simonb /*
463 1.1 simonb * Synchronize the disks....
464 1.1 simonb */
465 1.1 simonb vfs_shutdown();
466 1.1 simonb
467 1.1 simonb /*
468 1.1 simonb * If we've been adjusting the clock, the todr
469 1.1 simonb * will be out of synch; adjust it now.
470 1.1 simonb */
471 1.1 simonb resettodr();
472 1.1 simonb }
473 1.1 simonb
474 1.1 simonb /* Disable interrupts. */
475 1.1 simonb splhigh();
476 1.1 simonb
477 1.1 simonb if (boothowto & RB_DUMP)
478 1.1 simonb dumpsys();
479 1.1 simonb
480 1.1 simonb haltsys:
481 1.1 simonb /* Run any shutdown hooks. */
482 1.1 simonb doshutdownhooks();
483 1.1 simonb
484 1.38 dyoung pmf_system_shutdown(boothowto);
485 1.38 dyoung
486 1.26 gdamore if ((boothowto & RB_POWERDOWN) == RB_POWERDOWN)
487 1.26 gdamore if (board && board->ab_poweroff)
488 1.26 gdamore board->ab_poweroff();
489 1.26 gdamore
490 1.26 gdamore /*
491 1.26 gdamore * YAMON may autoboot (depending on settings), and we cannot pass
492 1.26 gdamore * flags to it (at least I haven't figured out how to yet), so
493 1.26 gdamore * we "pseudo-halt" now.
494 1.26 gdamore */
495 1.26 gdamore if (boothowto & RB_HALT) {
496 1.26 gdamore printf("\n");
497 1.26 gdamore printf("The operating system has halted.\n");
498 1.26 gdamore printf("Please press any key to reboot.\n\n");
499 1.26 gdamore cnpollc(1); /* For proper keyboard command handling */
500 1.26 gdamore cngetc();
501 1.26 gdamore cnpollc(0);
502 1.26 gdamore }
503 1.26 gdamore
504 1.30 simonb printf("reseting board...\n\n");
505 1.30 simonb
506 1.26 gdamore /*
507 1.26 gdamore * Try to use board-specific reset logic, which might involve a better
508 1.26 gdamore * hardware reset.
509 1.26 gdamore */
510 1.26 gdamore if (board->ab_reboot)
511 1.26 gdamore board->ab_reboot();
512 1.26 gdamore
513 1.1 simonb #if 1
514 1.1 simonb /* XXX
515 1.1 simonb * For some reason we are leaving the ethernet MAC in a state where
516 1.1 simonb * YAMON isn't happy with it. So just call the reset vector (grr,
517 1.1 simonb * Alchemy YAMON doesn't have a "reset" command).
518 1.1 simonb */
519 1.1 simonb mips_icache_sync_all();
520 1.1 simonb mips_dcache_wbinv_all();
521 1.21 perry __asm volatile("jr %0" :: "r"(MIPS_RESET_EXC_VEC));
522 1.1 simonb #else
523 1.1 simonb printf("%s\n\n", ((howto & RB_HALT) != 0) ? "halted." : "rebooting...");
524 1.1 simonb yamon_exit(boothowto);
525 1.1 simonb printf("Oops, back from yamon_exit()\n\nSpinning...");
526 1.1 simonb #endif
527 1.1 simonb for (;;)
528 1.1 simonb /* spin forever */ ; /* XXX */
529 1.1 simonb /*NOTREACHED*/
530 1.1 simonb }
531 1.24 gdamore
532 1.25 gdamore /*
533 1.25 gdamore * Export our interrupt map function so aupci can find it.
534 1.25 gdamore */
535 1.24 gdamore int
536 1.25 gdamore aupci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
537 1.24 gdamore {
538 1.25 gdamore const struct alchemy_board *board;
539 1.24 gdamore
540 1.24 gdamore board = board_info();
541 1.24 gdamore if (board->ab_pci_intr_map != NULL)
542 1.24 gdamore return (board->ab_pci_intr_map(pa, ihp));
543 1.25 gdamore return 1;
544 1.24 gdamore }
545 1.27 gdamore
546 1.27 gdamore struct aupcmcia_machdep *
547 1.27 gdamore aupcmcia_machdep(void)
548 1.27 gdamore {
549 1.27 gdamore const struct alchemy_board *board;
550 1.27 gdamore
551 1.27 gdamore board = board_info();
552 1.27 gdamore return (board->ab_pcmcia);
553 1.27 gdamore }
554 1.31 gdamore
555 1.31 gdamore const struct auspi_machdep *
556 1.31 gdamore auspi_machdep(bus_addr_t ba)
557 1.31 gdamore {
558 1.31 gdamore const struct alchemy_board *board;
559 1.31 gdamore
560 1.31 gdamore board = board_info();
561 1.31 gdamore if (board->ab_spi != NULL)
562 1.31 gdamore return (board->ab_spi(ba));
563 1.31 gdamore return NULL;
564 1.31 gdamore }
565