omsal400.c revision 1.2 
1/* $NetBSD: omsal400.c,v 1.2 2006/02/23 17:47:35 shige Exp $ */
2
3/*-
4 * Copyright (c) 2006 Itronix Inc.
5 * Copyright (c) 2006 Shigeyuki Fukushima.
6 * All rights reserved.
7 *
8 * Written by Garrett D'Amore for Itronix Inc
9 * Written by Shigeyuki Fukushima.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above
17 *    copyright notice, this list of conditions and the following
18 *    disclaimer in the documentation and/or other materials provided
19 *    with the distribution.
20 * 3. The name of the author may not be used to endorse or promote
21 *    products derived from this software without specific prior
22 *    written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
25 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
28 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
30 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
33 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 */
36
37
38#include <sys/cdefs.h>
39__KERNEL_RCSID(0, "$NetBSD: omsal400.c,v 1.2 2006/02/23 17:47:35 shige Exp $");
40
41#include <sys/param.h>
42#include <machine/bus.h>
43#include <machine/locore.h>
44#include <evbmips/alchemy/obiovar.h>
45#include <evbmips/alchemy/board.h>
46#include <evbmips/alchemy/omsal400reg.h>
47
48#define	GET16(x)	\
49	(*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)))
50#define	PUT16(x, v)	\
51	(*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)) = (v))
52
53static void	omsal400_init(void);
54static int	omsal400_pci_intr_map(struct pci_attach_args *,
55					 pci_intr_handle_t *);
56static void	omsal400_poweroff(void);
57static void	omsal400_reboot(void);
58
59static const struct obiodev omsal400_devices[] = {
60	{ NULL },
61};
62
63static struct alchemy_board omsal400_info = {
64	"Plathome Open Micro Sever AL400/AMD Alchemy Au1550",
65	omsal400_devices,
66	omsal400_init,
67	omsal400_pci_intr_map,
68	omsal400_reboot,
69	omsal400_poweroff,
70};
71
72const struct alchemy_board *
73board_info(void)
74{
75
76	return &omsal400_info;
77}
78
79void
80omsal400_init(void)
81{
82	/* uint16_t whoami; */
83
84	if (MIPS_PRID_COPTS(cpu_id) != MIPS_AU1550)
85		panic("omsal400: CPU not Au1550");
86
87#if 0 /* XXX: TODO borad identification */
88	/* check the whoami register for a match */
89	whoami = GET16(DBAU1550_WHOAMI);
90
91	if (DBAU1550_WHOAMI_BOARD(whoami) != DBAU1550_WHOAMI_DBAU1550_REV1)
92		panic("dbau1550: WHOAMI (%x) not DBAu1550!", whoami);
93
94	printf("DBAu1550 (cabernet), CPLDv%d, ",
95	    DBAU1550_WHOAMI_CPLD(whoami));
96
97	if (DBAU1550_WHOAMI_DAUGHTER(whoami) != 0xf)
98		printf("daughtercard 0x%x\n",
99		    DBAU1550_WHOAMI_DAUGHTER(whoami));
100	else
101		printf("no daughtercard\n");
102#endif
103
104	/* leave console and clocks alone -- YAMON should have got it right! */
105}
106
107int
108omsal400_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
109{
110	/*
111	 * This platform has 4 PCI devices:
112	 *  dev 1 (PCI_INTD):	PCI Connector
113	 *  dev 2 (PCI_INTC):	NEC USB 2.0 uPD720101
114	 *  dev 3 (PCI_INTB):	Intel GB Ether 82541PI
115	 *  dev 4 (PCI_INTA):	Intel GB Ether 82541PI
116	 */
117	static const int irqmap[5/*device*/][4/*pin*/] = {
118		{  6, -1, -1, -1 },	/* 1: PCI Connecter (not used) */
119		{  5,  5,  5, -1 },	/* 2: NEC USB 2.0 */
120		{  2, -1, -1, -1 },	/* 3: Intel GbE */
121		{  1, -1, -1, -1 },	/* 4: Intel GbE */
122	};
123
124	int pin, dev, irq;
125
126	/* if interrupt pin not used... */
127	if ((pin = pa->pa_intrpin) == 0)
128		return 1;
129
130	if (pin > 4) {
131		printf("pci: bad interrupt pin %d\n", pin);
132		return 1;
133	}
134
135	pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, NULL, &dev, NULL);
136
137	if ((dev < 1) || (dev > 4)) {
138		printf("pci: bad device %d\n", dev);
139		return 1;
140	}
141
142	if ((irq = irqmap[dev - 1][pin - 1]) == -1) {
143		printf("pci: no IRQ routing for device %d pin %d\n", dev, pin);
144		return 1;
145	}
146
147	*ihp = irq;
148	return 0;
149}
150
151void
152omsal400_reboot(void)
153{
154
155	/* XXX */
156}
157
158void
159omsal400_poweroff(void)
160{
161
162	printf("\n- poweroff -\n");
163	/* XXX */
164}
165