machdep.c revision 1.28.2.2
1 /* $NetBSD: machdep.c,v 1.28.2.2 2017/12/03 11:36:08 jdolecek Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Urbana-Champaign Independent Media Center. 5 * Copyright (c) 2006 Garrett D'Amore. 6 * All rights reserved. 7 * 8 * Portions of this code were written by Garrett D'Amore for the 9 * Champaign-Urbana Community Wireless Network Project. 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer in the documentation and/or other materials provided 19 * with the distribution. 20 * 3. All advertising materials mentioning features or use of this 21 * software must display the following acknowledgements: 22 * This product includes software developed by the Urbana-Champaign 23 * Independent Media Center. 24 * This product includes software developed by Garrett D'Amore. 25 * 4. Urbana-Champaign Independent Media Center's name and Garrett 26 * D'Amore's name may not be used to endorse or promote products 27 * derived from this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT 30 * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR 31 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 32 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 33 * ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT 34 * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT, 35 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 36 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 38 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 40 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 41 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 42 */ 43 /*- 44 * Copyright (c) 2006 Itronix Inc. 45 * All rights reserved. 46 * 47 * Portions written by Garrett D'Amore for Itronix Inc. 48 * 49 * Redistribution and use in source and binary forms, with or without 50 * modification, are permitted provided that the following conditions 51 * are met: 52 * 1. Redistributions of source code must retain the above copyright 53 * notice, this list of conditions and the following disclaimer. 54 * 2. Redistributions in binary form must reproduce the above copyright 55 * notice, this list of conditions and the following disclaimer in the 56 * documentation and/or other materials provided with the distribution. 57 * 3. The name of Itronix Inc. may not be used to endorse 58 * or promote products derived from this software without specific 59 * prior written permission. 60 * 61 * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND 62 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 63 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 64 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY 65 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 66 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 67 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 68 * ON ANY THEORY OF LIABILITY, WHETHER IN 69 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 70 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 71 * POSSIBILITY OF SUCH DAMAGE. 72 */ 73 74 /* 75 * Copyright (c) 1988 University of Utah. 76 * Copyright (c) 1992, 1993 77 * The Regents of the University of California. All rights reserved. 78 * 79 * This code is derived from software contributed to Berkeley by 80 * the Systems Programming Group of the University of Utah Computer 81 * Science Department, The Mach Operating System project at 82 * Carnegie-Mellon University and Ralph Campbell. 83 * 84 * Redistribution and use in source and binary forms, with or without 85 * modification, are permitted provided that the following conditions 86 * are met: 87 * 1. Redistributions of source code must retain the above copyright 88 * notice, this list of conditions and the following disclaimer. 89 * 2. Redistributions in binary form must reproduce the above copyright 90 * notice, this list of conditions and the following disclaimer in the 91 * documentation and/or other materials provided with the distribution. 92 * 3. Neither the name of the University nor the names of its contributors 93 * may be used to endorse or promote products derived from this software 94 * without specific prior written permission. 95 * 96 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 97 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 98 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 99 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 100 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 101 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 102 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 103 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 104 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 105 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 106 * SUCH DAMAGE. 107 * 108 * @(#)machdep.c 8.3 (Berkeley) 1/12/94 109 * from: Utah Hdr: machdep.c 1.63 91/04/24 110 */ 111 112 #include <sys/cdefs.h> 113 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.28.2.2 2017/12/03 11:36:08 jdolecek Exp $"); 114 115 #include "opt_ddb.h" 116 #include "opt_kgdb.h" 117 #include "opt_modular.h" 118 119 #include <sys/param.h> 120 #include <sys/boot_flag.h> 121 #include <sys/device.h> 122 #include <sys/kernel.h> 123 #include <sys/kcore.h> 124 #include <sys/ksyms.h> 125 #include <sys/mount.h> 126 #include <sys/reboot.h> 127 #include <sys/cpu.h> 128 129 #include <uvm/uvm_extern.h> 130 131 #include <dev/cons.h> 132 133 #include "ksyms.h" 134 135 #if NKSYMS || defined(DDB) || defined(MODULAR) 136 #include <mips/db_machdep.h> 137 #include <ddb/db_extern.h> 138 #endif 139 140 #include <mips/cache.h> 141 #include <mips/locore.h> 142 #include <mips/cpuregs.h> 143 144 #include <mips/atheros/include/platform.h> 145 #include <mips/atheros/include/arbusvar.h> 146 147 /* Maps for VM objects. */ 148 struct vm_map *phys_map = NULL; 149 150 int maxmem; /* max memory per process */ 151 152 int mem_cluster_cnt; 153 phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX]; 154 155 void mach_init(void); /* XXX */ 156 157 static void 158 cal_timer(void) 159 { 160 uint32_t cntfreq; 161 162 cntfreq = curcpu()->ci_cpu_freq = atheros_get_cpu_freq(); 163 164 /* MIPS 4Kc CP0 counts every other clock */ 165 if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT) 166 cntfreq /= 2; 167 168 curcpu()->ci_cctr_freq = cntfreq; 169 curcpu()->ci_cycles_per_hz = (cntfreq + hz / 2) / hz; 170 171 /* Compute number of cycles per 1us (1/MHz). 0.5MHz is for roundup. */ 172 curcpu()->ci_divisor_delay = ((cntfreq + 500000) / 1000000); 173 } 174 175 void 176 mach_init(void) 177 { 178 void *kernend; 179 uint32_t memsize; 180 181 extern char edata[], end[]; /* XXX */ 182 183 /* clear the BSS segment */ 184 kernend = (void *)mips_round_page(end); 185 186 memset(edata, 0, (char *)kernend - edata); 187 188 /* setup early console */ 189 atheros_set_platformsw(); 190 191 /* set CPU model info for sysctl_hw */ 192 cpu_setmodel("Atheros %s", atheros_get_cpuname()); 193 194 /* 195 * Set up the exception vectors and CPU-specific function 196 * vectors early on. We need the wbflush() vector set up 197 * before comcnattach() is called (or at least before the 198 * first printf() after that is called). 199 * Sets up mips_cpu_flags that may be queried by other 200 * functions called during startup. 201 * Also clears the I+D caches. 202 */ 203 mips_vector_init(NULL, false); 204 205 /* 206 * Calibrate timers. 207 */ 208 cal_timer(); 209 210 uvm_md_init(); 211 212 /* 213 * Look at arguments passed to us and compute boothowto. 214 */ 215 boothowto = RB_AUTOBOOT; 216 #ifdef KADB 217 boothowto |= RB_KDB; 218 #endif 219 220 /* 221 * This would be a good place to parse a boot command line, if 222 * we got one from the bootloader. Right now we have no way to 223 * get one from e.g. vxworks. 224 */ 225 226 /* 227 * Determine the memory size. 228 * 229 * Note: Reserve the first page! That's where the trap 230 * vectors are located. 231 */ 232 memsize = atheros_get_memsize(); 233 234 printf("Memory size: 0x%08x\n", memsize); 235 physmem = btoc(memsize); 236 237 mem_clusters[mem_cluster_cnt].start = PAGE_SIZE; 238 mem_clusters[mem_cluster_cnt].size = 239 memsize - mem_clusters[mem_cluster_cnt].start; 240 mem_cluster_cnt++; 241 242 /* 243 * Load the available pages into the VM system. 244 */ 245 mips_page_physload(MIPS_KSEG0_START, (vaddr_t)kernend, 246 mem_clusters, mem_cluster_cnt, NULL, 0); 247 248 /* 249 * Initialize message buffer (at end of core). 250 */ 251 mips_init_msgbuf(); 252 253 /* 254 * Initialize the virtual memory system. 255 */ 256 pmap_bootstrap(); 257 258 /* 259 * Allocate uarea page for lwp0 and set it. 260 */ 261 mips_init_lwp0_uarea(); 262 263 /* 264 * Initialize busses. 265 */ 266 atheros_bus_init(); 267 268 /* 269 * Turn off (ignore) the hardware watchdog. If we got this 270 * far, then we shouldn't need it anymore. 271 */ 272 atheros_wdog_reload(0); 273 274 /* 275 * Turn off watchpoint that may have been enabled by the 276 * PROM. VxWorks bootloader seems to leave one set. 277 */ 278 __asm volatile ( 279 "mtc0 $0, $%0\n\t" 280 "nop\n\t" 281 "nop\n\t" :: "n"(MIPS_COP_0_WATCH_LO)); 282 283 /* 284 * Initialize debuggers, and break into them, if appropriate. 285 */ 286 #ifdef DDB 287 if (boothowto & RB_KDB) 288 Debugger(); 289 #endif 290 } 291 292 void 293 consinit(void) 294 { 295 296 /* 297 * Everything related to console initialization is done 298 * in mach_init(). 299 */ 300 atheros_consinit(); 301 } 302 303 void 304 cpu_startup(void) 305 { 306 cpu_startup_common(); 307 } 308 309 void 310 cpu_reboot(int howto, char *bootstr) 311 { 312 static int waittime = -1; 313 314 /* Take a snapshot before clobbering any registers. */ 315 savectx(curpcb); 316 317 /* If "always halt" was specified as a boot flag, obey. */ 318 if (boothowto & RB_HALT) 319 howto |= RB_HALT; 320 321 boothowto = howto; 322 323 /* If system is cold, just halt. */ 324 if (cold) { 325 boothowto |= RB_HALT; 326 goto haltsys; 327 } 328 329 if ((boothowto & RB_NOSYNC) == 0 && waittime < 0) { 330 waittime = 0; 331 332 /* 333 * Synchronize the disks.... 334 */ 335 vfs_shutdown(); 336 337 /* 338 * If we've been adjusting the clock, the todr 339 * will be out of synch; adjust it now. 340 */ 341 resettodr(); 342 } 343 344 /* Disable interrupts. */ 345 splhigh(); 346 347 if (boothowto & RB_DUMP) 348 dumpsys(); 349 350 haltsys: 351 /* Run any shutdown hooks. */ 352 doshutdownhooks(); 353 354 pmf_system_shutdown(boothowto); 355 356 #if 0 357 if ((boothowto & RB_POWERDOWN) == RB_POWERDOWN) 358 if (board && board->ab_poweroff) 359 board->ab_poweroff(); 360 #endif 361 362 /* 363 * Firmware may autoboot (depending on settings), and we cannot pass 364 * flags to it (at least I haven't figured out how to yet), so 365 * we "pseudo-halt" now. 366 */ 367 if (boothowto & RB_HALT) { 368 printf("\n"); 369 printf("The operating system has halted.\n"); 370 printf("Please press any key to reboot.\n\n"); 371 cnpollc(1); /* For proper keyboard command handling */ 372 cngetc(); 373 cnpollc(0); 374 } 375 376 printf("reseting board...\n\n"); 377 mips_icache_sync_all(); 378 mips_dcache_wbinv_all(); 379 atheros_reset(); 380 __asm volatile("jr %0" :: "r"(MIPS_RESET_EXC_VEC)); 381 printf("Oops, back from reset\n\nSpinning..."); 382 for (;;) 383 /* spin forever */ ; /* XXX */ 384 /*NOTREACHED*/ 385 } 386
Indexes created Tue Oct 28 12:10:06 GMT 2025