machdep.c revision 1.5.4.2
1 /* $NetBSD: machdep.c,v 1.5.4.2 2007/04/18 20:27:51 ad Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Urbana-Champaign Independent Media Center. 5 * Copyright (c) 2006 Garrett D'Amore. 6 * All rights reserved. 7 * 8 * Portions of this code were written by Garrett D'Amore for the 9 * Champaign-Urbana Community Wireless Network Project. 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer in the documentation and/or other materials provided 19 * with the distribution. 20 * 3. All advertising materials mentioning features or use of this 21 * software must display the following acknowledgements: 22 * This product includes software developed by the Urbana-Champaign 23 * Independent Media Center. 24 * This product includes software developed by Garrett D'Amore. 25 * 4. Urbana-Champaign Independent Media Center's name and Garrett 26 * D'Amore's name may not be used to endorse or promote products 27 * derived from this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT 30 * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR 31 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 32 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 33 * ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT 34 * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT, 35 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 36 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 38 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 40 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 41 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 42 */ 43 /*- 44 * Copyright (c) 2006 Itronix Inc. 45 * All rights reserved. 46 * 47 * Portions written by Garrett D'Amore for Itronix Inc. 48 * 49 * Redistribution and use in source and binary forms, with or without 50 * modification, are permitted provided that the following conditions 51 * are met: 52 * 1. Redistributions of source code must retain the above copyright 53 * notice, this list of conditions and the following disclaimer. 54 * 2. Redistributions in binary form must reproduce the above copyright 55 * notice, this list of conditions and the following disclaimer in the 56 * documentation and/or other materials provided with the distribution. 57 * 3. The name of Itronix Inc. may not be used to endorse 58 * or promote products derived from this software without specific 59 * prior written permission. 60 * 61 * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND 62 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 63 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 64 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY 65 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 66 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 67 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 68 * ON ANY THEORY OF LIABILITY, WHETHER IN 69 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 70 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 71 * POSSIBILITY OF SUCH DAMAGE. 72 */ 73 /* 74 * Copyright (c) 1992, 1993 75 * The Regents of the University of California. All rights reserved. 76 * 77 * This code is derived from software contributed to Berkeley by 78 * the Systems Programming Group of the University of Utah Computer 79 * Science Department, The Mach Operating System project at 80 * Carnegie-Mellon University and Ralph Campbell. 81 * 82 * Redistribution and use in source and binary forms, with or without 83 * modification, are permitted provided that the following conditions 84 * are met: 85 * 1. Redistributions of source code must retain the above copyright 86 * notice, this list of conditions and the following disclaimer. 87 * 2. Redistributions in binary form must reproduce the above copyright 88 * notice, this list of conditions and the following disclaimer in the 89 * documentation and/or other materials provided with the distribution. 90 * 3. Neither the name of the University nor the names of its contributors 91 * may be used to endorse or promote products derived from this software 92 * without specific prior written permission. 93 * 94 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 95 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 96 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 97 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 98 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 99 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 100 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 101 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 102 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 103 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 104 * SUCH DAMAGE. 105 * 106 * @(#)machdep.c 8.3 (Berkeley) 1/12/94 107 * from: Utah Hdr: machdep.c 1.63 91/04/24 108 */ 109 /* 110 * Copyright (c) 1988 University of Utah. 111 * 112 * This code is derived from software contributed to Berkeley by 113 * the Systems Programming Group of the University of Utah Computer 114 * Science Department, The Mach Operating System project at 115 * Carnegie-Mellon University and Ralph Campbell. 116 * 117 * Redistribution and use in source and binary forms, with or without 118 * modification, are permitted provided that the following conditions 119 * are met: 120 * 1. Redistributions of source code must retain the above copyright 121 * notice, this list of conditions and the following disclaimer. 122 * 2. Redistributions in binary form must reproduce the above copyright 123 * notice, this list of conditions and the following disclaimer in the 124 * documentation and/or other materials provided with the distribution. 125 * 3. All advertising materials mentioning features or use of this software 126 * must display the following acknowledgement: 127 * This product includes software developed by the University of 128 * California, Berkeley and its contributors. 129 * 4. Neither the name of the University nor the names of its contributors 130 * may be used to endorse or promote products derived from this software 131 * without specific prior written permission. 132 * 133 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 134 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 135 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 136 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 137 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 138 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 139 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 140 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 141 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 142 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 143 * SUCH DAMAGE. 144 * 145 * @(#)machdep.c 8.3 (Berkeley) 1/12/94 146 * from: Utah Hdr: machdep.c 1.63 91/04/24 147 */ 148 149 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 150 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.5.4.2 2007/04/18 20:27:51 ad Exp $"); 151 152 #include "opt_ddb.h" 153 #include "opt_kgdb.h" 154 155 #include <sys/param.h> 156 #include <sys/systm.h> 157 #include <sys/kernel.h> 158 #include <sys/buf.h> 159 #include <sys/reboot.h> 160 #include <sys/user.h> 161 #include <sys/mount.h> 162 #include <sys/kcore.h> 163 #include <sys/boot_flag.h> 164 #include <sys/termios.h> 165 #include <sys/ksyms.h> 166 167 #include <uvm/uvm_extern.h> 168 169 #include <dev/cons.h> 170 171 #include "ksyms.h" 172 173 #if NKSYMS || defined(DDB) || defined(LKM) 174 #include <machine/db_machdep.h> 175 #include <ddb/db_extern.h> 176 #endif 177 178 #include <mips/cache.h> 179 #include <mips/locore.h> 180 #include <mips/cpuregs.h> 181 182 #include <mips/atheros/include/ar531xvar.h> 183 #include <mips/atheros/include/arbusvar.h> 184 185 struct user *proc0paddr; 186 187 /* Our exported CPU info; we can have only one. */ 188 struct cpu_info cpu_info_store; 189 190 /* Maps for VM objects. */ 191 struct vm_map *exec_map = NULL; 192 struct vm_map *mb_map = NULL; 193 struct vm_map *phys_map = NULL; 194 195 int physmem; /* # pages of physical memory */ 196 int maxmem; /* max memory per process */ 197 198 int mem_cluster_cnt; 199 phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX]; 200 201 void mach_init(void); /* XXX */ 202 203 static void 204 cal_timer(void) 205 { 206 uint32_t cntfreq; 207 208 cntfreq = curcpu()->ci_cpu_freq = ar531x_cpu_freq(); 209 210 /* MIPS 4Kc CP0 counts every other clock */ 211 if (mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT) 212 cntfreq /= 2; 213 214 curcpu()->ci_cycles_per_hz = (cntfreq + hz / 2) / hz; 215 216 /* XXX: i don't understand this logic, it was borrowed from Malta */ 217 curcpu()->ci_divisor_delay = ((cntfreq + 500000) / 1000000); 218 MIPS_SET_CI_RECIPRICAL(curcpu()); 219 } 220 221 void 222 mach_init(void) 223 { 224 void *kernend; 225 u_long first, last; 226 void * v; 227 uint32_t memsize; 228 229 extern char edata[], end[]; /* XXX */ 230 231 /* clear the BSS segment */ 232 kernend = (void *)mips_round_page(end); 233 234 memset(edata, 0, (char *)kernend - edata); 235 236 /* setup early console */ 237 ar531x_early_console(); 238 239 /* set CPU model info for sysctl_hw */ 240 snprintf(cpu_model, 64, "%s", ar531x_cpuname()); 241 242 /* 243 * Set up the exception vectors and CPU-specific function 244 * vectors early on. We need the wbflush() vector set up 245 * before comcnattach() is called (or at least before the 246 * first printf() after that is called). 247 * Sets up mips_cpu_flags that may be queried by other 248 * functions called during startup. 249 * Also clears the I+D caches. 250 */ 251 mips_vector_init(); 252 253 /* 254 * Calibrate timers. 255 */ 256 cal_timer(); 257 258 /* 259 * Set the VM page size. 260 */ 261 uvm_setpagesize(); 262 263 /* 264 * Look at arguments passed to us and compute boothowto. 265 */ 266 boothowto = RB_AUTOBOOT; 267 #ifdef KADB 268 boothowto |= RB_KDB; 269 #endif 270 271 /* 272 * This would be a good place to parse a boot command line, bif 273 * we got one from the bootloader. Right now we have no way to 274 * get one from e.g. vxworks. 275 */ 276 277 /* 278 * Determine the memory size. 279 * 280 * Note: Reserve the first page! That's where the trap 281 * vectors are located. 282 */ 283 memsize = ar531x_memsize(); 284 285 printf("Memory size: 0x%08x\n", memsize); 286 physmem = btoc(memsize); 287 288 mem_clusters[mem_cluster_cnt].start = PAGE_SIZE; 289 mem_clusters[mem_cluster_cnt].size = 290 memsize - mem_clusters[mem_cluster_cnt].start; 291 mem_cluster_cnt++; 292 293 /* 294 * Load the rest of the available pages into the VM system. 295 */ 296 first = round_page(MIPS_KSEG0_TO_PHYS(kernend)); 297 last = mem_clusters[0].start + mem_clusters[0].size; 298 uvm_page_physload(atop(first), atop(last), atop(first), atop(last), 299 VM_FREELIST_DEFAULT); 300 301 /* 302 * Initialize message buffer (at end of core). 303 */ 304 mips_init_msgbuf(); 305 306 /* 307 * Initialize the virtual memory system. 308 */ 309 pmap_bootstrap(); 310 311 /* 312 * Init mapping for u page(s) for proc0. 313 */ 314 v = (void *) uvm_pageboot_alloc(USPACE); 315 lwp0.l_addr = proc0paddr = (struct user *)v; 316 lwp0.l_md.md_regs = (struct frame *)((char *)v + USPACE) - 1; 317 proc0paddr->u_ucb.pcb_context[11] = 318 MIPS_INT_MASK | MIPS_SR_INT_IE; /* SR */ 319 320 /* 321 * Initialize busses. 322 */ 323 ar531x_businit(); 324 325 /* 326 * Turn off (ignore) the hardware watchdog. If we got this 327 * far, then we shouldn't need it anymore. 328 */ 329 ar531x_wdog(0); 330 331 /* 332 * Turn off watchpoint that may have been enabled by the 333 * PROM. VxWorks bootloader seems to leave one set. 334 */ 335 __asm volatile ( 336 "mtc0 $0, $" ___STRING(MIPS_COP_0_WATCH_LO) " \n\t" 337 "nop\n\t" 338 "nop\n\t"); 339 340 /* 341 * Initialize debuggers, and break into them, if appropriate. 342 */ 343 #if NKSYMS || defined(DDB) || defined(LKM) 344 ksyms_init(0, 0, 0); 345 #endif 346 347 #ifdef DDB 348 if (boothowto & RB_KDB) 349 Debugger(); 350 #endif 351 } 352 353 void 354 consinit(void) 355 { 356 357 /* 358 * Everything related to console initialization is done 359 * in mach_init(). 360 */ 361 ar531x_consinit(); 362 } 363 364 void 365 cpu_startup(void) 366 { 367 char pbuf[9]; 368 vaddr_t minaddr, maxaddr; 369 #ifdef DEBUG 370 extern int pmapdebug; /* XXX */ 371 int opmapdebug = pmapdebug; 372 373 pmapdebug = 0; /* Shut up pmap debug during bootstrap */ 374 #endif 375 376 /* 377 * Good {morning,afternoon,evening,night}. 378 */ 379 printf("%s%s", copyright, version); 380 printf("%s\n", cpu_model); 381 format_bytes(pbuf, sizeof(pbuf), ctob(physmem)); 382 printf("total memory = %s\n", pbuf); 383 384 minaddr = 0; 385 /* 386 * Allocate a submap for exec arguments. This map effectively 387 * limits the number of processes exec'ing at any time. 388 */ 389 exec_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 390 16 * NCARGS, VM_MAP_PAGEABLE, FALSE, NULL); 391 392 /* 393 * Allocate a submap for physio 394 */ 395 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 396 VM_PHYS_SIZE, 0, FALSE, NULL); 397 398 /* 399 * No need to allocate an mbuf cluster submap. Mbuf clusters 400 * are allocated via the pool allocator, and we use KSEG to 401 * map those pages. 402 */ 403 404 #ifdef DEBUG 405 pmapdebug = opmapdebug; 406 #endif 407 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free)); 408 printf("avail memory = %s\n", pbuf); 409 } 410 411 void 412 cpu_reboot(int howto, char *bootstr) 413 { 414 static int waittime = -1; 415 416 /* Take a snapshot before clobbering any registers. */ 417 if (curproc) 418 savectx((struct user *)curpcb); 419 420 /* If "always halt" was specified as a boot flag, obey. */ 421 if (boothowto & RB_HALT) 422 howto |= RB_HALT; 423 424 boothowto = howto; 425 426 /* If system is cold, just halt. */ 427 if (cold) { 428 boothowto |= RB_HALT; 429 goto haltsys; 430 } 431 432 if ((boothowto & RB_NOSYNC) == 0 && waittime < 0) { 433 waittime = 0; 434 435 /* 436 * Synchronize the disks.... 437 */ 438 vfs_shutdown(); 439 440 /* 441 * If we've been adjusting the clock, the todr 442 * will be out of synch; adjust it now. 443 */ 444 resettodr(); 445 } 446 447 /* Disable interrupts. */ 448 splhigh(); 449 450 if (boothowto & RB_DUMP) 451 dumpsys(); 452 453 haltsys: 454 /* Run any shutdown hooks. */ 455 doshutdownhooks(); 456 457 #if 0 458 if ((boothowto & RB_POWERDOWN) == RB_POWERDOWN) 459 if (board && board->ab_poweroff) 460 board->ab_poweroff(); 461 #endif 462 463 /* 464 * Firmware may autoboot (depending on settings), and we cannot pass 465 * flags to it (at least I haven't figured out how to yet), so 466 * we "pseudo-halt" now. 467 */ 468 if (boothowto & RB_HALT) { 469 printf("\n"); 470 printf("The operating system has halted.\n"); 471 printf("Please press any key to reboot.\n\n"); 472 cnpollc(1); /* For proper keyboard command handling */ 473 cngetc(); 474 cnpollc(0); 475 } 476 477 printf("reseting board...\n\n"); 478 mips_icache_sync_all(); 479 mips_dcache_wbinv_all(); 480 __asm volatile("jr %0" :: "r"(MIPS_RESET_EXC_VEC)); 481 printf("Oops, back from reset\n\nSpinning..."); 482 for (;;) 483 /* spin forever */ ; /* XXX */ 484 /*NOTREACHED*/ 485 } 486
Indexes created Mon Oct 27 20:09:55 GMT 2025