machdep.c revision 1.21
1 /* $NetBSD: machdep.c,v 1.21 2020/07/22 13:24:17 simonb Exp $ */ 2 3 /* 4 * Copyright 2001, 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Copyright (c) 1992, 1993 40 * The Regents of the University of California. All rights reserved. 41 * 42 * This code is derived from software contributed to Berkeley by 43 * the Systems Programming Group of the University of Utah Computer 44 * Science Department, The Mach Operating System project at 45 * Carnegie-Mellon University and Ralph Campbell. 46 * 47 * Redistribution and use in source and binary forms, with or without 48 * modification, are permitted provided that the following conditions 49 * are met: 50 * 1. Redistributions of source code must retain the above copyright 51 * notice, this list of conditions and the following disclaimer. 52 * 2. Redistributions in binary form must reproduce the above copyright 53 * notice, this list of conditions and the following disclaimer in the 54 * documentation and/or other materials provided with the distribution. 55 * 3. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)machdep.c 8.3 (Berkeley) 1/12/94 72 * from: Utah Hdr: machdep.c 1.63 91/04/24 73 */ 74 /* 75 * Copyright (c) 1988 University of Utah. 76 * 77 * This code is derived from software contributed to Berkeley by 78 * the Systems Programming Group of the University of Utah Computer 79 * Science Department, The Mach Operating System project at 80 * Carnegie-Mellon University and Ralph Campbell. 81 * 82 * Redistribution and use in source and binary forms, with or without 83 * modification, are permitted provided that the following conditions 84 * are met: 85 * 1. Redistributions of source code must retain the above copyright 86 * notice, this list of conditions and the following disclaimer. 87 * 2. Redistributions in binary form must reproduce the above copyright 88 * notice, this list of conditions and the following disclaimer in the 89 * documentation and/or other materials provided with the distribution. 90 * 3. All advertising materials mentioning features or use of this software 91 * must display the following acknowledgement: 92 * This product includes software developed by the University of 93 * California, Berkeley and its contributors. 94 * 4. Neither the name of the University nor the names of its contributors 95 * may be used to endorse or promote products derived from this software 96 * without specific prior written permission. 97 * 98 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 99 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 100 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 101 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 102 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 103 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 104 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 105 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 106 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 107 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 108 * SUCH DAMAGE. 109 * 110 * @(#)machdep.c 8.3 (Berkeley) 1/12/94 111 * from: Utah Hdr: machdep.c 1.63 91/04/24 112 */ 113 114 #include "opt_multiprocessor.h" 115 116 #include <sys/cdefs.h> 117 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.21 2020/07/22 13:24:17 simonb Exp $"); 118 119 #include <sys/param.h> 120 #include <sys/systm.h> 121 #include <sys/kernel.h> 122 #include <sys/buf.h> 123 #include <sys/cpu.h> 124 #include <sys/reboot.h> 125 #include <sys/mount.h> 126 #include <sys/kcore.h> 127 #include <sys/boot_flag.h> 128 #include <sys/termios.h> 129 #include <sys/ksyms.h> 130 131 #include <uvm/uvm_extern.h> 132 133 #include <dev/cons.h> 134 135 #include "ksyms.h" 136 137 #if NKSYMS || defined(DDB) || defined(LKM) 138 #include <machine/db_machdep.h> 139 #include <ddb/db_extern.h> 140 #endif 141 142 #include <machine/psl.h> 143 #include <machine/locore.h> 144 145 #include <mips/cavium/autoconf.h> 146 #include <mips/cavium/octeonvar.h> 147 #include <mips/cavium/include/iobusvar.h> 148 #include <mips/cavium/include/bootbusvar.h> 149 150 #include <mips/cavium/dev/octeon_uartvar.h> 151 #include <mips/cavium/dev/octeon_ciureg.h> 152 #include <mips/cavium/dev/octeon_gpioreg.h> 153 154 #include <evbmips/cavium/octeon_uboot.h> 155 156 #include <dev/fdt/fdtvar.h> 157 #include <dev/fdt/fdt_private.h> 158 159 static void mach_init_vector(void); 160 static void mach_init_bus_space(void); 161 static void mach_init_console(void); 162 static void mach_init_memory(void); 163 static void parse_boot_args(void); 164 165 #include "com.h" 166 #if NCOM > 0 167 #include <dev/ic/comreg.h> 168 #include <dev/ic/comvar.h> 169 int comcnrate = 115200; /* XXX should be config option */ 170 #endif /* NCOM > 0 */ 171 172 /* Maps for VM objects. */ 173 struct vm_map *phys_map = NULL; 174 175 int netboot; 176 177 phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX]; 178 int mem_cluster_cnt; 179 extern char kernel_text[]; 180 extern char edata[]; 181 extern char end[]; 182 183 void mach_init(uint64_t, uint64_t, uint64_t, uint64_t); 184 185 struct octeon_config octeon_configuration; 186 struct octeon_btdesc octeon_btdesc; 187 struct octeon_btinfo octeon_btinfo; 188 189 char octeon_nmi_stack[PAGE_SIZE] __section(".data1") __aligned(PAGE_SIZE); 190 191 /* 192 * Do all the stuff that locore normally does before calling main(). 193 */ 194 void 195 mach_init(uint64_t arg0, uint64_t arg1, uint64_t arg2, uint64_t arg3) 196 { 197 uint64_t btinfo_paddr; 198 void *fdt_data; 199 200 /* clear the BSS segment */ 201 memset(edata, 0, end - edata); 202 203 cpu_reset_address = octeon_soft_reset; 204 205 #if 1 || defined(OCTEON_EARLY_CONSOLE) /* XXX - remove "1 ||" when MP works */ 206 /* 207 * Set up very conservative timer params so we can use delay(9) 208 * early. It doesn't matter if we delay too long at this stage. 209 */ 210 octeon_cal_timer(2000 * 1000 * 1000); 211 octuart_early_cnattach(comcnrate); 212 #endif /* OCTEON_EARLY_CONSOLE */ 213 214 KASSERT(MIPS_XKPHYS_P(arg3)); 215 btinfo_paddr = mips3_ld(arg3 + OCTEON_BTINFO_PADDR_OFFSET); 216 217 /* XXX KASSERT these addresses? */ 218 memcpy(&octeon_btdesc, (void *)arg3, sizeof(octeon_btdesc)); 219 if ((octeon_btdesc.obt_desc_ver == OCTEON_SUPPORTED_DESCRIPTOR_VERSION) && 220 (octeon_btdesc.obt_desc_size == sizeof(octeon_btdesc))) { 221 btinfo_paddr = MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE, 222 octeon_btdesc.obt_boot_info_addr); 223 } else { 224 panic("unknown boot descriptor size %u", 225 octeon_btdesc.obt_desc_size); 226 } 227 memcpy(&octeon_btinfo, (void *)btinfo_paddr, sizeof(octeon_btinfo)); 228 parse_boot_args(); 229 230 octeon_cal_timer(octeon_btinfo.obt_eclock_hz); 231 232 cpu_setmodel("Cavium Octeon %s", 233 octeon_cpu_model(mips_options.mips_cpu_id)); 234 235 if (octeon_btinfo.obt_minor_version >= 3 && 236 octeon_btinfo.obt_fdt_addr != 0) { 237 fdt_data = (void *)MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE, 238 octeon_btinfo.obt_fdt_addr); 239 fdtbus_init(fdt_data); 240 } 241 242 mach_init_vector(); 243 244 uvm_md_init(); 245 246 mach_init_bus_space(); 247 248 mach_init_console(); 249 250 #ifdef DEBUG 251 /* Show a couple of boot desc/info params for positive feedback */ 252 printf(">> boot desc eclock = %d\n", octeon_btdesc.obt_eclock); 253 printf(">> boot desc core mask = %#x\n", octeon_btinfo.obt_core_mask); 254 printf(">> boot info board = %d\n", octeon_btinfo.obt_board_type); 255 #endif /* DEBUG */ 256 257 mach_init_memory(); 258 259 /* 260 * Allocate uarea page for lwp0 and set it. 261 */ 262 mips_init_lwp0_uarea(); 263 264 #if 0 265 curcpu()->ci_nmi_stack = octeon_nmi_stack + sizeof(octeon_nmi_stack) - sizeof(struct kernframe); 266 *(uint64_t *)MIPS_PHYS_TO_KSEG0(0x800) = (intptr_t)octeon_reset_vector; 267 const uint64_t wdog_reg = MIPS_PHYS_TO_XKPHYS_UNCACHED(CIU_WDOG0); 268 uint64_t wdog = mips3_ld(wdog_reg); 269 wdog &= ~(CIU_WDOGX_MODE|CIU_WDOGX_LEN); 270 wdog |= __SHIFTIN(3, CIU_WDOGX_MODE); 271 wdog |= CIU_WDOGX_LEN; // max period 272 mips64_sd_a64(wdog_reg, wdog); 273 printf("Watchdog enabled!\n"); 274 #endif 275 276 #if defined(DDB) 277 if (boothowto & RB_KDB) 278 Debugger(); 279 #endif 280 } 281 282 void 283 consinit(void) 284 { 285 286 /* 287 * Everything related to console initialization is done 288 * in mach_init(). 289 */ 290 } 291 292 void 293 mach_init_vector(void) 294 { 295 296 /* Make sure exception base at 0 (MIPS_COP_0_EBASE) */ 297 __asm __volatile("mtc0 %0, $15, 1" : : "r"(0x80000000) ); 298 299 /* 300 * Set up the exception vectors and CPU-specific function 301 * vectors early on. We need the wbflush() vector set up 302 * before comcnattach() is called (or at least before the 303 * first printf() after that is called). 304 * Also clears the I+D caches. 305 */ 306 mips_vector_init(NULL, true); 307 } 308 309 void 310 mach_init_bus_space(void) 311 { 312 struct octeon_config *mcp = &octeon_configuration; 313 314 octeon_dma_init(mcp); 315 316 iobus_bootstrap(mcp); 317 bootbus_bootstrap(mcp); 318 } 319 320 void 321 mach_init_console(void) 322 { 323 #if NCOM > 0 324 struct octeon_config *mcp = &octeon_configuration; 325 int status; 326 extern int octuart_com_cnattach(bus_space_tag_t, int, int); 327 328 /* 329 * Delay to allow firmware putchars to complete. 330 * FIFO depth * character time. 331 * character time = (1000000 / (defaultrate / 10)) 332 */ 333 delay(640000000 / comcnrate); 334 335 status = octuart_com_cnattach( 336 &mcp->mc_iobus_bust, 337 0, /* XXX port 0 */ 338 comcnrate); 339 if (status != 0) 340 panic("can't initialize console!"); /* XXX print to nowhere! */ 341 #else 342 panic("octeon: not configured to use serial console"); 343 #endif /* NCOM > 0 */ 344 } 345 346 static void 347 mach_init_memory(void) 348 { 349 struct octeon_bootmem_desc *memdesc; 350 struct octeon_bootmem_block_header *block; 351 paddr_t blockaddr; 352 int i; 353 354 mem_cluster_cnt = 0; 355 356 if (octeon_btinfo.obt_phy_mem_desc_addr == 0) 357 panic("bootmem desc is missing"); 358 359 memdesc = (void *)MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE, 360 octeon_btinfo.obt_phy_mem_desc_addr); 361 printf("u-boot bootmem desc @ 0x%x version %d.%d\n", 362 octeon_btinfo.obt_phy_mem_desc_addr, 363 memdesc->bmd_major_version, memdesc->bmd_minor_version); 364 if (memdesc->bmd_major_version > 3) 365 panic("unhandled bootmem desc version %d.%d", 366 memdesc->bmd_major_version, memdesc->bmd_minor_version); 367 368 blockaddr = memdesc->bmd_head_addr; 369 if (blockaddr == 0) 370 panic("bootmem list is empty"); 371 372 for (i = 0; i < VM_PHYSSEG_MAX && blockaddr != 0; 373 i++, blockaddr = block->bbh_next_block_addr) { 374 block = (void *)MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE, blockaddr); 375 376 mem_clusters[mem_cluster_cnt].start = blockaddr; 377 mem_clusters[mem_cluster_cnt].size = block->bbh_size; 378 mem_cluster_cnt++; 379 } 380 381 physmem = btoc(octeon_btinfo.obt_dram_size * 1024 * 1024); 382 383 #ifdef MULTIPROCESSOR 384 const uint64_t fuse = octeon_xkphys_read_8(CIU_FUSE); 385 const int cores = popcount64(fuse); 386 mem_clusters[0].start += cores * PAGE_SIZE; 387 mem_clusters[0].size -= cores * PAGE_SIZE; 388 #endif 389 390 /* 391 * Load the rest of the available pages into the VM system. 392 */ 393 mips_page_physload(mips_trunc_page(kernel_text), mips_round_page(end), 394 mem_clusters, mem_cluster_cnt, NULL, 0); 395 396 /* 397 * Initialize error message buffer (at end of core). 398 */ 399 mips_init_msgbuf(); 400 401 pmap_bootstrap(); 402 } 403 404 void 405 parse_boot_args(void) 406 { 407 int i; 408 char *arg, *p; 409 410 for (i = 0; i < octeon_btdesc.obt_argc; i++) { 411 arg = (char *)MIPS_PHYS_TO_KSEG0(octeon_btdesc.obt_argv[i]); 412 if (*arg == '-') { 413 for (p = arg + 1; *p; p++) { 414 switch (*p) { 415 case '1': 416 boothowto |= RB_MD1; 417 break; 418 case 's': 419 boothowto |= RB_SINGLE; 420 break; 421 case 'd': 422 boothowto |= RB_KDB; 423 break; 424 case 'a': 425 boothowto |= RB_ASKNAME; 426 break; 427 case 'q': 428 boothowto |= AB_QUIET; 429 break; 430 case 'v': 431 boothowto |= AB_VERBOSE; 432 break; 433 case 'x': 434 boothowto |= AB_DEBUG; 435 break; 436 case 'z': 437 boothowto |= AB_SILENT; 438 break; 439 } 440 } 441 } 442 if (strncmp(arg, "root=", 5) == 0) 443 rootspec = strchr(arg, '=') + 1; 444 } 445 } 446 447 /* 448 * cpu_startup 449 * cpu_reboot 450 */ 451 452 int waittime = -1; 453 454 /* 455 * Allocate memory for variable-sized tables, 456 */ 457 void 458 cpu_startup(void) 459 { 460 #ifdef MULTIPROCESSOR 461 // Create a kcpuset so we can see on which CPUs the kernel was started. 462 kcpuset_create(&cpus_booted, true); 463 #endif 464 465 /* 466 * Do the common startup items. 467 */ 468 cpu_startup_common(); 469 470 /* 471 * Virtual memory is bootstrapped -- notify the bus spaces 472 * that memory allocation is now safe. 473 */ 474 octeon_configuration.mc_mallocsafe = 1; 475 476 fdtbus_intr_init(); 477 } 478 479 void 480 cpu_reboot(int howto, char *bootstr) 481 { 482 483 /* Take a snapshot before clobbering any registers. */ 484 savectx(curpcb); 485 486 if (cold) { 487 howto |= RB_HALT; 488 goto haltsys; 489 } 490 491 /* If "always halt" was specified as a boot flag, obey. */ 492 if (boothowto & RB_HALT) 493 howto |= RB_HALT; 494 495 boothowto = howto; 496 if ((howto & RB_NOSYNC) == 0 && (waittime < 0)) { 497 waittime = 0; 498 vfs_shutdown(); 499 500 /* 501 * If we've been adjusting the clock, the todr 502 * will be out of synch; adjust it now. 503 */ 504 resettodr(); 505 } 506 507 splhigh(); 508 509 if (howto & RB_DUMP) 510 dumpsys(); 511 512 haltsys: 513 doshutdownhooks(); 514 515 if (howto & RB_HALT) { 516 printf("\n"); 517 printf("The operating system has halted.\n"); 518 printf("Please press any key to reboot.\n\n"); 519 cnpollc(1); /* For proper keyboard command handling */ 520 cngetc(); 521 cnpollc(0); 522 } 523 524 printf("%s\n\n", ((howto & RB_HALT) != 0) ? "halted." : "rebooting..."); 525 526 /* 527 * Need a small delay here, otherwise we see the first few characters of 528 * the warning below. 529 */ 530 delay(80000); 531 532 octeon_soft_reset(); 533 534 delay(1000000); 535 536 printf("WARNING: reset failed!\nSpinning..."); 537 538 for (;;) 539 /* spin forever */ ; /* XXX */ 540 } 541
Indexes created Wed Oct 01 07:09:59 GMT 2025