11.8Sthorpej# $NetBSD: OMSAL400,v 1.8 2018/06/28 15:21:52 thorpej Exp $ 21.1Sshige# 31.1Sshige# Kernel config for the Open Micro Server AL400. 41.1Sshige 51.1Sshigeinclude "arch/evbmips/conf/ALCHEMY" 61.1Sshige 71.1Sshigeno options ALCHEMY_AU1000 81.1Sshigeno options ALCHEMY_AU1100 91.1Sshigeno options ALCHEMY_AU1500 101.1Sshigeno options ALCHEMY_AU1550 111.1Sshigeno options ALCHEMY_GENERIC 121.1Sshige 131.1Sshige# configure out local board support 141.1Sshigemakeoptions TEXTADDR="0x80100000" 151.1Sshigeoptions ALCHEMY_AU1550 161.1Sshigeoptions ALCHEMY_OMSAL400 171.1Sshigeoptions PCI_NETBSD_CONFIGURE 181.1Sshige 191.4Sshige# OMS-AL400 doesn't use aurtc. 201.4Sshigeno aurtc* at aubus? 211.4Sshige 221.3Sshige# Alchemy On-chip Programmable Serial Controllers 231.3Sshigeaupsc* at aubus? addr ? 241.1Sshige 251.3Sshige# SMBus 261.3Sshigeausmbus0 at aupsc0 271.3Sshigeiic0 at ausmbus0 281.7Skiyoharalmtemp* at iic0 addr 0x48 flags 0x0002 # LM77 temperature sensor 291.3Sshiger2025rtc* at iic0 addr 0x32 # R2025S RTC 301.8Sthorpejseeprom* at iic0 addr 0x50 flags 32 # 4096 bytes 311.3Sshige 321.3Sshige# Alchemy On-chip PCI 331.3Sshigeaupci* at aubus? addr ? 341.3Sshigepci* at aupci? 351.1Sshige 361.1Sshige# PCI devices 371.1Sshigewm* at pci? dev ? function ? # Intel 8254x gigabit 381.1Sshigeehci* at pci? dev ? function ? # Enhanced Host Controller 391.1Sshigeohci* at pci? dev ? function ? # Open Host Controller 401.1Sshige 411.1Sshige# MII 421.7Skiyoharaigphy* at mii? phy ? # Intel IGP01E1000 431.1Sshigelxtphy* at mii? phy ? # Level One LXT-970 PHYs 441.1Sshige 451.1Sshige# USB 461.7Skiyoharausb* at ehci? 471.1Sshigeusb* at ohci? 481.5Skiyohara 491.5Skiyohara# Alchemy On-chip PCMCIA 501.5Skiyoharaaupcmcia* at aubus? addr ? 511.5Skiyoharapcmcia* at aupcmcia? 521.5Skiyohara 531.5Skiyohara# PCMCIA IDE controllers 541.5Skiyoharawdc* at pcmcia? function ? 551.5Skiyohara 561.5Skiyohara# ATA (IDE) bus support 571.5Skiyoharaatabus* at ata? 581.5Skiyohara 591.5Skiyoharawd* at atabus? drive ? flags 0x0000 60