OMSAL400 revision 1.4
11.4Sshige# $NetBSD: OMSAL400,v 1.4 2006/03/28 16:56:50 shige Exp $ 21.1Sshige# 31.1Sshige# Kernel config for the Open Micro Server AL400. 41.1Sshige 51.1Sshigeinclude "arch/evbmips/conf/ALCHEMY" 61.1Sshige 71.1Sshigeno options ALCHEMY_AU1000 81.1Sshigeno options ALCHEMY_AU1100 91.1Sshigeno options ALCHEMY_AU1500 101.1Sshigeno options ALCHEMY_AU1550 111.1Sshigeno options ALCHEMY_GENERIC 121.1Sshige 131.1Sshige# configure out local board support 141.1Sshigemakeoptions TEXTADDR="0x80100000" 151.1Sshigeoptions ALCHEMY_AU1550 161.1Sshigeoptions ALCHEMY_OMSAL400 171.1Sshigeoptions PCI_NETBSD_CONFIGURE 181.1Sshige 191.4Sshige# OMS-AL400 doesn't use aurtc. 201.4Sshigeno aurtc* at aubus? 211.4Sshige 221.3Sshige# Alchemy On-chip Programmable Serial Controllers 231.3Sshigeaupsc* at aubus? addr ? 241.1Sshige 251.3Sshige# SMBus 261.3Sshigeausmbus0 at aupsc0 271.3Sshigeiic0 at ausmbus0 281.3Sshiger2025rtc* at iic0 addr 0x32 # R2025S RTC 291.3Sshigeseeprom* at iic0 addr 0x50 size 4096 # Serial EEPROM AT24C04 301.3Sshige 311.3Sshige# Alchemy On-chip PCI 321.3Sshigeaupci* at aubus? addr ? 331.3Sshigepci* at aupci? 341.1Sshige 351.1Sshige# PCI devices 361.1Sshigewm* at pci? dev ? function ? # Intel 8254x gigabit 371.1Sshigeehci* at pci? dev ? function ? # Enhanced Host Controller 381.1Sshigeohci* at pci? dev ? function ? # Open Host Controller 391.1Sshige 401.1Sshige# MII 411.1Sshigelxtphy* at mii? phy ? # Level One LXT-970 PHYs 421.1Sshigeigphy* at mii? phy ? # Intel IGP01E1000 431.1Sshige 441.1Sshige# USB 451.1Sshigeusb* at ohci? 461.1Sshigeusb* at ehci? 47