intr.h revision 1.12
1/* $NetBSD: intr.h,v 1.12 2007/06/17 06:04:27 tsutsui Exp $ */ 2 3/*- 4 * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39#ifndef _EVBMIPS_INTR_H_ 40#define _EVBMIPS_INTR_H_ 41 42#include <sys/device.h> 43#include <sys/lock.h> 44#include <sys/queue.h> 45 46#define IPL_NONE 0 /* disable only this interrupt */ 47#define IPL_SOFT 1 /* generic software interrupts */ 48#define IPL_SOFTCLOCK 2 /* clock software interrupts */ 49#define IPL_SOFTNET 3 /* network software interrupts */ 50#define IPL_SOFTSERIAL 4 /* serial software interrupts */ 51#define IPL_BIO 5 /* disable block I/O interrupts */ 52#define IPL_NET 6 /* disable network interrupts */ 53#define IPL_TTY 7 /* disable terminal interrupts */ 54#define IPL_LPT IPL_TTY 55#define IPL_VM IPL_TTY 56#define IPL_SERIAL 7 /* disable serial interrupts */ 57#define IPL_CLOCK 8 /* disable clock interrupts */ 58#define IPL_STATCLOCK IPL_CLOCK 59#define IPL_SCHED IPL_CLOCK 60#define IPL_HIGH 8 /* disable all interrupts */ 61#define IPL_LOCK IPL_HIGH 62 63#define _IPL_N 9 /* max IPL + 1 */ 64 65#define _IPL_SI0_FIRST IPL_SOFT 66#define _IPL_SI0_LAST IPL_SOFTCLOCK 67 68#define _IPL_SI1_FIRST IPL_SOFTNET 69#define _IPL_SI1_LAST IPL_SOFTSERIAL 70 71#define SI_SOFT 0 72#define SI_SOFTCLOCK 1 73#define SI_SOFTNET 2 74#define SI_SOFTSERIAL 3 75 76#define SI_NQUEUES 4 77 78#define SI_QUEUENAMES { \ 79 "misc", \ 80 "clock", \ 81 "net", \ 82 "serial", \ 83} 84 85#define IST_UNUSABLE -1 /* interrupt cannot be used */ 86#define IST_NONE 0 /* none (dummy) */ 87#define IST_PULSE 1 /* pulsed */ 88#define IST_EDGE 2 /* edge-triggered */ 89#define IST_LEVEL 3 /* level-triggered */ 90#define IST_LEVEL_HIGH 4 /* level triggered, active high */ 91#define IST_LEVEL_LOW 5 /* level triggered, active low */ 92 93#ifdef _KERNEL 94 95#include <mips/locore.h> 96 97extern const uint32_t ipl_sr_bits[_IPL_N]; 98 99#define spl0() (void) _spllower(0) 100#define splx(s) (void) _splset(s) 101 102#define splsoft() _splraise(ipl_sr_bits[IPL_SOFT]) 103 104typedef int ipl_t; 105typedef struct { 106 ipl_t _sr; 107} ipl_cookie_t; 108 109static inline ipl_cookie_t 110makeiplcookie(ipl_t ipl) 111{ 112 113 return (ipl_cookie_t){._sr = ipl_sr_bits[ipl]}; 114} 115 116static inline int 117splraiseipl(ipl_cookie_t icookie) 118{ 119 120 return _splraise(icookie._sr); 121} 122 123#include <sys/spl.h> 124 125struct evbmips_intrhand { 126 LIST_ENTRY(evbmips_intrhand) ih_q; 127 int (*ih_func)(void *); 128 void *ih_arg; 129 int ih_irq; 130}; 131 132#include <mips/softintr.h> 133 134void evbmips_intr_init(void); 135void intr_init(void); 136void evbmips_iointr(uint32_t, uint32_t, uint32_t, uint32_t); 137void *evbmips_intr_establish(int, int (*)(void *), void *); 138void evbmips_intr_disestablish(void *); 139#endif /* _KERNEL */ 140#endif /* ! _EVBMIPS_INTR_H_ */ 141