Home | History | Annotate | Line # | Download | only in ingenic
machdep.c revision 1.11 
      1 /*	$NetBSD: machdep.c,v 1.11 2016/08/26 13:53:36 skrll Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2014 Michael Lorenz
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     17  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     26  * POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.11 2016/08/26 13:53:36 skrll Exp $");
     31 
     32 #include "opt_ddb.h"
     33 #include "opt_kgdb.h"
     34 #include "opt_modular.h"
     35 #include "opt_multiprocessor.h"
     36 
     37 #include <sys/param.h>
     38 #include <sys/boot_flag.h>
     39 #include <sys/device.h>
     40 #include <sys/kernel.h>
     41 #include <sys/kcore.h>
     42 #include <sys/ksyms.h>
     43 #include <sys/mount.h>
     44 #include <sys/reboot.h>
     45 #include <sys/cpu.h>
     46 #include <sys/bus.h>
     47 #include <sys/mutex.h>
     48 
     49 #include <uvm/uvm_extern.h>
     50 
     51 #include <dev/cons.h>
     52 
     53 #include "ksyms.h"
     54 
     55 #if NKSYMS || defined(DDB) || defined(MODULAR)
     56 #include <mips/db_machdep.h>
     57 #include <ddb/db_extern.h>
     58 #endif
     59 
     60 #include <mips/cache.h>
     61 #include <mips/locore.h>
     62 #include <mips/cpuregs.h>
     63 
     64 #include <mips/ingenic/ingenic_regs.h>
     65 #include <mips/ingenic/ingenic_var.h>
     66 
     67 #include "opt_ingenic.h"
     68 
     69 /* Maps for VM objects. */
     70 struct vm_map *phys_map = NULL;
     71 
     72 int maxmem;			/* max memory per process */
     73 
     74 int mem_cluster_cnt;
     75 phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
     76 
     77 void	mach_init(void); /* XXX */
     78 void	ingenic_reset(void);
     79 
     80 void	ingenic_putchar_init(void);
     81 void	ingenic_puts(const char *);
     82 void	ingenic_com_cnattach(void);
     83 
     84 #ifdef MULTIPROCESSOR
     85 kmutex_t ingenic_ipi_lock;
     86 #endif
     87 
     88 static void
     89 cal_timer(void)
     90 {
     91 	uint32_t	cntfreq;
     92 	volatile uint32_t junk;
     93 
     94 	/*
     95 	 * The manual seems to imply that EXCCLK is 12MHz, although in real
     96 	 * life it appears to be 48MHz. Either way, we want a 12MHz counter.
     97 	 */
     98 	curcpu()->ci_cpu_freq = 1200000000;	/* for now */
     99 	cntfreq = 12000000;	/* EXTCLK / 4 */
    100 
    101 	curcpu()->ci_cctr_freq = cntfreq;
    102 	curcpu()->ci_cycles_per_hz = (cntfreq + hz / 2) / hz;
    103 
    104 	/* Compute number of cycles per 1us (1/MHz). 0.5MHz is for roundup. */
    105 	curcpu()->ci_divisor_delay = ((cntfreq + 500000) / 1000000);
    106 
    107 	/* actually start the counter now */
    108 	/* stop OS timer */
    109 	writereg(JZ_TC_TECR, TESR_OST);
    110 	/* zero everything */
    111 	writereg(JZ_OST_CTRL, 0);
    112 	writereg(JZ_OST_CNT_LO, 0);
    113 	writereg(JZ_OST_CNT_HI, 0);
    114 	writereg(JZ_OST_DATA, 0xffffffff);
    115 	/* use EXTCLK, don't reset */
    116 	writereg(JZ_OST_CTRL, OSTC_EXT_EN | OSTC_MODE | OSTC_DIV_4);
    117 	/* start the timer */
    118 	writereg(JZ_TC_TESR, TESR_OST);
    119 	/* make sure the timer actually runs */
    120 	junk = readreg(JZ_OST_CNT_LO);
    121 	do {} while (junk == readreg(JZ_OST_CNT_LO));
    122 }
    123 
    124 #ifdef MULTIPROCESSOR
    125 static void
    126 ingenic_cpu_init(struct cpu_info *ci)
    127 {
    128 	uint32_t reg;
    129 
    130 	/* enable IPIs for this core */
    131 	reg = MFC0(12, 4);	/* reset entry and interrupts */
    132 	if (cpu_index(ci) == 1) {
    133 		reg |= REIM_MIRQ1_M;
    134 	} else
    135 		reg |= REIM_MIRQ0_M;
    136 	MTC0(reg, 12, 4);
    137 	printf("%s %d %08x\n", __func__, cpu_index(ci), reg);
    138 }
    139 
    140 static int
    141 ingenic_send_ipi(struct cpu_info *ci, int tag)
    142 {
    143 	uint32_t msg;
    144 
    145 	msg = 1 << tag;
    146 
    147 	mutex_enter(&ingenic_ipi_lock);
    148 	if (kcpuset_isset(cpus_running, cpu_index(ci))) {
    149 		if (cpu_index(ci) == 0) {
    150 			MTC0(msg, CP0_CORE_MBOX, 0);
    151 		} else {
    152 			MTC0(msg, CP0_CORE_MBOX, 1);
    153 		}
    154 	}
    155 	mutex_exit(&ingenic_ipi_lock);
    156 	return 0;
    157 }
    158 #endif /* MULTIPROCESSOR */
    159 
    160 void
    161 mach_init(void)
    162 {
    163 	void *kernend;
    164 	uint32_t memsize;
    165 	extern char edata[], end[];	/* XXX */
    166 
    167 	/* clear the BSS segment */
    168 	kernend = (void *)mips_round_page(end);
    169 
    170 	memset(edata, 0, (char *)kernend - edata);
    171 
    172 	/* setup early console */
    173 	ingenic_putchar_init();
    174 
    175 	/* set CPU model info for sysctl_hw */
    176 	cpu_setmodel("Ingenic XBurst");
    177 	mips_vector_init(NULL, false);
    178 	cal_timer();
    179 	uvm_setpagesize();
    180 	/*
    181 	 * Look at arguments passed to us and compute boothowto.
    182 	 */
    183 	boothowto = RB_AUTOBOOT;
    184 #ifdef KADB
    185 	boothowto |= RB_KDB;
    186 #endif
    187 
    188 	/*
    189 	 * Determine the memory size.
    190 	 *
    191 	 * Note: Reserve the first page!  That's where the trap
    192 	 * vectors are located.
    193 	 */
    194 	memsize = 0x40000000;
    195 
    196 	printf("Memory size: 0x%08x\n", memsize);
    197 	physmem = btoc(memsize);
    198 
    199 	/*
    200 	 * memory is at 0x20000000 with first 256MB mirrored to 0x00000000 so
    201 	 * we can see them through KSEG*
    202 	 * assume 1GB for now, the SoC can theoretically support up to 3GB
    203 	 */
    204 	mem_clusters[0].start = PAGE_SIZE;
    205 	mem_clusters[0].size = 0x10000000 - PAGE_SIZE;
    206 	mem_clusters[1].start = 0x30000000;
    207 	mem_clusters[1].size = 0x30000000;
    208 	mem_cluster_cnt = 2;
    209 
    210 	/*
    211 	 * Load the available pages into the VM system.
    212 	 */
    213 	mips_page_physload(MIPS_KSEG0_START, (vaddr_t)kernend,
    214 	    mem_clusters, mem_cluster_cnt, NULL, 0);
    215 
    216 	/*
    217 	 * Initialize message buffer (at end of core).
    218 	 */
    219 	mips_init_msgbuf();
    220 
    221 	/*
    222 	 * Initialize the virtual memory system.
    223 	 */
    224 	pmap_bootstrap();
    225 
    226 	/*
    227 	 * Allocate uarea page for lwp0 and set it.
    228 	 */
    229 	mips_init_lwp0_uarea();
    230 
    231 #ifdef MULTIPROCESSOR
    232 	mutex_init(&ingenic_ipi_lock, MUTEX_DEFAULT, IPL_HIGH);
    233 	mips_locoresw.lsw_send_ipi = ingenic_send_ipi;
    234 	mips_locoresw.lsw_cpu_init = ingenic_cpu_init;
    235 #endif
    236 
    237 	apbus_init();
    238 	/*
    239 	 * Initialize debuggers, and break into them, if appropriate.
    240 	 */
    241 #ifdef DDB
    242 	if (boothowto & RB_KDB)
    243 		Debugger();
    244 #endif
    245 }
    246 
    247 void
    248 consinit(void)
    249 {
    250 	/*
    251 	 * Everything related to console initialization is done
    252 	 * in mach_init().
    253 	 */
    254 	apbus_init();
    255 	ingenic_com_cnattach();
    256 }
    257 
    258 void
    259 cpu_startup(void)
    260 {
    261 	cpu_startup_common();
    262 }
    263 
    264 void
    265 cpu_reboot(int howto, char *bootstr)
    266 {
    267 	static int waittime = -1;
    268 
    269 	/* Take a snapshot before clobbering any registers. */
    270 	savectx(curpcb);
    271 
    272 	/* If "always halt" was specified as a boot flag, obey. */
    273 	if (boothowto & RB_HALT)
    274 		howto |= RB_HALT;
    275 
    276 	boothowto = howto;
    277 
    278 	/* If system is cold, just halt. */
    279 	if (cold) {
    280 		boothowto |= RB_HALT;
    281 		goto haltsys;
    282 	}
    283 
    284 	if ((boothowto & RB_NOSYNC) == 0 && waittime < 0) {
    285 		waittime = 0;
    286 
    287 		/*
    288 		 * Synchronize the disks....
    289 		 */
    290 		vfs_shutdown();
    291 
    292 		/*
    293 		 * If we've been adjusting the clock, the todr
    294 		 * will be out of synch; adjust it now.
    295 		 */
    296 		resettodr();
    297 	}
    298 
    299 	/* Disable interrupts. */
    300 	splhigh();
    301 
    302 	if (boothowto & RB_DUMP)
    303 		dumpsys();
    304 
    305 haltsys:
    306 	/* Run any shutdown hooks. */
    307 	doshutdownhooks();
    308 
    309 	pmf_system_shutdown(boothowto);
    310 
    311 #if 0
    312 	if ((boothowto & RB_POWERDOWN) == RB_POWERDOWN)
    313 		if (board && board->ab_poweroff)
    314 			board->ab_poweroff();
    315 #endif
    316 
    317 	/*
    318 	 * Firmware may autoboot (depending on settings), and we cannot pass
    319 	 * flags to it (at least I haven't figured out how to yet), so
    320 	 * we "pseudo-halt" now.
    321 	 */
    322 	if (boothowto & RB_HALT) {
    323 		printf("\n");
    324 		printf("The operating system has halted.\n");
    325 		printf("Please press any key to reboot.\n\n");
    326 		cnpollc(1);	/* For proper keyboard command handling */
    327 		cngetc();
    328 		cnpollc(0);
    329 	}
    330 
    331 	printf("reseting board...\n\n");
    332 	mips_icache_sync_all();
    333 	mips_dcache_wbinv_all();
    334 	ingenic_reset();
    335 	__asm volatile("jr	%0" :: "r"(MIPS_RESET_EXC_VEC));
    336 	printf("Oops, back from reset\n\nSpinning...");
    337 	for (;;)
    338 		/* spin forever */ ;	/* XXX */
    339 	/*NOTREACHED*/
    340 }
    341 
    342 void
    343 ingenic_reset(void)
    344 {
    345 	/*
    346 	 * for now, provoke a watchdog reset in about a second, so UART buffers
    347 	 * have a fighting chance to flush before we pull the plug
    348 	 */
    349 	writereg(JZ_WDOG_TCER, 0);	/* disable watchdog */
    350 	writereg(JZ_WDOG_TCNT, 0);	/* reset counter */
    351 	writereg(JZ_WDOG_TDR, 128);	/* wait for ~1s */
    352 	writereg(JZ_WDOG_TCSR, TCSR_RTC_EN | TCSR_DIV_256);
    353 	writereg(JZ_WDOG_TCER, TCER_ENABLE);	/* fire! */
    354 }
    355