machdep.c revision 1.2 1 /* $NetBSD: machdep.c,v 1.2 2014/12/06 14:30:11 macallan Exp $ */
2
3 /*-
4 * Copyright (c) 2014 Michael Lorenz
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.2 2014/12/06 14:30:11 macallan Exp $");
31
32 #include "opt_ddb.h"
33 #include "opt_kgdb.h"
34 #include "opt_modular.h"
35
36 #include <sys/param.h>
37 #include <sys/boot_flag.h>
38 #include <sys/device.h>
39 #include <sys/kernel.h>
40 #include <sys/kcore.h>
41 #include <sys/ksyms.h>
42 #include <sys/mount.h>
43 #include <sys/reboot.h>
44 #include <sys/cpu.h>
45 #include <sys/bus.h>
46
47 #include <uvm/uvm_extern.h>
48
49 #include <dev/cons.h>
50
51 #include "ksyms.h"
52
53 #if NKSYMS || defined(DDB) || defined(MODULAR)
54 #include <mips/db_machdep.h>
55 #include <ddb/db_extern.h>
56 #endif
57
58 #include <mips/cache.h>
59 #include <mips/locore.h>
60 #include <mips/cpuregs.h>
61
62 #include <mips/ingenic/ingenic_regs.h>
63 #include <mips/ingenic/ingenic_var.h>
64
65 /* Maps for VM objects. */
66 struct vm_map *phys_map = NULL;
67
68 int maxmem; /* max memory per process */
69
70 int mem_cluster_cnt;
71 phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
72
73 void mach_init(void); /* XXX */
74 void ingenic_reset(void);
75
76 void ingenic_putchar_init(void);
77 void ingenic_puts(const char *);
78 void ingenic_com_cnattach(void);
79
80 static void
81 cal_timer(void)
82 {
83 uint32_t cntfreq;
84 volatile uint32_t junk;
85
86 /*
87 * The manual seems to imply that EXCCLK is 12MHz, although in real
88 * life it appears to be 48MHz. Either way, we want a 12MHz counter.
89 */
90 curcpu()->ci_cpu_freq = 1200000000; /* for now */
91 cntfreq = 12000000; /* EXTCLK / 4 */
92
93 curcpu()->ci_cctr_freq = cntfreq;
94 curcpu()->ci_cycles_per_hz = (cntfreq + hz / 2) / hz;
95
96 /* Compute number of cycles per 1us (1/MHz). 0.5MHz is for roundup. */
97 curcpu()->ci_divisor_delay = ((cntfreq + 500000) / 1000000);
98
99 /* actually start the counter now */
100 /* stop OS timer */
101 writereg(JZ_TC_TECR, TESR_OST);
102 /* zero everything */
103 writereg(JZ_OST_CTRL, 0);
104 writereg(JZ_OST_CNT_LO, 0);
105 writereg(JZ_OST_CNT_HI, 0);
106 writereg(JZ_OST_DATA, 0xffffffff);
107 /* use EXTCLK, don't reset */
108 writereg(JZ_OST_CTRL, OSTC_EXT_EN | OSTC_MODE | OSTC_DIV_4);
109 /* start the timer */
110 writereg(JZ_TC_TESR, TESR_OST);
111 /* make sure the timer actually runs */
112 junk = readreg(JZ_OST_CNT_LO);
113 do {} while (junk == readreg(JZ_OST_CNT_LO));
114 }
115
116 void
117 mach_init(void)
118 {
119 void *kernend;
120 uint32_t memsize;
121 extern char edata[], end[]; /* XXX */
122
123 /* clear the BSS segment */
124 kernend = (void *)mips_round_page(end);
125
126 memset(edata, 0, (char *)kernend - edata);
127
128 /* setup early console */
129 ingenic_putchar_init();
130
131 /* set CPU model info for sysctl_hw */
132 cpu_setmodel("Ingenic XBurst");
133 mips_vector_init(NULL, false);
134 cal_timer();
135 uvm_setpagesize();
136 /*
137 * Look at arguments passed to us and compute boothowto.
138 */
139 boothowto = RB_AUTOBOOT;
140 #ifdef KADB
141 boothowto |= RB_KDB;
142 #endif
143
144 /*
145 * Determine the memory size.
146 *
147 * Note: Reserve the first page! That's where the trap
148 * vectors are located.
149 */
150 memsize = 0x40000000;
151
152 printf("Memory size: 0x%08x\n", memsize);
153 physmem = btoc(memsize);
154
155 /* XXX this is CI20 specific */
156 mem_clusters[0].start = PAGE_SIZE;
157 mem_clusters[0].size = 0x10000000 - PAGE_SIZE;
158 mem_clusters[1].start = 0x30000000;
159 mem_clusters[1].size = 0x30000000;
160 mem_cluster_cnt = 2;
161
162 /*
163 * Load the available pages into the VM system.
164 */
165 mips_page_physload(MIPS_KSEG0_START, (vaddr_t)kernend,
166 mem_clusters, mem_cluster_cnt, NULL, 0);
167
168 /*
169 * Initialize message buffer (at end of core).
170 */
171 mips_init_msgbuf();
172
173 /*
174 * Initialize the virtual memory system.
175 */
176 pmap_bootstrap();
177
178 /*
179 * Allocate uarea page for lwp0 and set it.
180 */
181 mips_init_lwp0_uarea();
182
183 apbus_init();
184 /*
185 * Initialize debuggers, and break into them, if appropriate.
186 */
187 #ifdef DDB
188 if (boothowto & RB_KDB)
189 Debugger();
190 #endif
191 }
192
193 void
194 consinit(void)
195 {
196 /*
197 * Everything related to console initialization is done
198 * in mach_init().
199 */
200 ingenic_com_cnattach();
201 }
202
203 void
204 cpu_startup(void)
205 {
206 char pbuf[9];
207 vaddr_t minaddr, maxaddr;
208 #ifdef DEBUG
209 extern int pmapdebug; /* XXX */
210 int opmapdebug = pmapdebug;
211
212 pmapdebug = 0; /* Shut up pmap debug during bootstrap */
213 #endif
214
215 /*
216 * Good {morning,afternoon,evening,night}.
217 */
218 printf("%s%s", copyright, version);
219 printf("%s\n", cpu_getmodel());
220 format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
221 printf("total memory = %s\n", pbuf);
222
223 minaddr = 0;
224 /*
225 * Allocate a submap for physio
226 */
227 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
228 VM_PHYS_SIZE, 0, FALSE, NULL);
229
230 /*
231 * No need to allocate an mbuf cluster submap. Mbuf clusters
232 * are allocated via the pool allocator, and we use KSEG to
233 * map those pages.
234 */
235
236 #ifdef DEBUG
237 pmapdebug = opmapdebug;
238 #endif
239 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
240 printf("avail memory = %s\n", pbuf);
241 }
242
243 void
244 cpu_reboot(int howto, char *bootstr)
245 {
246 static int waittime = -1;
247
248 /* Take a snapshot before clobbering any registers. */
249 savectx(curpcb);
250
251 /* If "always halt" was specified as a boot flag, obey. */
252 if (boothowto & RB_HALT)
253 howto |= RB_HALT;
254
255 boothowto = howto;
256
257 /* If system is cold, just halt. */
258 if (cold) {
259 boothowto |= RB_HALT;
260 goto haltsys;
261 }
262
263 if ((boothowto & RB_NOSYNC) == 0 && waittime < 0) {
264 waittime = 0;
265
266 /*
267 * Synchronize the disks....
268 */
269 vfs_shutdown();
270
271 /*
272 * If we've been adjusting the clock, the todr
273 * will be out of synch; adjust it now.
274 */
275 resettodr();
276 }
277
278 /* Disable interrupts. */
279 splhigh();
280
281 if (boothowto & RB_DUMP)
282 dumpsys();
283
284 haltsys:
285 /* Run any shutdown hooks. */
286 doshutdownhooks();
287
288 pmf_system_shutdown(boothowto);
289
290 #if 0
291 if ((boothowto & RB_POWERDOWN) == RB_POWERDOWN)
292 if (board && board->ab_poweroff)
293 board->ab_poweroff();
294 #endif
295
296 /*
297 * Firmware may autoboot (depending on settings), and we cannot pass
298 * flags to it (at least I haven't figured out how to yet), so
299 * we "pseudo-halt" now.
300 */
301 if (boothowto & RB_HALT) {
302 printf("\n");
303 printf("The operating system has halted.\n");
304 printf("Please press any key to reboot.\n\n");
305 cnpollc(1); /* For proper keyboard command handling */
306 cngetc();
307 cnpollc(0);
308 }
309
310 printf("reseting board...\n\n");
311 mips_icache_sync_all();
312 mips_dcache_wbinv_all();
313 ingenic_reset();
314 __asm volatile("jr %0" :: "r"(MIPS_RESET_EXC_VEC));
315 printf("Oops, back from reset\n\nSpinning...");
316 for (;;)
317 /* spin forever */ ; /* XXX */
318 /*NOTREACHED*/
319 }
320
321 void
322 ingenic_reset(void)
323 {
324 /*
325 * for now, provoke a watchdog reset in about a second, so UART buffers
326 * have a fighting chance to flush before we pull the plug
327 */
328 writereg(JZ_WDOG_TCER, 0); /* disable watchdog */
329 writereg(JZ_WDOG_TCNT, 0); /* reset counter */
330 writereg(JZ_WDOG_TDR, 128); /* wait for ~1s */
331 writereg(JZ_WDOG_TCSR, TCSR_RTC_EN | TCSR_DIV_256);
332 writereg(JZ_WDOG_TCER, TCER_ENABLE); /* fire! */
333 }
334