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machdep.c revision 1.5
      1 /*	$NetBSD: machdep.c,v 1.5 2015/03/10 22:39:38 macallan Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2014 Michael Lorenz
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     17  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     26  * POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.5 2015/03/10 22:39:38 macallan Exp $");
     31 
     32 #include "opt_ddb.h"
     33 #include "opt_kgdb.h"
     34 #include "opt_modular.h"
     35 
     36 #include <sys/param.h>
     37 #include <sys/boot_flag.h>
     38 #include <sys/device.h>
     39 #include <sys/kernel.h>
     40 #include <sys/kcore.h>
     41 #include <sys/ksyms.h>
     42 #include <sys/mount.h>
     43 #include <sys/reboot.h>
     44 #include <sys/cpu.h>
     45 #include <sys/bus.h>
     46 
     47 #include <uvm/uvm_extern.h>
     48 
     49 #include <dev/cons.h>
     50 
     51 #include "ksyms.h"
     52 
     53 #if NKSYMS || defined(DDB) || defined(MODULAR)
     54 #include <mips/db_machdep.h>
     55 #include <ddb/db_extern.h>
     56 #endif
     57 
     58 #include <mips/cache.h>
     59 #include <mips/locore.h>
     60 #include <mips/cpuregs.h>
     61 
     62 #include <mips/ingenic/ingenic_regs.h>
     63 #include <mips/ingenic/ingenic_var.h>
     64 
     65 #include "opt_ingenic.h"
     66 
     67 /* Maps for VM objects. */
     68 struct vm_map *phys_map = NULL;
     69 
     70 int maxmem;			/* max memory per process */
     71 
     72 int mem_cluster_cnt;
     73 phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
     74 
     75 void	mach_init(void); /* XXX */
     76 void	ingenic_reset(void);
     77 
     78 void	ingenic_putchar_init(void);
     79 void	ingenic_puts(const char *);
     80 void	ingenic_com_cnattach(void);
     81 
     82 static void
     83 cal_timer(void)
     84 {
     85 	uint32_t	cntfreq;
     86 	volatile uint32_t junk;
     87 
     88 	/*
     89 	 * The manual seems to imply that EXCCLK is 12MHz, although in real
     90 	 * life it appears to be 48MHz. Either way, we want a 12MHz counter.
     91 	 */
     92 	curcpu()->ci_cpu_freq = 1200000000;	/* for now */
     93 	cntfreq = 12000000;	/* EXTCLK / 4 */
     94 
     95 	curcpu()->ci_cctr_freq = cntfreq;
     96 	curcpu()->ci_cycles_per_hz = (cntfreq + hz / 2) / hz;
     97 
     98 	/* Compute number of cycles per 1us (1/MHz). 0.5MHz is for roundup. */
     99 	curcpu()->ci_divisor_delay = ((cntfreq + 500000) / 1000000);
    100 
    101 	/* actually start the counter now */
    102 	/* stop OS timer */
    103 	writereg(JZ_TC_TECR, TESR_OST);
    104 	/* zero everything */
    105 	writereg(JZ_OST_CTRL, 0);
    106 	writereg(JZ_OST_CNT_LO, 0);
    107 	writereg(JZ_OST_CNT_HI, 0);
    108 	writereg(JZ_OST_DATA, 0xffffffff);
    109 	/* use EXTCLK, don't reset */
    110 	writereg(JZ_OST_CTRL, OSTC_EXT_EN | OSTC_MODE | OSTC_DIV_4);
    111 	/* start the timer */
    112 	writereg(JZ_TC_TESR, TESR_OST);
    113 	/* make sure the timer actually runs */
    114 	junk = readreg(JZ_OST_CNT_LO);
    115 	do {} while (junk == readreg(JZ_OST_CNT_LO));
    116 }
    117 
    118 void
    119 mach_init(void)
    120 {
    121 	void *kernend;
    122 	uint32_t memsize;
    123 	extern char edata[], end[];	/* XXX */
    124 
    125 	/* clear the BSS segment */
    126 	kernend = (void *)mips_round_page(end);
    127 
    128 	memset(edata, 0, (char *)kernend - edata);
    129 
    130 	/* setup early console */
    131 	ingenic_putchar_init();
    132 
    133 	/* set CPU model info for sysctl_hw */
    134 	cpu_setmodel("Ingenic XBurst");
    135 	mips_vector_init(NULL, false);
    136 	cal_timer();
    137 	uvm_setpagesize();
    138 	/*
    139 	 * Look at arguments passed to us and compute boothowto.
    140 	 */
    141 	boothowto = RB_AUTOBOOT;
    142 #ifdef KADB
    143 	boothowto |= RB_KDB;
    144 #endif
    145 
    146 	/*
    147 	 * Determine the memory size.
    148 	 *
    149 	 * Note: Reserve the first page!  That's where the trap
    150 	 * vectors are located.
    151 	 */
    152 	memsize = 0x40000000;
    153 
    154 	printf("Memory size: 0x%08x\n", memsize);
    155 	physmem = btoc(memsize);
    156 
    157 	/* XXX this is CI20 specific */
    158 	mem_clusters[0].start = PAGE_SIZE;
    159 	mem_clusters[0].size = 0x10000000 - PAGE_SIZE;
    160 	mem_clusters[1].start = 0x30000000;
    161 	mem_clusters[1].size = 0x30000000;
    162 	mem_cluster_cnt = 2;
    163 
    164 	/*
    165 	 * Load the available pages into the VM system.
    166 	 */
    167 	mips_page_physload(MIPS_KSEG0_START, (vaddr_t)kernend,
    168 	    mem_clusters, mem_cluster_cnt, NULL, 0);
    169 
    170 	/*
    171 	 * Initialize message buffer (at end of core).
    172 	 */
    173 	mips_init_msgbuf();
    174 
    175 	/*
    176 	 * Initialize the virtual memory system.
    177 	 */
    178 	pmap_bootstrap();
    179 
    180 	/*
    181 	 * Allocate uarea page for lwp0 and set it.
    182 	 */
    183 	mips_init_lwp0_uarea();
    184 
    185 	apbus_init();
    186 	/*
    187 	 * Initialize debuggers, and break into them, if appropriate.
    188 	 */
    189 #ifdef DDB
    190 	if (boothowto & RB_KDB)
    191 		Debugger();
    192 #endif
    193 }
    194 
    195 void
    196 consinit(void)
    197 {
    198 	/*
    199 	 * Everything related to console initialization is done
    200 	 * in mach_init().
    201 	 */
    202 	ingenic_com_cnattach();
    203 }
    204 
    205 void
    206 cpu_startup(void)
    207 {
    208 	char pbuf[9];
    209 	vaddr_t minaddr, maxaddr;
    210 #ifdef DEBUG
    211 	extern int pmapdebug;		/* XXX */
    212 	int opmapdebug = pmapdebug;
    213 
    214 	pmapdebug = 0;		/* Shut up pmap debug during bootstrap */
    215 #endif
    216 
    217 	/*
    218 	 * Good {morning,afternoon,evening,night}.
    219 	 */
    220 	printf("%s%s", copyright, version);
    221 	printf("%s\n", cpu_getmodel());
    222 	format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
    223 	printf("total memory = %s\n", pbuf);
    224 
    225 	minaddr = 0;
    226 	/*
    227 	 * Allocate a submap for physio
    228 	 */
    229 	phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
    230 	    VM_PHYS_SIZE, 0, FALSE, NULL);
    231 
    232 	/*
    233 	 * No need to allocate an mbuf cluster submap.  Mbuf clusters
    234 	 * are allocated via the pool allocator, and we use KSEG to
    235 	 * map those pages.
    236 	 */
    237 
    238 #ifdef DEBUG
    239 	pmapdebug = opmapdebug;
    240 #endif
    241 	format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
    242 	printf("avail memory = %s\n", pbuf);
    243 }
    244 
    245 void
    246 cpu_reboot(int howto, char *bootstr)
    247 {
    248 	static int waittime = -1;
    249 
    250 	/* Take a snapshot before clobbering any registers. */
    251 	savectx(curpcb);
    252 
    253 	/* If "always halt" was specified as a boot flag, obey. */
    254 	if (boothowto & RB_HALT)
    255 		howto |= RB_HALT;
    256 
    257 	boothowto = howto;
    258 
    259 	/* If system is cold, just halt. */
    260 	if (cold) {
    261 		boothowto |= RB_HALT;
    262 		goto haltsys;
    263 	}
    264 
    265 	if ((boothowto & RB_NOSYNC) == 0 && waittime < 0) {
    266 		waittime = 0;
    267 
    268 		/*
    269 		 * Synchronize the disks....
    270 		 */
    271 		vfs_shutdown();
    272 
    273 		/*
    274 		 * If we've been adjusting the clock, the todr
    275 		 * will be out of synch; adjust it now.
    276 		 */
    277 		resettodr();
    278 	}
    279 
    280 	/* Disable interrupts. */
    281 	splhigh();
    282 
    283 	if (boothowto & RB_DUMP)
    284 		dumpsys();
    285 
    286 haltsys:
    287 	/* Run any shutdown hooks. */
    288 	doshutdownhooks();
    289 
    290 	pmf_system_shutdown(boothowto);
    291 
    292 #if 0
    293 	if ((boothowto & RB_POWERDOWN) == RB_POWERDOWN)
    294 		if (board && board->ab_poweroff)
    295 			board->ab_poweroff();
    296 #endif
    297 
    298 	/*
    299 	 * Firmware may autoboot (depending on settings), and we cannot pass
    300 	 * flags to it (at least I haven't figured out how to yet), so
    301 	 * we "pseudo-halt" now.
    302 	 */
    303 	if (boothowto & RB_HALT) {
    304 		printf("\n");
    305 		printf("The operating system has halted.\n");
    306 		printf("Please press any key to reboot.\n\n");
    307 		cnpollc(1);	/* For proper keyboard command handling */
    308 		cngetc();
    309 		cnpollc(0);
    310 	}
    311 
    312 	printf("reseting board...\n\n");
    313 	mips_icache_sync_all();
    314 	mips_dcache_wbinv_all();
    315 	ingenic_reset();
    316 	__asm volatile("jr	%0" :: "r"(MIPS_RESET_EXC_VEC));
    317 	printf("Oops, back from reset\n\nSpinning...");
    318 	for (;;)
    319 		/* spin forever */ ;	/* XXX */
    320 	/*NOTREACHED*/
    321 }
    322 
    323 void
    324 ingenic_reset(void)
    325 {
    326 	/*
    327 	 * for now, provoke a watchdog reset in about a second, so UART buffers
    328 	 * have a fighting chance to flush before we pull the plug
    329 	 */
    330 	writereg(JZ_WDOG_TCER, 0);	/* disable watchdog */
    331 	writereg(JZ_WDOG_TCNT, 0);	/* reset counter */
    332 	writereg(JZ_WDOG_TDR, 128);	/* wait for ~1s */
    333 	writereg(JZ_WDOG_TCSR, TCSR_RTC_EN | TCSR_DIV_256);
    334 	writereg(JZ_WDOG_TCER, TCER_ENABLE);	/* fire! */
    335 }
    336