yeeloong_machdep.c revision 1.4 1 /* $NetBSD: yeeloong_machdep.c,v 1.4 2012/10/27 17:17:50 chs Exp $ */
2 /* $OpenBSD: yeeloong_machdep.c,v 1.16 2011/04/15 20:40:06 deraadt Exp $ */
3
4 /*
5 * Copyright (c) 2009, 2010 Miodrag Vallat.
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 /*
21 * Lemote {Fu,Lyn,Yee}loong specific code and configuration data.
22 * (this file really ought to be named lemote_machdep.c by now)
23 */
24
25 #include <sys/cdefs.h>
26 __KERNEL_RCSID(0, "$NetBSD: yeeloong_machdep.c,v 1.4 2012/10/27 17:17:50 chs Exp $");
27
28 #include <sys/param.h>
29 #include <sys/systm.h>
30 #include <sys/device.h>
31 #include <sys/types.h>
32
33 #include <evbmips/loongson/autoconf.h>
34 #include <mips/pmon/pmon.h>
35 #include <evbmips/loongson/loongson_intr.h>
36 #include <evbmips/loongson/loongson_bus_defs.h>
37 #include <evbmips/loongson/loongson_isa.h>
38
39 #include <dev/isa/isareg.h>
40 #include <dev/isa/isavar.h>
41 #include <dev/ic/i8259reg.h>
42
43 #include <dev/pci/pcireg.h>
44 #include <dev/pci/pcivar.h>
45 #include <dev/pci/pcidevs.h>
46
47 #include <mips/bonito/bonitoreg.h>
48 #include <mips/bonito/bonitovar.h>
49
50 #include <evbmips/loongson/dev/kb3310var.h>
51 #include <evbmips/loongson/dev/glxreg.h>
52 #include <evbmips/loongson/dev/glxvar.h>
53
54 #include "com.h"
55 #include "isa.h"
56 #include "ykbec.h"
57
58 #if NCOM > 0
59 #include <sys/termios.h>
60 #include <dev/ic/comvar.h>
61 #endif
62
63 #ifdef LOW_DEBUG
64 #define DPRINTF(x) printf x
65 #else
66 #define DPRINTF(x)
67 #endif
68
69 void lemote_device_register(device_t, void *);
70 void lemote_reset(void);
71
72 void fuloong_powerdown(void);
73 void fuloong_setup(void);
74
75 void yeeloong_powerdown(void);
76
77 void lemote_pci_attach_hook(device_t, device_t,
78 struct pcibus_attach_args *);
79 int lemote_intr_map(int, int, int, pci_intr_handle_t *);
80
81 void lemote_isa_attach_hook(device_t, device_t,
82 struct isabus_attach_args *);
83 void *lemote_isa_intr_establish(void *, int, int, int,
84 int (*)(void *), void *);
85 void lemote_isa_intr_disestablish(void *, void *);
86 const struct evcnt * lemote_isa_intr_evcnt(void *, int);
87 const char * lemote_isa_intr_string(void *, int);
88
89 uint lemote_get_isa_imr(void);
90 uint lemote_get_isa_isr(void);
91 void lemote_isa_intr(int, vaddr_t, uint32_t);
92
93 const struct bonito_config lemote_bonito = {
94 .bc_adbase = 11,
95
96 .bc_gpioIE = LOONGSON_INTRMASK_GPIO,
97 .bc_intEdge = LOONGSON_INTRMASK_PCI_SYSERR |
98 LOONGSON_INTRMASK_PCI_PARERR,
99 .bc_intSteer = 0,
100 .bc_intPol = LOONGSON_INTRMASK_DRAM_PARERR |
101 LOONGSON_INTRMASK_PCI_SYSERR | LOONGSON_INTRMASK_PCI_PARERR |
102 LOONGSON_INTRMASK_INT0 | LOONGSON_INTRMASK_INT1,
103
104 .bc_attach_hook = lemote_pci_attach_hook,
105 };
106
107 const struct legacy_io_range fuloong_legacy_ranges[] = {
108 /* isa */
109 { IO_DMAPG + 4, IO_DMAPG + 4 },
110 /* mcclock */
111 { IO_RTC, IO_RTC + 1 },
112 /* pciide */
113 { 0x170, 0x170 + 7 },
114 { 0x1f0, 0x1f0 + 7 },
115 { 0x376, 0x376 },
116 { 0x3f6, 0x3f6 },
117 /* com */
118 { IO_COM1, IO_COM1 + 8 }, /* IR port */
119 { IO_COM2, IO_COM2 + 8 }, /* serial port */
120
121 { 0 }
122 };
123
124 const struct legacy_io_range lynloong_legacy_ranges[] = {
125 /* isa */
126 { IO_DMAPG + 4, IO_DMAPG + 4 },
127 /* mcclock */
128 { IO_RTC, IO_RTC + 1 },
129 /* pciide */
130 { 0x170, 0x170 + 7 },
131 { 0x1f0, 0x1f0 + 7 },
132 { 0x376, 0x376 },
133 { 0x3f6, 0x3f6 },
134 #if 0 /* no external connector */
135 /* com */
136 { IO_COM2, IO_COM2 + 8 },
137 #endif
138
139 { 0 }
140 };
141
142 const struct legacy_io_range yeeloong_legacy_ranges[] = {
143 /* isa */
144 { IO_DMAPG + 4, IO_DMAPG + 4 },
145 /* pckbc */
146 { IO_KBD, IO_KBD },
147 { IO_KBD + 4, IO_KBD + 4 },
148 /* mcclock */
149 { IO_RTC, IO_RTC + 1 },
150 /* pciide */
151 { 0x170, 0x170 + 7 },
152 { 0x1f0, 0x1f0 + 7 },
153 { 0x376, 0x376 },
154 { 0x3f6, 0x3f6 },
155 /* kb3110b embedded controller */
156 { 0x381, 0x383 },
157
158 { 0 }
159 };
160
161 struct mips_isa_chipset lemote_isa_chipset = {
162 .ic_v = NULL,
163
164 .ic_attach_hook = lemote_isa_attach_hook,
165 .ic_intr_establish = lemote_isa_intr_establish,
166 .ic_intr_disestablish = lemote_isa_intr_disestablish,
167 .ic_intr_evcnt = lemote_isa_intr_evcnt,
168 .ic_intr_string = lemote_isa_intr_string,
169 };
170
171 const struct platform fuloong_platform = {
172 .system_type = LOONGSON_FULOONG,
173 .vendor = "Lemote",
174 .product = "Fuloong",
175
176 .bonito_config = &lemote_bonito,
177 .isa_chipset = &lemote_isa_chipset,
178 .legacy_io_ranges = fuloong_legacy_ranges,
179 .bonito_mips_intr = MIPS_INT_MASK_4,
180 .isa_mips_intr = MIPS_INT_MASK_0,
181 .isa_intr = lemote_isa_intr,
182 .p_pci_intr_map = lemote_intr_map,
183 .irq_map =loongson2f_irqmap,
184
185 .setup = fuloong_setup,
186 .device_register = lemote_device_register,
187
188 .powerdown = fuloong_powerdown,
189 .reset = lemote_reset
190 };
191
192 const struct platform lynloong_platform = {
193 .system_type = LOONGSON_LYNLOONG,
194 .vendor = "Lemote",
195 .product = "Lynloong",
196
197 .bonito_config = &lemote_bonito,
198 .isa_chipset = &lemote_isa_chipset,
199 .legacy_io_ranges = lynloong_legacy_ranges,
200 .bonito_mips_intr = MIPS_INT_MASK_4,
201 .isa_mips_intr = MIPS_INT_MASK_0,
202 .isa_intr = lemote_isa_intr,
203 .p_pci_intr_map = lemote_intr_map,
204 .irq_map =loongson2f_irqmap,
205
206 .setup = fuloong_setup,
207 .device_register = lemote_device_register,
208
209 .powerdown = fuloong_powerdown,
210 .reset = lemote_reset
211 };
212
213 const struct platform yeeloong_platform = {
214 .system_type = LOONGSON_YEELOONG,
215 .vendor = "Lemote",
216 .product = "Yeeloong",
217
218 .bonito_config = &lemote_bonito,
219 .isa_chipset = &lemote_isa_chipset,
220 .legacy_io_ranges = yeeloong_legacy_ranges,
221 .bonito_mips_intr = MIPS_INT_MASK_4,
222 .isa_mips_intr = MIPS_INT_MASK_0,
223 .isa_intr = lemote_isa_intr,
224 .p_pci_intr_map = lemote_intr_map,
225 .irq_map =loongson2f_irqmap,
226
227 .setup = NULL,
228 .device_register = lemote_device_register,
229
230 .powerdown = yeeloong_powerdown,
231 .reset = lemote_reset,
232 #if NYKBEC > 0
233 .suspend = ykbec_suspend,
234 .resume = ykbec_resume
235 #endif
236 };
237
238 static int stray_intr[BONITO_NISA];
239
240 /*
241 * PCI model specific routines
242 */
243
244 void
245 lemote_pci_attach_hook(device_t parent, device_t self,
246 struct pcibus_attach_args *pba)
247 {
248 pci_chipset_tag_t pc = pba->pba_pc;
249 pcitag_t tag;
250 pcireg_t id;
251 int dev, i;
252
253 if (pba->pba_bus != 0)
254 return;
255
256 /*
257 * Check for an AMD CS5536 chip; if one is found, register
258 * the proper PCI configuration space hooks.
259 */
260
261 for (dev = pci_bus_maxdevs(pc, 0); dev >= 0; dev--) {
262 tag = pci_make_tag(pc, 0, dev, 0);
263 id = pci_conf_read(pc, tag, PCI_ID_REG);
264 DPRINTF(("lemote_pci_attach_hook id 0x%x\n", id));
265 if (id == PCI_ID_CODE(PCI_VENDOR_AMD,
266 PCI_PRODUCT_AMD_CS5536_PCISB)) {
267 glx_init(pc, tag, dev);
268 break;
269 }
270 }
271
272 wrmsr(GCSC_PIC_SHDW, 0);
273 DPRINTF(("PMON setup picregs:"));
274 for (i = 0; i < 12; i++) {
275 if (i == 6)
276 DPRINTF((" | "));
277 DPRINTF((" 0x%x", (uint32_t)(rdmsr(GCSC_PIC_SHDW) & 0xff)));
278 }
279 DPRINTF(("\n"));
280 DPRINTF(("intsel 0x%x 0x%x\n", REGVAL8(BONITO_PCIIO_BASE + 0x4d0),
281 REGVAL8(BONITO_PCIIO_BASE + 0x4d1)));
282
283 /* setup legacy interrupt controller */
284 REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW1) = 0xff;
285 REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_ICW1) =
286 ICW1_SELECT | ICW1_IC4;
287 REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_ICW2) = ICW2_VECTOR(0);
288 REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_ICW3) = ICW3_CASCADE(2);
289 REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_ICW4) = ICW4_8086;
290 delay(100);
291 /* mask all interrupts */
292 REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW1) = 0xff;
293
294 /* read ISR by default. */
295 REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW3) = OCW3_SELECT | OCW3_RR;
296 (void)REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW3);
297
298 /* reset; program device, four bytes */
299 REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_OCW1) = 0xff;
300 REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_ICW1) =
301 ICW1_SELECT | ICW1_IC4;
302 REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_ICW2) = ICW2_VECTOR(8);
303 REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_ICW3) = ICW3_SIC(2);
304 REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_ICW4) = ICW4_8086;
305 delay(100);
306 /* leave interrupts masked */
307 REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_OCW1) = 0xff;
308 /* read ISR by default. */
309 REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_OCW3) = OCW3_SELECT | OCW3_RR;
310 (void)REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_OCW3);
311 }
312
313 int
314 lemote_intr_map(int dev, int fn, int pin, pci_intr_handle_t *ihp)
315 {
316 switch (dev) {
317 /* onboard devices, only pin A is wired */
318 case 6:
319 case 7:
320 case 8:
321 case 9:
322 if (pin == PCI_INTERRUPT_PIN_A) {
323 *ihp = BONITO_DIRECT_IRQ(LOONGSON_INTR_PCIA +
324 (dev - 6));
325 return (0);
326 }
327 break;
328 /* PCI slot */
329 case 10:
330 *ihp = BONITO_DIRECT_IRQ(LOONGSON_INTR_PCIA +
331 (pin - PCI_INTERRUPT_PIN_A));
332 return (0);
333 /* Geode chip */
334 case 14:
335 switch (fn) {
336 case 1: /* Flash */
337 *ihp = BONITO_ISA_IRQ(6);
338 return (0);
339 case 3: /* AC97 */
340 *ihp = BONITO_ISA_IRQ(9);
341 return (0);
342 case 4: /* OHCI */
343 case 5: /* EHCI */
344 *ihp = BONITO_ISA_IRQ(11);
345 return (0);
346 }
347 break;
348 default:
349 break;
350 }
351 return (1);
352 }
353
354 /*
355 * ISA model specific routines
356 */
357
358 void
359 lemote_isa_attach_hook(device_t parent, device_t self,
360 struct isabus_attach_args *iba)
361 {
362
363 loongson_set_isa_imr(loongson_isaimr);
364 }
365
366 void *
367 lemote_isa_intr_establish(void *v, int irq, int type, int level,
368 int (*handler)(void *), void *arg)
369 {
370 void *ih;
371 uint imr;
372
373 ih = evbmips_intr_establish(BONITO_ISA_IRQ(irq), handler, arg);
374 if (ih == NULL)
375 return (NULL);
376
377 /* enable interrupt */
378 imr = lemote_get_isa_imr();
379 imr |= (1 << irq);
380 DPRINTF(("lemote_isa_intr_establish: enable irq %d 0x%x\n", irq, imr));
381 loongson_set_isa_imr(imr);
382 return (ih);
383 }
384
385 void
386 lemote_isa_intr_disestablish(void *v, void *ih)
387 {
388
389 evbmips_intr_disestablish(ih);
390 }
391
392 const struct evcnt *
393 lemote_isa_intr_evcnt(void *v, int irq)
394 {
395
396 if (irq == 0 || irq >= BONITO_NISA || irq == 2)
397 panic("lemote_isa_intr_evcnt: bogus isa irq 0x%x", irq);
398
399 return (&bonito_intrhead[BONITO_ISA_IRQ(irq)].intr_count);
400 }
401
402 const char *
403 lemote_isa_intr_string(void *v, int irq)
404 {
405 if (irq == 0 || irq >= BONITO_NISA || irq == 2)
406 panic("lemote_isa_intr_string: bogus isa irq 0x%x", irq);
407
408 return loongson_intr_string(&lemote_bonito, BONITO_ISA_IRQ(irq));
409 }
410
411 /*
412 * Legacy (ISA) interrupt handling
413 */
414
415 /*
416 * Process legacy interrupts.
417 *
418 * XXX On 2F, ISA interrupts only occur on LOONGSON_INTR_INT0, but since
419 * XXX the other LOONGSON_INTR_INT# are unmaskable, bad things will happen
420 * XXX if they ever are triggered...
421 */
422 void
423 lemote_isa_intr(int ipl, vaddr_t pc, uint32_t ipending)
424 {
425 #if NISA > 0
426 struct evbmips_intrhand *ih;
427 uint32_t isr, imr, mask;
428 int bitno;
429 int rc;
430
431 imr = lemote_get_isa_imr();
432 isr = lemote_get_isa_isr() & imr;
433 if (isr == 0)
434 return;
435
436 /*
437 * Now process allowed interrupts.
438 */
439 /* Service higher level interrupts first */
440 for (bitno = BONITO_NISA - 1, mask = 1UL << bitno;
441 mask != 0;
442 bitno--, mask >>= 1) {
443 if ((isr & mask) == 0)
444 continue;
445
446 loongson_isa_specific_eoi(bitno);
447
448 rc = 0;
449 LIST_FOREACH(ih,
450 &bonito_intrhead[BONITO_ISA_IRQ(bitno)].intrhand_head,
451 ih_q) {
452 if ((*ih->ih_func)(ih->ih_arg) != 0) {
453 rc = 1;
454 bonito_intrhead[BONITO_ISA_IRQ(bitno)].intr_count.ev_count++;
455 }
456 }
457 if (rc == 0) {
458 if (stray_intr[bitno]++ & 0x10000) {
459 printf("spurious isa interrupt %d\n", bitno);
460 stray_intr[bitno] = 0;
461 }
462 }
463
464 if ((isr ^= mask) == 0)
465 break;
466 }
467
468 /*
469 * Reenable interrupts which have been serviced.
470 */
471 loongson_set_isa_imr(imr);
472 #endif
473 }
474
475 uint
476 lemote_get_isa_imr(void)
477 {
478 uint imr1, imr2;
479
480 imr1 = 0xff & ~REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW1);
481 imr1 &= ~(1 << 2); /* hide cascade */
482 imr2 = 0xff & ~REGVAL8(BONITO_PCIIO_BASE + IO_ICU2 + PIC_OCW1);
483
484 return ((imr2 << 8) | imr1);
485 }
486
487 uint
488 lemote_get_isa_isr(void)
489 {
490 uint isr1, isr2;
491
492 isr1 = REGVAL8(BONITO_PCIIO_BASE + IO_ICU1);
493 isr1 &= ~(1 << 2);
494 isr2 = REGVAL8(BONITO_PCIIO_BASE + IO_ICU2);
495
496 return ((isr2 << 8) | isr1);
497 }
498
499 /*
500 * Other model specific routines
501 */
502
503 void
504 fuloong_powerdown(void)
505 {
506 vaddr_t gpiobase;
507
508 gpiobase = BONITO_PCIIO_BASE + (rdmsr(GCSC_DIVIL_LBAR_GPIO) & 0xff00);
509 /* enable GPIO 13 */
510 REGVAL(gpiobase + GCSC_GPIOL_OUT_EN) = GCSC_GPIO_ATOMIC_VALUE(13, 1);
511 /* set GPIO13 value to zero */
512 REGVAL(gpiobase + GCSC_GPIOL_OUT_VAL) = GCSC_GPIO_ATOMIC_VALUE(13, 0);
513 }
514
515 void
516 yeeloong_powerdown(void)
517 {
518
519 REGVAL(BONITO_GPIODATA) &= ~0x00000001;
520 REGVAL(BONITO_GPIOIE) &= ~0x00000001;
521 }
522
523 void
524 lemote_reset(void)
525 {
526
527 wrmsr(GCSC_GLCP_SYS_RST, rdmsr(GCSC_GLCP_SYS_RST) | 1);
528 }
529
530 void
531 fuloong_setup(void)
532 {
533 #if NCOM > 0
534 const char *envvar;
535 int serial;
536
537 envvar = pmon_getenv("nokbd");
538 serial = envvar != NULL;
539 envvar = pmon_getenv("novga");
540 serial = serial && envvar != NULL;
541
542 //serial = 1; /* XXXXXX */
543 if (serial) {
544 comconsiot = &bonito_iot;
545 comconsaddr = 0x2f8;
546 comconsrate = 115200; /* default PMON console speed */
547 }
548 #endif
549 }
550
551 void
552 lemote_device_register(device_t dev, void *aux)
553 {
554 const char *name = device_xname(dev);
555
556 if (device_class(dev) != bootdev_class)
557 return;
558
559 /*
560 * The device numbering must match. There's no way
561 * pmon tells us more info. Depending on the usb slot
562 * and hubs used you may be lucky. Also, assume umass/sd for usb
563 * attached devices.
564 */
565 switch (bootdev_class) {
566 case DV_DISK:
567 if (device_is_a(dev, "wd") && strcmp(name, bootdev) == 0) {
568 if (booted_device == NULL)
569 booted_device = dev;
570 } else {
571 /* XXX this really only works safely for usb0... */
572 if ((device_is_a(dev, "sd") ||
573 device_is_a(dev, "cd") == 0) &&
574 strncmp(bootdev, "usb", 3) == 0 &&
575 strcmp(name + 2, bootdev + 3) == 0) {
576 if (booted_device == NULL)
577 booted_device = dev;
578 }
579 }
580 break;
581 case DV_IFNET:
582 /*
583 * This relies on the onboard Ethernet interface being
584 * attached before any other (usb) interface.
585 */
586 if (booted_device == NULL)
587 booted_device = dev;
588 break;
589 default:
590 break;
591 }
592 }
593