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      1  1.7  martin /*	$NetBSD: malta_bus_mem.c,v 1.7 2008/04/28 20:23:17 martin Exp $	*/
      2  1.1  simonb 
      3  1.1  simonb /*-
      4  1.1  simonb  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5  1.1  simonb  * All rights reserved.
      6  1.1  simonb  *
      7  1.1  simonb  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1  simonb  * by Jason R. Thorpe.
      9  1.1  simonb  *
     10  1.1  simonb  * Redistribution and use in source and binary forms, with or without
     11  1.1  simonb  * modification, are permitted provided that the following conditions
     12  1.1  simonb  * are met:
     13  1.1  simonb  * 1. Redistributions of source code must retain the above copyright
     14  1.1  simonb  *    notice, this list of conditions and the following disclaimer.
     15  1.1  simonb  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1  simonb  *    notice, this list of conditions and the following disclaimer in the
     17  1.1  simonb  *    documentation and/or other materials provided with the distribution.
     18  1.1  simonb  *
     19  1.1  simonb  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  1.1  simonb  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  1.1  simonb  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  1.1  simonb  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  1.1  simonb  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  1.1  simonb  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  1.1  simonb  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  1.1  simonb  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  1.1  simonb  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  1.1  simonb  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  1.1  simonb  * POSSIBILITY OF SUCH DAMAGE.
     30  1.1  simonb  */
     31  1.1  simonb 
     32  1.1  simonb /*
     33  1.1  simonb  * Platform-specific PCI bus memory support for the MIPS Malta.
     34  1.1  simonb  */
     35  1.5   lukem 
     36  1.5   lukem #include <sys/cdefs.h>
     37  1.7  martin __KERNEL_RCSID(0, "$NetBSD: malta_bus_mem.c,v 1.7 2008/04/28 20:23:17 martin Exp $");
     38  1.1  simonb 
     39  1.1  simonb #include <sys/param.h>
     40  1.1  simonb 
     41  1.1  simonb #include <evbmips/malta/maltareg.h>
     42  1.1  simonb #include <evbmips/malta/maltavar.h>
     43  1.1  simonb 
     44  1.1  simonb #define	CHIP		malta
     45  1.2  simonb #define	CHIP_MEM	/* defined */
     46  1.1  simonb 
     47  1.1  simonb #define	CHIP_EX_MALLOC_SAFE(v)	(((struct malta_config *)(v))->mc_mallocsafe)
     48  1.2  simonb #define	CHIP_EXTENT(v)		(((struct malta_config *)(v))->mc_mem_ex)
     49  1.1  simonb 
     50  1.1  simonb #if 1
     51  1.1  simonb /*
     52  1.1  simonb  * There are actually 2 PCILO memory windows, but they are configured
     53  1.1  simonb  * as one contiguous PCI memory space.
     54  1.1  simonb  */
     55  1.1  simonb 
     56  1.1  simonb /* MEM region 1 */
     57  1.3  simonb #define	CHIP_W1_BUS_START(v)	MALTA_PCIMEM1_BASE
     58  1.2  simonb #define	CHIP_W1_BUS_END(v)	MALTA_PCIMEM1_SIZE + \
     59  1.2  simonb 				MALTA_PCIMEM2_SIZE
     60  1.2  simonb #define	CHIP_W1_SYS_START(v)	((u_long)MALTA_PCIMEM1_BASE)
     61  1.2  simonb #define	CHIP_W1_SYS_END(v)	((u_long)MALTA_PCIMEM1_BASE + \
     62  1.2  simonb 				 CHIP_W1_BUS_END(v))
     63  1.1  simonb #else
     64  1.1  simonb 
     65  1.1  simonb /* MEM region 1 */
     66  1.3  simonb #define	CHIP_W1_BUS_START(v)	MALTA_PCIMEM1_BASE
     67  1.2  simonb #define	CHIP_W1_BUS_END(v)	MALTA_PCIMEM1_SIZE
     68  1.2  simonb #define	CHIP_W1_SYS_START(v)	((u_long)MALTA_PCIMEM1_BASE)
     69  1.2  simonb #define	CHIP_W1_SYS_END(v)	((u_long)MALTA_PCIMEM1_BASE + \
     70  1.2  simonb 				 CHIP_W1_BUS_END(v))
     71  1.1  simonb 
     72  1.1  simonb /* MEM region 2 */
     73  1.3  simonb #define	CHIP_W2_BUS_START(v)	MALTA_PCIMEM2_BASE
     74  1.2  simonb #define	CHIP_W2_BUS_END(v)	MALTA_PCIMEM2_SIZE
     75  1.2  simonb #define	CHIP_W2_SYS_START(v)	((u_long)MALTA_PCIMEM2_BASE)
     76  1.2  simonb #define	CHIP_W2_SYS_END(v)	((u_long)MALTA_PCIMEM2_BASE + \
     77  1.2  simonb 				 CHIP_W2_BUS_END(v))
     78  1.1  simonb #endif
     79  1.1  simonb 
     80  1.2  simonb #include <mips/mips/bus_space_alignstride_chipdep.c>
     81