machdep.c revision 1.1.2.19 1 1.1.2.19 matt /* $NetBSD: machdep.c,v 1.1.2.19 2010/02/01 04:17:51 matt Exp $ */
2 1.1.2.1 cliff
3 1.1.2.1 cliff /*
4 1.1.2.1 cliff * Copyright 2001, 2002 Wasabi Systems, Inc.
5 1.1.2.1 cliff * All rights reserved.
6 1.1.2.1 cliff *
7 1.1.2.1 cliff * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc.
8 1.1.2.1 cliff *
9 1.1.2.1 cliff * Redistribution and use in source and binary forms, with or without
10 1.1.2.1 cliff * modification, are permitted provided that the following conditions
11 1.1.2.1 cliff * are met:
12 1.1.2.1 cliff * 1. Redistributions of source code must retain the above copyright
13 1.1.2.1 cliff * notice, this list of conditions and the following disclaimer.
14 1.1.2.1 cliff * 2. Redistributions in binary form must reproduce the above copyright
15 1.1.2.1 cliff * notice, this list of conditions and the following disclaimer in the
16 1.1.2.1 cliff * documentation and/or other materials provided with the distribution.
17 1.1.2.1 cliff * 3. All advertising materials mentioning features or use of this software
18 1.1.2.1 cliff * must display the following acknowledgement:
19 1.1.2.1 cliff * This product includes software developed for the NetBSD Project by
20 1.1.2.1 cliff * Wasabi Systems, Inc.
21 1.1.2.1 cliff * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1.2.1 cliff * or promote products derived from this software without specific prior
23 1.1.2.1 cliff * written permission.
24 1.1.2.1 cliff *
25 1.1.2.1 cliff * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1.2.1 cliff * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1.2.1 cliff * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1.2.1 cliff * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1.2.1 cliff * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1.2.1 cliff * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1.2.1 cliff * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1.2.1 cliff * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1.2.1 cliff * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1.2.1 cliff * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1.2.1 cliff * POSSIBILITY OF SUCH DAMAGE.
36 1.1.2.1 cliff */
37 1.1.2.1 cliff
38 1.1.2.1 cliff /*
39 1.1.2.1 cliff * Copyright (c) 1992, 1993
40 1.1.2.1 cliff * The Regents of the University of California. All rights reserved.
41 1.1.2.1 cliff *
42 1.1.2.1 cliff * This code is derived from software contributed to Berkeley by
43 1.1.2.1 cliff * the Systems Programming Group of the University of Utah Computer
44 1.1.2.1 cliff * Science Department, The Mach Operating System project at
45 1.1.2.1 cliff * Carnegie-Mellon University and Ralph Campbell.
46 1.1.2.1 cliff *
47 1.1.2.1 cliff * Redistribution and use in source and binary forms, with or without
48 1.1.2.1 cliff * modification, are permitted provided that the following conditions
49 1.1.2.1 cliff * are met:
50 1.1.2.1 cliff * 1. Redistributions of source code must retain the above copyright
51 1.1.2.1 cliff * notice, this list of conditions and the following disclaimer.
52 1.1.2.1 cliff * 2. Redistributions in binary form must reproduce the above copyright
53 1.1.2.1 cliff * notice, this list of conditions and the following disclaimer in the
54 1.1.2.1 cliff * documentation and/or other materials provided with the distribution.
55 1.1.2.1 cliff * 3. Neither the name of the University nor the names of its contributors
56 1.1.2.1 cliff * may be used to endorse or promote products derived from this software
57 1.1.2.1 cliff * without specific prior written permission.
58 1.1.2.1 cliff *
59 1.1.2.1 cliff * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
60 1.1.2.1 cliff * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
61 1.1.2.1 cliff * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
62 1.1.2.1 cliff * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
63 1.1.2.1 cliff * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
64 1.1.2.1 cliff * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
65 1.1.2.1 cliff * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 1.1.2.1 cliff * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 1.1.2.1 cliff * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 1.1.2.1 cliff * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 1.1.2.1 cliff * SUCH DAMAGE.
70 1.1.2.1 cliff *
71 1.1.2.1 cliff * @(#)machdep.c 8.3 (Berkeley) 1/12/94
72 1.1.2.1 cliff * from: Utah Hdr: machdep.c 1.63 91/04/24
73 1.1.2.1 cliff */
74 1.1.2.1 cliff /*
75 1.1.2.1 cliff * Copyright (c) 1988 University of Utah.
76 1.1.2.1 cliff *
77 1.1.2.1 cliff * This code is derived from software contributed to Berkeley by
78 1.1.2.1 cliff * the Systems Programming Group of the University of Utah Computer
79 1.1.2.1 cliff * Science Department, The Mach Operating System project at
80 1.1.2.1 cliff * Carnegie-Mellon University and Ralph Campbell.
81 1.1.2.1 cliff *
82 1.1.2.1 cliff * Redistribution and use in source and binary forms, with or without
83 1.1.2.1 cliff * modification, are permitted provided that the following conditions
84 1.1.2.1 cliff * are met:
85 1.1.2.1 cliff * 1. Redistributions of source code must retain the above copyright
86 1.1.2.1 cliff * notice, this list of conditions and the following disclaimer.
87 1.1.2.1 cliff * 2. Redistributions in binary form must reproduce the above copyright
88 1.1.2.1 cliff * notice, this list of conditions and the following disclaimer in the
89 1.1.2.1 cliff * documentation and/or other materials provided with the distribution.
90 1.1.2.1 cliff * 3. All advertising materials mentioning features or use of this software
91 1.1.2.1 cliff * must display the following acknowledgement:
92 1.1.2.1 cliff * This product includes software developed by the University of
93 1.1.2.1 cliff * California, Berkeley and its contributors.
94 1.1.2.1 cliff * 4. Neither the name of the University nor the names of its contributors
95 1.1.2.1 cliff * may be used to endorse or promote products derived from this software
96 1.1.2.1 cliff * without specific prior written permission.
97 1.1.2.1 cliff *
98 1.1.2.1 cliff * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
99 1.1.2.1 cliff * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
100 1.1.2.1 cliff * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
101 1.1.2.1 cliff * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
102 1.1.2.1 cliff * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
103 1.1.2.1 cliff * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
104 1.1.2.1 cliff * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
105 1.1.2.1 cliff * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
106 1.1.2.1 cliff * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
107 1.1.2.1 cliff * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
108 1.1.2.1 cliff * SUCH DAMAGE.
109 1.1.2.1 cliff *
110 1.1.2.1 cliff * @(#)machdep.c 8.3 (Berkeley) 1/12/94
111 1.1.2.1 cliff * from: Utah Hdr: machdep.c 1.63 91/04/24
112 1.1.2.1 cliff */
113 1.1.2.1 cliff
114 1.1.2.1 cliff #include <sys/cdefs.h>
115 1.1.2.19 matt __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.1.2.19 2010/02/01 04:17:51 matt Exp $");
116 1.1.2.1 cliff
117 1.1.2.1 cliff #include "opt_ddb.h"
118 1.1.2.1 cliff #include "opt_com.h"
119 1.1.2.1 cliff #include "opt_execfmt.h"
120 1.1.2.1 cliff #include "opt_memsize.h"
121 1.1.2.1 cliff
122 1.1.2.1 cliff #include <sys/param.h>
123 1.1.2.1 cliff #include <sys/systm.h>
124 1.1.2.1 cliff #include <sys/kernel.h>
125 1.1.2.1 cliff #include <sys/buf.h>
126 1.1.2.1 cliff #include <sys/reboot.h>
127 1.1.2.1 cliff #include <sys/user.h>
128 1.1.2.1 cliff #include <sys/mount.h>
129 1.1.2.1 cliff #include <sys/kcore.h>
130 1.1.2.1 cliff #include <sys/boot_flag.h>
131 1.1.2.1 cliff #include <sys/termios.h>
132 1.1.2.1 cliff #include <sys/ksyms.h>
133 1.1.2.1 cliff #include <sys/bus.h>
134 1.1.2.1 cliff #include <sys/device.h>
135 1.1.2.6 cliff #include <sys/extent.h>
136 1.1.2.6 cliff #include <sys/malloc.h>
137 1.1.2.1 cliff
138 1.1.2.1 cliff #include <uvm/uvm_extern.h>
139 1.1.2.1 cliff
140 1.1.2.1 cliff #include <dev/cons.h>
141 1.1.2.1 cliff
142 1.1.2.1 cliff #include "ksyms.h"
143 1.1.2.1 cliff
144 1.1.2.1 cliff #if NKSYMS || defined(DDB) || defined(LKM)
145 1.1.2.1 cliff #include <machine/db_machdep.h>
146 1.1.2.1 cliff #include <ddb/db_extern.h>
147 1.1.2.1 cliff #endif
148 1.1.2.1 cliff
149 1.1.2.1 cliff #include <machine/cpu.h>
150 1.1.2.1 cliff #include <machine/psl.h>
151 1.1.2.1 cliff
152 1.1.2.1 cliff #include "com.h"
153 1.1.2.1 cliff #if NCOM == 0
154 1.1.2.1 cliff #error no serial console
155 1.1.2.1 cliff #endif
156 1.1.2.1 cliff
157 1.1.2.1 cliff #include <dev/ic/comreg.h>
158 1.1.2.1 cliff #include <dev/ic/comvar.h>
159 1.1.2.1 cliff
160 1.1.2.1 cliff #include <mips/rmi/rmixl_comvar.h>
161 1.1.2.1 cliff #include <mips/rmi/rmixlvar.h>
162 1.1.2.1 cliff #include <mips/rmi/rmixl_firmware.h>
163 1.1.2.1 cliff #include <mips/rmi/rmixlreg.h>
164 1.1.2.1 cliff
165 1.1.2.6 cliff #ifdef MACHDEP_DEBUG
166 1.1.2.6 cliff int machdep_debug=MACHDEP_DEBUG;
167 1.1.2.6 cliff # define DPRINTF(x) do { if (machdep_debug) printf x ; } while(0)
168 1.1.2.6 cliff #else
169 1.1.2.6 cliff # define DPRINTF(x)
170 1.1.2.6 cliff #endif
171 1.1.2.6 cliff
172 1.1.2.4 cliff #ifndef CONSFREQ
173 1.1.2.10 cliff # define CONSFREQ 66000000
174 1.1.2.4 cliff #endif
175 1.1.2.1 cliff #ifndef CONSPEED
176 1.1.2.1 cliff # define CONSPEED 38400
177 1.1.2.1 cliff #endif
178 1.1.2.1 cliff #ifndef CONMODE
179 1.1.2.1 cliff # define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)
180 1.1.2.1 cliff #endif
181 1.1.2.1 cliff #ifndef CONSADDR
182 1.1.2.1 cliff # define CONSADDR RMIXL_IO_DEV_UART_1
183 1.1.2.1 cliff #endif
184 1.1.2.1 cliff
185 1.1.2.4 cliff int comcnfreq = CONSFREQ;
186 1.1.2.4 cliff int comcnspeed = CONSPEED;
187 1.1.2.4 cliff tcflag_t comcnmode = CONMODE;
188 1.1.2.1 cliff bus_addr_t comcnaddr = (bus_addr_t)CONSADDR;
189 1.1.2.1 cliff
190 1.1.2.1 cliff struct rmixl_config rmixl_configuration;
191 1.1.2.1 cliff
192 1.1.2.1 cliff
193 1.1.2.1 cliff /*
194 1.1.2.1 cliff * array of tested firmware versions
195 1.1.2.4 cliff * if you find new ones and they work
196 1.1.2.1 cliff * please add them
197 1.1.2.1 cliff */
198 1.1.2.18 cliff typedef struct rmiclfw_psb_id {
199 1.1.2.18 cliff uint64_t psb_version;
200 1.1.2.18 cliff rmixlfw_psb_type_t psb_type;
201 1.1.2.18 cliff } rmiclfw_psb_id_t;
202 1.1.2.18 cliff static rmiclfw_psb_id_t rmiclfw_psb_id[] = {
203 1.1.2.18 cliff { 0x4958d4fb00000056ULL, PSB_TYPE_RMI },
204 1.1.2.18 cliff { 0x49a5a8fa00000056ULL, PSB_TYPE_DELL },
205 1.1.2.18 cliff { 0x4aacdb6a00000056ULL, PSB_TYPE_RMI },
206 1.1.2.1 cliff };
207 1.1.2.1 cliff #define RMICLFW_PSB_VERSIONS_LEN \
208 1.1.2.18 cliff (sizeof(rmiclfw_psb_id)/sizeof(rmiclfw_psb_id[0]))
209 1.1.2.1 cliff
210 1.1.2.1 cliff /*
211 1.1.2.6 cliff * storage for fixed extent used to allocate physical address regions
212 1.1.2.6 cliff * because extent(9) start and end values are u_long, they are only
213 1.1.2.6 cliff * 32 bits on a 32 bit kernel, which is insuffucuent since XLS physical
214 1.1.2.6 cliff * address is 40 bits wide. So the "physaddr" map stores regions
215 1.1.2.6 cliff * in units of megabytes.
216 1.1.2.6 cliff */
217 1.1.2.6 cliff static u_long rmixl_physaddr_storage[
218 1.1.2.6 cliff EXTENT_FIXED_STORAGE_SIZE(32)/sizeof(u_long)
219 1.1.2.6 cliff ];
220 1.1.2.6 cliff
221 1.1.2.1 cliff /* For sysctl_hw. */
222 1.1.2.1 cliff extern char cpu_model[];
223 1.1.2.1 cliff
224 1.1.2.1 cliff /* Our exported CPU info; we can have only one. */
225 1.1.2.1 cliff struct cpu_info cpu_info_store;
226 1.1.2.1 cliff
227 1.1.2.1 cliff /* Maps for VM objects. */
228 1.1.2.1 cliff struct vm_map *mb_map = NULL;
229 1.1.2.1 cliff struct vm_map *phys_map = NULL;
230 1.1.2.1 cliff
231 1.1.2.1 cliff int physmem; /* Total physical memory */
232 1.1.2.1 cliff
233 1.1.2.1 cliff int netboot; /* Are we netbooting? */
234 1.1.2.1 cliff
235 1.1.2.1 cliff
236 1.1.2.1 cliff phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
237 1.1.2.6 cliff u_int mem_cluster_cnt;
238 1.1.2.6 cliff
239 1.1.2.1 cliff
240 1.1.2.1 cliff void configure(void);
241 1.1.2.7 cliff void mach_init(int, int32_t *, void *, int64_t);
242 1.1.2.16 cliff static uint64_t rmixlfw_init(int64_t);
243 1.1.2.16 cliff static uint64_t mem_clusters_init(rmixlfw_mmap_t *, rmixlfw_mmap_t *);
244 1.1.2.12 cliff static void __attribute__((__noreturn__)) rmixl_reset(void);
245 1.1.2.6 cliff static void rmixl_physaddr_init(void);
246 1.1.2.6 cliff static u_int ram_seg_resv(phys_ram_seg_t *, u_int, u_quad_t, u_quad_t);
247 1.1.2.6 cliff void rmixlfw_mmap_print(rmixlfw_mmap_t *);
248 1.1.2.1 cliff
249 1.1.2.16 cliff
250 1.1.2.14 cliff #ifdef MULTIPROCESSOR
251 1.1.2.14 cliff void rmixl_get_wakeup_info(struct rmixl_config *);
252 1.1.2.14 cliff #ifdef MACHDEP_DEBUG
253 1.1.2.14 cliff static void rmixl_wakeup_info_print(volatile rmixlfw_cpu_wakeup_info_t *);
254 1.1.2.14 cliff #endif
255 1.1.2.14 cliff #endif
256 1.1.2.14 cliff
257 1.1.2.1 cliff
258 1.1.2.1 cliff /*
259 1.1.2.1 cliff * safepri is a safe priority for sleep to set for a spin-wait during
260 1.1.2.1 cliff * autoconfiguration or after a panic. Used as an argument to splx().
261 1.1.2.1 cliff */
262 1.1.2.1 cliff int safepri = MIPS1_PSL_LOWIPL;
263 1.1.2.1 cliff
264 1.1.2.1 cliff /*
265 1.1.2.1 cliff * Do all the stuff that locore normally does before calling main().
266 1.1.2.1 cliff */
267 1.1.2.1 cliff void
268 1.1.2.7 cliff mach_init(int argc, int32_t *argv, void *envp, int64_t infop)
269 1.1.2.1 cliff {
270 1.1.2.4 cliff struct rmixl_config *rcp = &rmixl_configuration;
271 1.1.2.11 matt void *kernend;
272 1.1.2.16 cliff uint64_t memsize;
273 1.1.2.6 cliff u_int vm_cluster_cnt;
274 1.1.2.8 cliff uint32_t r;
275 1.1.2.6 cliff phys_ram_seg_t vm_clusters[VM_PHYSSEG_MAX];
276 1.1.2.1 cliff extern char edata[], end[];
277 1.1.2.1 cliff
278 1.1.2.14 cliff #ifndef MULTIPROCESSOR
279 1.1.2.8 cliff rmixl_mtcr(0, 1); /* disable all threads except #0 */
280 1.1.2.16 cliff rmixl_mtcr(0x400, 0); /* enable MMU clock gating */
281 1.1.2.16 cliff /* set single MMU Thread Mode */
282 1.1.2.16 cliff /* TLB is partitioned (1 partition) */
283 1.1.2.14 cliff #endif
284 1.1.2.8 cliff
285 1.1.2.8 cliff r = rmixl_mfcr(0x300);
286 1.1.2.8 cliff r &= ~__BIT(14); /* disabled Unaligned Access */
287 1.1.2.8 cliff rmixl_mtcr(0x300, r);
288 1.1.2.8 cliff
289 1.1.2.1 cliff /*
290 1.1.2.1 cliff * Clear the BSS segment.
291 1.1.2.1 cliff */
292 1.1.2.1 cliff kernend = (void *)mips_round_page(end);
293 1.1.2.1 cliff memset(edata, 0, (char *)kernend - edata);
294 1.1.2.1 cliff
295 1.1.2.1 cliff /*
296 1.1.2.1 cliff * Set up the exception vectors and CPU-specific function
297 1.1.2.1 cliff * vectors early on. We need the wbflush() vector set up
298 1.1.2.1 cliff * before comcnattach() is called (or at least before the
299 1.1.2.1 cliff * first printf() after that is called).
300 1.1.2.1 cliff * Also clears the I+D caches.
301 1.1.2.1 cliff */
302 1.1.2.1 cliff mips_vector_init();
303 1.1.2.1 cliff
304 1.1.2.15 matt /* mips_vector_init initialized mips_options */
305 1.1.2.15 matt strcpy(cpu_model, mips_options.mips_cpu->cpu_name);
306 1.1.2.14 cliff
307 1.1.2.14 cliff /* get system info from firmware */
308 1.1.2.1 cliff memsize = rmixlfw_init(infop);
309 1.1.2.1 cliff
310 1.1.2.1 cliff /* set the VM page size */
311 1.1.2.1 cliff uvm_setpagesize();
312 1.1.2.1 cliff
313 1.1.2.1 cliff physmem = btoc(memsize);
314 1.1.2.1 cliff
315 1.1.2.10 cliff rmixl_obio_eb_bus_mem_init(&rcp->rc_obio_eb_memt, rcp);
316 1.1.2.1 cliff
317 1.1.2.1 cliff #if NCOM > 0
318 1.1.2.9 cliff rmixl_com_cnattach(comcnaddr, comcnspeed, comcnfreq,
319 1.1.2.1 cliff COM_TYPE_NORMAL, comcnmode);
320 1.1.2.1 cliff #endif
321 1.1.2.1 cliff
322 1.1.2.1 cliff printf("\nNetBSD/rmixl\n");
323 1.1.2.16 cliff printf("memsize = %#"PRIx64"\n", memsize);
324 1.1.2.1 cliff
325 1.1.2.14 cliff #if defined(MULTIPROCESSOR) && defined(MACHDEP_DEBUG)
326 1.1.2.14 cliff rmixl_wakeup_info_print(rcp->rc_cpu_wakeup_info);
327 1.1.2.14 cliff rmixl_wakeup_info_print(rcp->rc_cpu_wakeup_info + 1);
328 1.1.2.14 cliff printf("cpu_wakeup_info %p, cpu_wakeup_end %p\n",
329 1.1.2.14 cliff rcp->rc_cpu_wakeup_info,
330 1.1.2.14 cliff rcp->rc_cpu_wakeup_end);
331 1.1.2.18 cliff printf("userapp_cpu_map: %#"PRIx64"\n",
332 1.1.2.18 cliff rcp->rc_psb_info.userapp_cpu_map);
333 1.1.2.17 cliff printf("wakeup: %#"PRIx64"\n", rcp->rc_psb_info.wakeup);
334 1.1.2.17 cliff {
335 1.1.2.17 cliff register_t sp;
336 1.1.2.17 cliff asm volatile ("move %0, $sp\n" : "=r"(sp));
337 1.1.2.17 cliff printf("sp: %#"PRIx64"\n", sp);
338 1.1.2.17 cliff }
339 1.1.2.14 cliff #endif
340 1.1.2.14 cliff
341 1.1.2.6 cliff rmixl_physaddr_init();
342 1.1.2.6 cliff
343 1.1.2.1 cliff /*
344 1.1.2.1 cliff * Obtain the cpu frequency
345 1.1.2.1 cliff * Compute the number of ticks for hz.
346 1.1.2.1 cliff * Compute the delay divisor.
347 1.1.2.1 cliff * Double the Hz if this CPU runs at twice the
348 1.1.2.1 cliff * external/cp0-count frequency
349 1.1.2.1 cliff */
350 1.1.2.17 cliff curcpu()->ci_cpu_freq = rcp->rc_psb_info.cpu_frequency;
351 1.1.2.15 matt curcpu()->ci_cctr_freq = curcpu()->ci_cpu_freq;
352 1.1.2.1 cliff curcpu()->ci_cycles_per_hz = (curcpu()->ci_cpu_freq + hz / 2) / hz;
353 1.1.2.1 cliff curcpu()->ci_divisor_delay =
354 1.1.2.1 cliff ((curcpu()->ci_cpu_freq + 500000) / 1000000);
355 1.1.2.15 matt if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
356 1.1.2.1 cliff curcpu()->ci_cpu_freq *= 2;
357 1.1.2.1 cliff
358 1.1.2.1 cliff /*
359 1.1.2.1 cliff * Look at arguments passed to us and compute boothowto.
360 1.1.2.1 cliff * - rmixl firmware gives us a 32 bit argv[i], so adapt
361 1.1.2.1 cliff * by forcing sign extension in cast to (char *)
362 1.1.2.1 cliff */
363 1.1.2.1 cliff boothowto = RB_AUTOBOOT;
364 1.1.2.1 cliff for (int i = 1; i < argc; i++) {
365 1.1.2.7 cliff for (char *cp = (char *)(intptr_t)argv[i]; *cp; cp++) {
366 1.1.2.1 cliff int howto;
367 1.1.2.1 cliff /* Ignore superfluous '-', if there is one */
368 1.1.2.1 cliff if (*cp == '-')
369 1.1.2.1 cliff continue;
370 1.1.2.1 cliff
371 1.1.2.1 cliff howto = 0;
372 1.1.2.1 cliff BOOT_FLAG(*cp, howto);
373 1.1.2.6 cliff if (howto != 0)
374 1.1.2.1 cliff boothowto |= howto;
375 1.1.2.6 cliff #ifdef DIAGNOSTIC
376 1.1.2.6 cliff else
377 1.1.2.6 cliff printf("bootflag '%c' not recognised\n", *cp);
378 1.1.2.6 cliff #endif
379 1.1.2.1 cliff }
380 1.1.2.1 cliff }
381 1.1.2.6 cliff #ifdef DIAGNOSTIC
382 1.1.2.1 cliff printf("boothowto %#x\n", boothowto);
383 1.1.2.6 cliff #endif
384 1.1.2.1 cliff
385 1.1.2.1 cliff /*
386 1.1.2.6 cliff * Reserve pages from the VM system.
387 1.1.2.6 cliff * to maintain mem_clusters[] as a map of raw ram,
388 1.1.2.6 cliff * copy into temporary table vm_clusters[]
389 1.1.2.6 cliff * work on that and use it to feed vm_physload()
390 1.1.2.6 cliff */
391 1.1.2.6 cliff KASSERT(sizeof(mem_clusters) == sizeof(vm_clusters));
392 1.1.2.6 cliff memcpy(&vm_clusters, &mem_clusters, sizeof(vm_clusters));
393 1.1.2.6 cliff vm_cluster_cnt = mem_cluster_cnt;
394 1.1.2.6 cliff
395 1.1.2.6 cliff /* reserve 0..start..kernend pages */
396 1.1.2.6 cliff vm_cluster_cnt = ram_seg_resv(vm_clusters, vm_cluster_cnt,
397 1.1.2.6 cliff 0, round_page(MIPS_KSEG0_TO_PHYS(kernend)));
398 1.1.2.6 cliff
399 1.1.2.6 cliff /* reserve reset exception vector page */
400 1.1.2.9 cliff /* should never be in our clusters anyway... */
401 1.1.2.6 cliff vm_cluster_cnt = ram_seg_resv(vm_clusters, vm_cluster_cnt,
402 1.1.2.12 cliff 0x1FC00000, 0x1FC00000+NBPG);
403 1.1.2.6 cliff
404 1.1.2.14 cliff #ifdef MULTIPROCEESOR
405 1.1.2.14 cliff /* reserve the cpu_wakeup_info area */
406 1.1.2.14 cliff vm_cluster_cnt = ram_seg_resv(vm_clusters, vm_cluster_cnt,
407 1.1.2.14 cliff (u_quad_t)trunc_page(rcp->rc_cpu_wakeup_info),
408 1.1.2.14 cliff (u_quad_t)round_page(rcp->rc_cpu_wakeup_end));
409 1.1.2.14 cliff #endif
410 1.1.2.14 cliff
411 1.1.2.18 cliff #ifdef MEMLIMIT
412 1.1.2.18 cliff /* reserve everything > MEMLIMIT */
413 1.1.2.14 cliff vm_cluster_cnt = ram_seg_resv(vm_clusters, vm_cluster_cnt,
414 1.1.2.18 cliff (u_quad_t)MEMLIMIT, (u_quad_t)~0);
415 1.1.2.14 cliff #endif
416 1.1.2.14 cliff
417 1.1.2.6 cliff /*
418 1.1.2.6 cliff * Load vm_clusters[] into the VM system.
419 1.1.2.6 cliff */
420 1.1.2.11 matt mips_page_physload(MIPS_KSEG0_START, (vaddr_t) kernend,
421 1.1.2.11 matt vm_clusters, vm_cluster_cnt, NULL, 0);
422 1.1.2.1 cliff
423 1.1.2.1 cliff /*
424 1.1.2.1 cliff * Initialize error message buffer (at end of core).
425 1.1.2.1 cliff */
426 1.1.2.1 cliff mips_init_msgbuf();
427 1.1.2.1 cliff
428 1.1.2.1 cliff pmap_bootstrap();
429 1.1.2.1 cliff
430 1.1.2.1 cliff /*
431 1.1.2.1 cliff * Allocate space for proc0's USPACE.
432 1.1.2.1 cliff */
433 1.1.2.11 matt mips_init_lwp0_uarea();
434 1.1.2.1 cliff
435 1.1.2.1 cliff /*
436 1.1.2.1 cliff * Initialize debuggers, and break into them, if appropriate.
437 1.1.2.1 cliff */
438 1.1.2.1 cliff #if NKSYMS || defined(DDB) || defined(LKM)
439 1.1.2.1 cliff ksyms_init(0, 0, 0);
440 1.1.2.1 cliff #endif
441 1.1.2.1 cliff
442 1.1.2.1 cliff #if defined(DDB)
443 1.1.2.1 cliff if (boothowto & RB_KDB)
444 1.1.2.1 cliff Debugger();
445 1.1.2.1 cliff #endif
446 1.1.2.6 cliff }
447 1.1.2.6 cliff
448 1.1.2.6 cliff /*
449 1.1.2.6 cliff * ram_seg_resv - cut reserved regions out of segs, fragmenting as needed
450 1.1.2.6 cliff *
451 1.1.2.6 cliff * we simply build a new table of segs, then copy it back over the given one
452 1.1.2.6 cliff * this is inefficient but simple and called only a few times
453 1.1.2.6 cliff *
454 1.1.2.6 cliff * note: 'last' here means 1st addr past the end of the segment (start+size)
455 1.1.2.6 cliff */
456 1.1.2.6 cliff static u_int
457 1.1.2.6 cliff ram_seg_resv(phys_ram_seg_t *segs, u_int nsegs,
458 1.1.2.6 cliff u_quad_t resv_first, u_quad_t resv_last)
459 1.1.2.6 cliff {
460 1.1.2.6 cliff u_quad_t first, last;
461 1.1.2.6 cliff int new_nsegs=0;
462 1.1.2.6 cliff int resv_flag;
463 1.1.2.6 cliff phys_ram_seg_t new_segs[VM_PHYSSEG_MAX];
464 1.1.2.6 cliff
465 1.1.2.6 cliff for (u_int i=0; i < nsegs; i++) {
466 1.1.2.6 cliff resv_flag = 0;
467 1.1.2.6 cliff first = trunc_page(segs[i].start);
468 1.1.2.6 cliff last = round_page(segs[i].start + segs[i].size);
469 1.1.2.6 cliff
470 1.1.2.6 cliff KASSERT(new_nsegs < VM_PHYSSEG_MAX);
471 1.1.2.6 cliff if ((resv_first <= first) && (resv_last >= last)) {
472 1.1.2.6 cliff /* whole segment is resverved */
473 1.1.2.6 cliff continue;
474 1.1.2.6 cliff }
475 1.1.2.6 cliff if ((resv_first > first) && (resv_first < last)) {
476 1.1.2.6 cliff u_quad_t new_last;
477 1.1.2.6 cliff
478 1.1.2.6 cliff /*
479 1.1.2.6 cliff * reserved start in segment
480 1.1.2.6 cliff * salvage the leading fragment
481 1.1.2.6 cliff */
482 1.1.2.6 cliff resv_flag = 1;
483 1.1.2.6 cliff new_last = last - (last - resv_first);
484 1.1.2.6 cliff KASSERT (new_last > first);
485 1.1.2.6 cliff new_segs[new_nsegs].start = first;
486 1.1.2.6 cliff new_segs[new_nsegs].size = new_last - first;
487 1.1.2.6 cliff new_nsegs++;
488 1.1.2.6 cliff }
489 1.1.2.6 cliff if ((resv_last > first) && (resv_last < last)) {
490 1.1.2.6 cliff u_quad_t new_first;
491 1.1.2.6 cliff
492 1.1.2.6 cliff /*
493 1.1.2.6 cliff * reserved end in segment
494 1.1.2.6 cliff * salvage the trailing fragment
495 1.1.2.6 cliff */
496 1.1.2.6 cliff resv_flag = 1;
497 1.1.2.6 cliff new_first = first + (resv_last - first);
498 1.1.2.6 cliff KASSERT (last > (new_first + NBPG));
499 1.1.2.6 cliff new_segs[new_nsegs].start = new_first;
500 1.1.2.6 cliff new_segs[new_nsegs].size = last - new_first;
501 1.1.2.6 cliff new_nsegs++;
502 1.1.2.6 cliff }
503 1.1.2.6 cliff if (resv_flag == 0) {
504 1.1.2.6 cliff /*
505 1.1.2.6 cliff * nothing reserved here, take it all
506 1.1.2.6 cliff */
507 1.1.2.6 cliff new_segs[new_nsegs].start = first;
508 1.1.2.6 cliff new_segs[new_nsegs].size = last - first;
509 1.1.2.6 cliff new_nsegs++;
510 1.1.2.6 cliff }
511 1.1.2.6 cliff
512 1.1.2.6 cliff }
513 1.1.2.6 cliff
514 1.1.2.6 cliff memcpy(segs, new_segs, sizeof(new_segs));
515 1.1.2.6 cliff
516 1.1.2.6 cliff return new_nsegs;
517 1.1.2.6 cliff }
518 1.1.2.6 cliff
519 1.1.2.6 cliff /*
520 1.1.2.6 cliff * create an extent for physical address space
521 1.1.2.6 cliff * these are in units of MB for sake of compression (for sake of 32 bit kernels)
522 1.1.2.6 cliff * allocate the regions where we have known functions (DRAM, IO, etc)
523 1.1.2.6 cliff * what remains can be allocated as needed for other stuff
524 1.1.2.6 cliff * e.g. to configure BARs that are not already initialized and enabled.
525 1.1.2.6 cliff */
526 1.1.2.6 cliff static void
527 1.1.2.6 cliff rmixl_physaddr_init(void)
528 1.1.2.6 cliff {
529 1.1.2.6 cliff struct extent *ext;
530 1.1.2.6 cliff unsigned long start = 0UL;
531 1.1.2.6 cliff unsigned long end = (__BIT(40) / (1024 * 1024)) -1;
532 1.1.2.6 cliff u_long base;
533 1.1.2.6 cliff u_long size;
534 1.1.2.6 cliff uint32_t r;
535 1.1.2.6 cliff
536 1.1.2.6 cliff ext = extent_create("physaddr", start, end, M_DEVBUF,
537 1.1.2.6 cliff (void *)rmixl_physaddr_storage, sizeof(rmixl_physaddr_storage),
538 1.1.2.6 cliff EX_NOWAIT | EX_NOCOALESCE);
539 1.1.2.6 cliff
540 1.1.2.6 cliff if (ext == NULL)
541 1.1.2.6 cliff panic("%s: extent_create failed", __func__);
542 1.1.2.6 cliff
543 1.1.2.6 cliff /*
544 1.1.2.6 cliff * grab regions per DRAM BARs
545 1.1.2.6 cliff */
546 1.1.2.6 cliff for (u_int i=0; i < RMIXL_SBC_DRAM_NBARS; i++) {
547 1.1.2.6 cliff r = RMIXL_IOREG_READ(RMIXL_SBC_DRAM_BAR(i));
548 1.1.2.6 cliff if ((r & RMIXL_DRAM_BAR_STATUS) == 0)
549 1.1.2.6 cliff continue; /* not enabled */
550 1.1.2.6 cliff base = (u_long)(DRAM_BAR_TO_BASE((uint64_t)r) / (1024 * 1024));
551 1.1.2.6 cliff size = (u_long)(DRAM_BAR_TO_SIZE((uint64_t)r) / (1024 * 1024));
552 1.1.2.6 cliff
553 1.1.2.6 cliff DPRINTF(("%s: %d: %d: 0x%08x -- 0x%010lx:%lu MB\n",
554 1.1.2.6 cliff __func__, __LINE__, i, r, base * (1024 * 1024), size));
555 1.1.2.6 cliff if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
556 1.1.2.6 cliff panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
557 1.1.2.6 cliff "failed", __func__, ext, base, size, EX_NOWAIT);
558 1.1.2.6 cliff }
559 1.1.2.6 cliff
560 1.1.2.6 cliff /*
561 1.1.2.6 cliff * grab regions per PCIe CFG, ECFG, IO, MEM BARs
562 1.1.2.6 cliff */
563 1.1.2.6 cliff r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_CFG_BAR);
564 1.1.2.6 cliff if ((r & RMIXL_PCIE_CFG_BAR_ENB) != 0) {
565 1.1.2.6 cliff base = (u_long)(RMIXL_PCIE_CFG_BAR_TO_BA((uint64_t)r)
566 1.1.2.6 cliff / (1024 * 1024));
567 1.1.2.6 cliff size = (u_long)RMIXL_PCIE_CFG_SIZE / (1024 * 1024);
568 1.1.2.6 cliff DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
569 1.1.2.6 cliff __LINE__, "CFG", r, base * 1024 * 1024, size));
570 1.1.2.6 cliff if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
571 1.1.2.6 cliff panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
572 1.1.2.6 cliff "failed", __func__, ext, base, size, EX_NOWAIT);
573 1.1.2.6 cliff }
574 1.1.2.6 cliff r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_ECFG_BAR);
575 1.1.2.6 cliff if ((r & RMIXL_PCIE_ECFG_BAR_ENB) != 0) {
576 1.1.2.6 cliff base = (u_long)(RMIXL_PCIE_ECFG_BAR_TO_BA((uint64_t)r)
577 1.1.2.6 cliff / (1024 * 1024));
578 1.1.2.6 cliff size = (u_long)RMIXL_PCIE_ECFG_SIZE / (1024 * 1024);
579 1.1.2.6 cliff DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
580 1.1.2.6 cliff __LINE__, "ECFG", r, base * 1024 * 1024, size));
581 1.1.2.6 cliff if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
582 1.1.2.6 cliff panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
583 1.1.2.6 cliff "failed", __func__, ext, base, size, EX_NOWAIT);
584 1.1.2.6 cliff }
585 1.1.2.6 cliff r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_MEM_BAR);
586 1.1.2.6 cliff if ((r & RMIXL_PCIE_MEM_BAR_ENB) != 0) {
587 1.1.2.6 cliff base = (u_long)(RMIXL_PCIE_MEM_BAR_TO_BA((uint64_t)r)
588 1.1.2.6 cliff / (1024 * 1024));
589 1.1.2.6 cliff size = (u_long)(RMIXL_PCIE_MEM_BAR_TO_SIZE((uint64_t)r)
590 1.1.2.6 cliff / (1024 * 1024));
591 1.1.2.6 cliff DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
592 1.1.2.6 cliff __LINE__, "MEM", r, base * 1024 * 1024, size));
593 1.1.2.6 cliff if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
594 1.1.2.6 cliff panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
595 1.1.2.6 cliff "failed", __func__, ext, base, size, EX_NOWAIT);
596 1.1.2.6 cliff }
597 1.1.2.6 cliff r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_IO_BAR);
598 1.1.2.6 cliff if ((r & RMIXL_PCIE_IO_BAR_ENB) != 0) {
599 1.1.2.6 cliff base = (u_long)(RMIXL_PCIE_IO_BAR_TO_BA((uint64_t)r)
600 1.1.2.6 cliff / (1024 * 1024));
601 1.1.2.6 cliff size = (u_long)(RMIXL_PCIE_IO_BAR_TO_SIZE((uint64_t)r)
602 1.1.2.6 cliff / (1024 * 1024));
603 1.1.2.6 cliff DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
604 1.1.2.6 cliff __LINE__, "IO", r, base * 1024 * 1024, size));
605 1.1.2.6 cliff if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
606 1.1.2.6 cliff panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
607 1.1.2.6 cliff "failed", __func__, ext, base, size, EX_NOWAIT);
608 1.1.2.6 cliff }
609 1.1.2.6 cliff
610 1.1.2.6 cliff /*
611 1.1.2.6 cliff * at this point all regions left in "physaddr" extent
612 1.1.2.6 cliff * are unused holes in the physical adress space
613 1.1.2.6 cliff * available for use as needed.
614 1.1.2.6 cliff */
615 1.1.2.6 cliff rmixl_configuration.rc_phys_ex = ext;
616 1.1.2.6 cliff #ifdef MACHDEP_DEBUG
617 1.1.2.6 cliff extent_print(ext);
618 1.1.2.6 cliff #endif
619 1.1.2.1 cliff }
620 1.1.2.1 cliff
621 1.1.2.16 cliff static uint64_t
622 1.1.2.7 cliff rmixlfw_init(int64_t infop)
623 1.1.2.1 cliff {
624 1.1.2.4 cliff struct rmixl_config *rcp = &rmixl_configuration;
625 1.1.2.1 cliff
626 1.1.2.14 cliff #ifdef MULTIPROCESSOR
627 1.1.2.14 cliff rmixl_get_wakeup_info(rcp);
628 1.1.2.14 cliff #endif
629 1.1.2.1 cliff
630 1.1.2.7 cliff infop |= MIPS_KSEG0_START;
631 1.1.2.17 cliff rcp->rc_psb_info = *(rmixlfw_info_t *)(intptr_t)infop;
632 1.1.2.1 cliff
633 1.1.2.18 cliff rcp->rc_psb_type = PSB_TYPE_UNKNOWN;
634 1.1.2.1 cliff for (int i=0; i < RMICLFW_PSB_VERSIONS_LEN; i++) {
635 1.1.2.18 cliff if (rmiclfw_psb_id[i].psb_version ==
636 1.1.2.18 cliff rcp->rc_psb_info.psb_version) {
637 1.1.2.18 cliff rcp->rc_psb_type = rmiclfw_psb_id[i].psb_type;
638 1.1.2.1 cliff goto found;
639 1.1.2.18 cliff }
640 1.1.2.1 cliff }
641 1.1.2.1 cliff
642 1.1.2.7 cliff rcp->rc_io_pbase = RMIXL_IO_DEV_PBASE;
643 1.1.2.4 cliff rmixl_putchar_init(rcp->rc_io_pbase);
644 1.1.2.4 cliff
645 1.1.2.6 cliff #ifdef DIAGNOSTIC
646 1.1.2.1 cliff rmixl_puts("\r\nWARNING: untested psb_version: ");
647 1.1.2.17 cliff rmixl_puthex64(rcp->rc_psb_info.psb_version);
648 1.1.2.1 cliff rmixl_puts("\r\n");
649 1.1.2.6 cliff #endif
650 1.1.2.9 cliff
651 1.1.2.13 cliff #ifdef MEMSIZE
652 1.1.2.9 cliff /* XXX trust and use MEMSIZE */
653 1.1.2.9 cliff mem_clusters[0].start = 0;
654 1.1.2.9 cliff mem_clusters[0].size = MEMSIZE;
655 1.1.2.9 cliff mem_cluster_cnt = 1;
656 1.1.2.7 cliff return MEMSIZE;
657 1.1.2.13 cliff #else
658 1.1.2.13 cliff rmixl_puts("\r\nERROR: configure MEMSIZE\r\n");
659 1.1.2.13 cliff cpu_reboot(RB_HALT, NULL);
660 1.1.2.13 cliff /* NOTREACHED */
661 1.1.2.13 cliff #endif
662 1.1.2.4 cliff
663 1.1.2.1 cliff found:
664 1.1.2.17 cliff rcp->rc_io_pbase = MIPS_KSEG1_TO_PHYS(rcp->rc_psb_info.io_base);
665 1.1.2.4 cliff rmixl_putchar_init(rcp->rc_io_pbase);
666 1.1.2.6 cliff #ifdef MACHDEP_DEBUG
667 1.1.2.4 cliff rmixl_puts("\r\ninfop: ");
668 1.1.2.7 cliff rmixl_puthex64((uint64_t)(intptr_t)infop);
669 1.1.2.6 cliff #endif
670 1.1.2.6 cliff #ifdef DIAGNOSTIC
671 1.1.2.18 cliff rmixl_puts("\r\nrecognized psb_version=");
672 1.1.2.17 cliff rmixl_puthex64(rcp->rc_psb_info.psb_version);
673 1.1.2.18 cliff rmixl_puts(", psb_type=");
674 1.1.2.18 cliff rmixl_puts(rmixlfw_psb_type_name(rcp->rc_psb_type));
675 1.1.2.4 cliff rmixl_puts("\r\n");
676 1.1.2.6 cliff #endif
677 1.1.2.1 cliff
678 1.1.2.4 cliff return mem_clusters_init(
679 1.1.2.17 cliff (rmixlfw_mmap_t *)(intptr_t)rcp->rc_psb_info.psb_physaddr_map,
680 1.1.2.17 cliff (rmixlfw_mmap_t *)(intptr_t)rcp->rc_psb_info.avail_mem_map);
681 1.1.2.4 cliff }
682 1.1.2.4 cliff
683 1.1.2.6 cliff void
684 1.1.2.6 cliff rmixlfw_mmap_print(rmixlfw_mmap_t *map)
685 1.1.2.6 cliff {
686 1.1.2.6 cliff #ifdef MACHDEP_DEBUG
687 1.1.2.6 cliff for (uint32_t i=0; i < map->nmmaps; i++) {
688 1.1.2.6 cliff rmixl_puthex32(i);
689 1.1.2.6 cliff rmixl_puts(", ");
690 1.1.2.6 cliff rmixl_puthex64(map->entry[i].start);
691 1.1.2.6 cliff rmixl_puts(", ");
692 1.1.2.6 cliff rmixl_puthex64(map->entry[i].size);
693 1.1.2.6 cliff rmixl_puts(", ");
694 1.1.2.6 cliff rmixl_puthex32(map->entry[i].type);
695 1.1.2.6 cliff rmixl_puts("\r\n");
696 1.1.2.6 cliff }
697 1.1.2.6 cliff #endif
698 1.1.2.6 cliff }
699 1.1.2.6 cliff
700 1.1.2.6 cliff /*
701 1.1.2.6 cliff * mem_clusters_init
702 1.1.2.6 cliff *
703 1.1.2.6 cliff * initialize mem_clusters[] table based on memory address mapping
704 1.1.2.6 cliff * provided by boot firmware.
705 1.1.2.6 cliff *
706 1.1.2.6 cliff * prefer avail_mem_map if we can, otherwise use psb_physaddr_map.
707 1.1.2.6 cliff * these will be limited by MEMSIZE if it is configured.
708 1.1.2.6 cliff * if neither are available, just use MEMSIZE.
709 1.1.2.6 cliff */
710 1.1.2.16 cliff static uint64_t
711 1.1.2.4 cliff mem_clusters_init(
712 1.1.2.4 cliff rmixlfw_mmap_t *psb_physaddr_map,
713 1.1.2.4 cliff rmixlfw_mmap_t *avail_mem_map)
714 1.1.2.4 cliff {
715 1.1.2.6 cliff rmixlfw_mmap_t *map = NULL;
716 1.1.2.6 cliff const char *mapname;
717 1.1.2.4 cliff uint64_t sz;
718 1.1.2.4 cliff uint64_t sum;
719 1.1.2.6 cliff u_int cnt;
720 1.1.2.4 cliff #ifdef MEMSIZE
721 1.1.2.16 cliff uint64_t memsize = MEMSIZE;
722 1.1.2.4 cliff #endif
723 1.1.2.4 cliff
724 1.1.2.6 cliff #ifdef MACHDEP_DEBUG
725 1.1.2.4 cliff rmixl_puts("psb_physaddr_map: ");
726 1.1.2.7 cliff rmixl_puthex64((uint64_t)(intptr_t)psb_physaddr_map);
727 1.1.2.4 cliff rmixl_puts("\r\n");
728 1.1.2.6 cliff #endif
729 1.1.2.6 cliff if (psb_physaddr_map != NULL) {
730 1.1.2.17 cliff map = psb_physaddr_map;
731 1.1.2.6 cliff mapname = "psb_physaddr_map";
732 1.1.2.6 cliff rmixlfw_mmap_print(map);
733 1.1.2.6 cliff }
734 1.1.2.6 cliff #ifdef DIAGNOSTIC
735 1.1.2.6 cliff else {
736 1.1.2.4 cliff rmixl_puts("WARNING: no psb_physaddr_map\r\n");
737 1.1.2.6 cliff }
738 1.1.2.6 cliff #endif
739 1.1.2.4 cliff
740 1.1.2.6 cliff #ifdef MACHDEP_DEBUG
741 1.1.2.4 cliff rmixl_puts("avail_mem_map: ");
742 1.1.2.7 cliff rmixl_puthex64((uint64_t)(intptr_t)avail_mem_map);
743 1.1.2.4 cliff rmixl_puts("\r\n");
744 1.1.2.6 cliff #endif
745 1.1.2.6 cliff if (avail_mem_map != NULL) {
746 1.1.2.17 cliff map = avail_mem_map;
747 1.1.2.6 cliff mapname = "avail_mem_map";
748 1.1.2.6 cliff rmixlfw_mmap_print(map);
749 1.1.2.6 cliff }
750 1.1.2.6 cliff #ifdef DIAGNOSTIC
751 1.1.2.6 cliff else {
752 1.1.2.6 cliff rmixl_puts("WARNING: no avail_mem_map\r\n");
753 1.1.2.6 cliff }
754 1.1.2.6 cliff #endif
755 1.1.2.6 cliff
756 1.1.2.6 cliff if (map == NULL) {
757 1.1.2.4 cliff #ifndef MEMSIZE
758 1.1.2.6 cliff rmixl_puts("panic: no firmware memory map, "
759 1.1.2.6 cliff "must configure MEMSIZE\r\n");
760 1.1.2.6 cliff for(;;); /* XXX */
761 1.1.2.4 cliff #else
762 1.1.2.6 cliff #ifdef DIAGNOSTIC
763 1.1.2.4 cliff rmixl_puts("WARNING: no avail_mem_map, "
764 1.1.2.4 cliff "using MEMSIZE\r\n");
765 1.1.2.6 cliff #endif
766 1.1.2.6 cliff
767 1.1.2.4 cliff mem_clusters[0].start = 0;
768 1.1.2.4 cliff mem_clusters[0].size = MEMSIZE;
769 1.1.2.4 cliff mem_cluster_cnt = 1;
770 1.1.2.4 cliff return MEMSIZE;
771 1.1.2.6 cliff #endif /* MEMSIZE */
772 1.1.2.4 cliff }
773 1.1.2.1 cliff
774 1.1.2.6 cliff #ifdef DIAGNOSTIC
775 1.1.2.6 cliff rmixl_puts("using ");
776 1.1.2.6 cliff rmixl_puts(mapname);
777 1.1.2.6 cliff rmixl_puts("\r\n");
778 1.1.2.6 cliff #endif
779 1.1.2.6 cliff #ifdef MACHDEP_DEBUG
780 1.1.2.6 cliff rmixl_puts("memory clusters:\r\n");
781 1.1.2.6 cliff #endif
782 1.1.2.1 cliff sum = 0;
783 1.1.2.6 cliff cnt = 0;
784 1.1.2.6 cliff for (uint32_t i=0; i < map->nmmaps; i++) {
785 1.1.2.6 cliff if (map->entry[i].type != RMIXLFW_MMAP_TYPE_RAM)
786 1.1.2.1 cliff continue;
787 1.1.2.6 cliff mem_clusters[cnt].start = map->entry[i].start;
788 1.1.2.6 cliff sz = map->entry[i].size;
789 1.1.2.1 cliff sum += sz;
790 1.1.2.6 cliff mem_clusters[cnt].size = sz;
791 1.1.2.6 cliff #ifdef MACHDEP_DEBUG
792 1.1.2.1 cliff rmixl_puthex32(i);
793 1.1.2.1 cliff rmixl_puts(": ");
794 1.1.2.6 cliff rmixl_puthex64(mem_clusters[cnt].start);
795 1.1.2.6 cliff rmixl_puts(", ");
796 1.1.2.1 cliff rmixl_puthex64(sz);
797 1.1.2.1 cliff rmixl_puts(": ");
798 1.1.2.1 cliff rmixl_puthex64(sum);
799 1.1.2.1 cliff rmixl_puts("\r\n");
800 1.1.2.1 cliff #endif
801 1.1.2.1 cliff #ifdef MEMSIZE
802 1.1.2.1 cliff /*
803 1.1.2.1 cliff * configurably limit memsize
804 1.1.2.1 cliff */
805 1.1.2.1 cliff if (sum == memsize)
806 1.1.2.1 cliff break;
807 1.1.2.1 cliff if (sum > memsize) {
808 1.1.2.13 cliff uint64_t tmp;
809 1.1.2.13 cliff
810 1.1.2.1 cliff tmp = sum - memsize;
811 1.1.2.1 cliff sz -= tmp;
812 1.1.2.1 cliff sum -= tmp;
813 1.1.2.6 cliff mem_clusters[cnt].size = sz;
814 1.1.2.13 cliff cnt++;
815 1.1.2.1 cliff break;
816 1.1.2.1 cliff }
817 1.1.2.1 cliff #endif
818 1.1.2.6 cliff cnt++;
819 1.1.2.1 cliff }
820 1.1.2.6 cliff mem_cluster_cnt = cnt;
821 1.1.2.1 cliff return sum;
822 1.1.2.1 cliff }
823 1.1.2.1 cliff
824 1.1.2.14 cliff #ifdef MULTIPROCESSOR
825 1.1.2.14 cliff /*
826 1.1.2.14 cliff * firmware passes wakeup info structure in CP0 OS Scratch reg #7
827 1.1.2.14 cliff * they do not explicitly give us the size of the wakeup area.
828 1.1.2.14 cliff * we "know" that firmware loader sets wip->gp thusly:
829 1.1.2.14 cliff * gp = stack_start[vcpu] = round_page(wakeup_end) + (vcpu * (PAGE_SIZE * 2))
830 1.1.2.14 cliff * so
831 1.1.2.14 cliff * round_page(wakeup_end) == gp - (vcpu * (PAGE_SIZE * 2))
832 1.1.2.14 cliff * Only the "master" cpu runs this function, so
833 1.1.2.14 cliff * vcpu = wip->master_cpu
834 1.1.2.14 cliff */
835 1.1.2.14 cliff void
836 1.1.2.14 cliff rmixl_get_wakeup_info(struct rmixl_config *rcp)
837 1.1.2.14 cliff {
838 1.1.2.14 cliff volatile rmixlfw_cpu_wakeup_info_t *wip;
839 1.1.2.14 cliff int32_t scratch_7;
840 1.1.2.14 cliff intptr_t end;
841 1.1.2.14 cliff
842 1.1.2.14 cliff __asm__ volatile(
843 1.1.2.14 cliff ".set push" "\n"
844 1.1.2.14 cliff ".set noreorder" "\n"
845 1.1.2.14 cliff ".set mips64" "\n"
846 1.1.2.14 cliff "dmfc0 %0, $22, 7" "\n"
847 1.1.2.14 cliff ".set pop" "\n"
848 1.1.2.14 cliff : "=r"(scratch_7));
849 1.1.2.14 cliff
850 1.1.2.14 cliff wip = (volatile rmixlfw_cpu_wakeup_info_t *)
851 1.1.2.14 cliff (intptr_t)scratch_7;
852 1.1.2.14 cliff end = wip->entry.gp - (wip->master_cpu & (PAGE_SIZE * 2));;
853 1.1.2.14 cliff
854 1.1.2.14 cliff if (wip->valid == 1) {
855 1.1.2.14 cliff rcp->rc_cpu_wakeup_end = (const void *)end;
856 1.1.2.14 cliff rcp->rc_cpu_wakeup_info = wip;
857 1.1.2.14 cliff }
858 1.1.2.14 cliff };
859 1.1.2.14 cliff
860 1.1.2.14 cliff #ifdef MACHDEP_DEBUG
861 1.1.2.14 cliff static void
862 1.1.2.14 cliff rmixl_wakeup_info_print(volatile rmixlfw_cpu_wakeup_info_t *wip)
863 1.1.2.14 cliff {
864 1.1.2.14 cliff int i;
865 1.1.2.14 cliff
866 1.1.2.16 cliff printf("%s: wip %p, size %lu\n", __func__, wip, sizeof(*wip));
867 1.1.2.14 cliff
868 1.1.2.14 cliff printf("cpu_status %#x\n", wip->cpu_status);
869 1.1.2.14 cliff printf("valid: %d\n", wip->valid);
870 1.1.2.14 cliff printf("entry: addr %#x, args %#x, sp %#"PRIx64", gp %#"PRIx64"\n",
871 1.1.2.14 cliff wip->entry.addr,
872 1.1.2.14 cliff wip->entry.args,
873 1.1.2.14 cliff wip->entry.sp,
874 1.1.2.14 cliff wip->entry.gp);
875 1.1.2.14 cliff printf("master_cpu %d\n", wip->master_cpu);
876 1.1.2.14 cliff printf("master_cpu_mask %#x\n", wip->master_cpu_mask);
877 1.1.2.14 cliff printf("buddy_cpu_mask %#x\n", wip->buddy_cpu_mask);
878 1.1.2.14 cliff printf("psb_os_cpu_map %#x\n", wip->psb_os_cpu_map);
879 1.1.2.14 cliff printf("argc %d\n", wip->argc);
880 1.1.2.14 cliff printf("argv:");
881 1.1.2.14 cliff for (i=0; i < wip->argc; i++)
882 1.1.2.14 cliff printf(" %#x", wip->argv[i]);
883 1.1.2.14 cliff printf("\n");
884 1.1.2.14 cliff printf("valid_tlb_entries %d\n", wip->valid_tlb_entries);
885 1.1.2.14 cliff printf("tlb_map:\n");
886 1.1.2.14 cliff for (i=0; i < wip->valid_tlb_entries; i++) {
887 1.1.2.14 cliff volatile const struct lib_cpu_tlb_mapping *m =
888 1.1.2.14 cliff &wip->tlb_map[i];
889 1.1.2.14 cliff printf(" %d", m->page_size);
890 1.1.2.14 cliff printf(", %d", m->asid);
891 1.1.2.14 cliff printf(", %d", m->coherency);
892 1.1.2.14 cliff printf(", %d", m->coherency);
893 1.1.2.14 cliff printf(", %d", m->attr);
894 1.1.2.14 cliff printf(", %#x", m->virt);
895 1.1.2.14 cliff printf(", %#"PRIx64"\n", m->phys);
896 1.1.2.14 cliff }
897 1.1.2.14 cliff printf("elf segs:\n");
898 1.1.2.14 cliff for (i=0; i < MAX_ELF_SEGMENTS; i++) {
899 1.1.2.14 cliff volatile const struct core_segment_info *e =
900 1.1.2.14 cliff &wip->seg_info[i];
901 1.1.2.14 cliff printf(" %#"PRIx64"", e->vaddr);
902 1.1.2.14 cliff printf(", %#"PRIx64"", e->memsz);
903 1.1.2.14 cliff printf(", %#x\n", e->flags);
904 1.1.2.14 cliff }
905 1.1.2.14 cliff printf("envc %d\n", wip->envc);
906 1.1.2.14 cliff for (i=0; i < wip->envc; i++)
907 1.1.2.14 cliff printf(" %#x \"%s\"", wip->envs[i],
908 1.1.2.14 cliff (char *)(intptr_t)(int32_t)(wip->envs[i]));
909 1.1.2.14 cliff printf("\n");
910 1.1.2.14 cliff printf("app_mode %d\n", wip->app_mode);
911 1.1.2.14 cliff printf("printk_lock %#x\n", wip->printk_lock);
912 1.1.2.14 cliff printf("kseg_master %d\n", wip->kseg_master);
913 1.1.2.14 cliff printf("kuseg_reentry_function %#x\n", wip->kuseg_reentry_function);
914 1.1.2.14 cliff printf("kuseg_reentry_args %#x\n", wip->kuseg_reentry_args);
915 1.1.2.14 cliff printf("app_shared_mem_addr %#"PRIx64"\n", wip->app_shared_mem_addr);
916 1.1.2.14 cliff printf("app_shared_mem_size %#"PRIx64"\n", wip->app_shared_mem_size);
917 1.1.2.14 cliff printf("app_shared_mem_orig %#"PRIx64"\n", wip->app_shared_mem_orig);
918 1.1.2.14 cliff printf("loader_lock %#x\n", wip->loader_lock);
919 1.1.2.14 cliff printf("global_wakeup_mask %#x\n", wip->global_wakeup_mask);
920 1.1.2.14 cliff printf("unused_0 %#x\n", wip->unused_0);
921 1.1.2.14 cliff }
922 1.1.2.14 cliff #endif /* MACHDEP_DEBUG */
923 1.1.2.14 cliff #endif /* MULTIPROCESSOR */
924 1.1.2.14 cliff
925 1.1.2.1 cliff void
926 1.1.2.1 cliff consinit(void)
927 1.1.2.1 cliff {
928 1.1.2.1 cliff
929 1.1.2.1 cliff /*
930 1.1.2.1 cliff * Everything related to console initialization is done
931 1.1.2.1 cliff * in mach_init().
932 1.1.2.1 cliff */
933 1.1.2.1 cliff }
934 1.1.2.1 cliff
935 1.1.2.1 cliff /*
936 1.1.2.1 cliff * Allocate memory for variable-sized tables,
937 1.1.2.1 cliff */
938 1.1.2.1 cliff void
939 1.1.2.1 cliff cpu_startup()
940 1.1.2.1 cliff {
941 1.1.2.1 cliff vaddr_t minaddr, maxaddr;
942 1.1.2.1 cliff char pbuf[9];
943 1.1.2.1 cliff
944 1.1.2.1 cliff /*
945 1.1.2.1 cliff * Good {morning,afternoon,evening,night}.
946 1.1.2.1 cliff */
947 1.1.2.1 cliff printf("%s%s", copyright, version);
948 1.1.2.13 cliff format_bytes(pbuf, sizeof(pbuf), ctob((uint64_t)physmem));
949 1.1.2.1 cliff printf("total memory = %s\n", pbuf);
950 1.1.2.1 cliff
951 1.1.2.1 cliff /*
952 1.1.2.1 cliff * Virtual memory is bootstrapped -- notify the bus spaces
953 1.1.2.1 cliff * that memory allocation is now safe.
954 1.1.2.1 cliff */
955 1.1.2.1 cliff rmixl_configuration.rc_mallocsafe = 1;
956 1.1.2.1 cliff
957 1.1.2.1 cliff minaddr = 0;
958 1.1.2.1 cliff /*
959 1.1.2.1 cliff * Allocate a submap for physio.
960 1.1.2.1 cliff */
961 1.1.2.1 cliff phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
962 1.1.2.1 cliff VM_PHYS_SIZE, 0, FALSE, NULL);
963 1.1.2.1 cliff
964 1.1.2.1 cliff /*
965 1.1.2.1 cliff * (No need to allocate an mbuf cluster submap. Mbuf clusters
966 1.1.2.6 cliff * are allocated via the pool allocator, and we use XKSEG to
967 1.1.2.1 cliff * map those pages.)
968 1.1.2.1 cliff */
969 1.1.2.1 cliff
970 1.1.2.1 cliff format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
971 1.1.2.1 cliff printf("avail memory = %s\n", pbuf);
972 1.1.2.1 cliff }
973 1.1.2.1 cliff
974 1.1.2.1 cliff int waittime = -1;
975 1.1.2.1 cliff
976 1.1.2.1 cliff void
977 1.1.2.1 cliff cpu_reboot(howto, bootstr)
978 1.1.2.1 cliff int howto;
979 1.1.2.1 cliff char *bootstr;
980 1.1.2.1 cliff {
981 1.1.2.1 cliff
982 1.1.2.1 cliff /* Take a snapshot before clobbering any registers. */
983 1.1.2.19 matt savectx(curlwp->l_addr);
984 1.1.2.1 cliff
985 1.1.2.1 cliff if (cold) {
986 1.1.2.1 cliff howto |= RB_HALT;
987 1.1.2.1 cliff goto haltsys;
988 1.1.2.1 cliff }
989 1.1.2.1 cliff
990 1.1.2.1 cliff /* If "always halt" was specified as a boot flag, obey. */
991 1.1.2.1 cliff if (boothowto & RB_HALT)
992 1.1.2.1 cliff howto |= RB_HALT;
993 1.1.2.1 cliff
994 1.1.2.1 cliff boothowto = howto;
995 1.1.2.1 cliff if ((howto & RB_NOSYNC) == 0 && (waittime < 0)) {
996 1.1.2.1 cliff waittime = 0;
997 1.1.2.1 cliff vfs_shutdown();
998 1.1.2.1 cliff
999 1.1.2.1 cliff /*
1000 1.1.2.1 cliff * If we've been adjusting the clock, the todr
1001 1.1.2.1 cliff * will be out of synch; adjust it now.
1002 1.1.2.1 cliff */
1003 1.1.2.1 cliff resettodr();
1004 1.1.2.1 cliff }
1005 1.1.2.1 cliff
1006 1.1.2.1 cliff splhigh();
1007 1.1.2.1 cliff
1008 1.1.2.1 cliff if (howto & RB_DUMP)
1009 1.1.2.1 cliff dumpsys();
1010 1.1.2.1 cliff
1011 1.1.2.1 cliff haltsys:
1012 1.1.2.1 cliff doshutdownhooks();
1013 1.1.2.1 cliff
1014 1.1.2.1 cliff if (howto & RB_HALT) {
1015 1.1.2.1 cliff printf("\n");
1016 1.1.2.1 cliff printf("The operating system has halted.\n");
1017 1.1.2.1 cliff printf("Please press any key to reboot.\n\n");
1018 1.1.2.1 cliff cnpollc(1); /* For proper keyboard command handling */
1019 1.1.2.1 cliff cngetc();
1020 1.1.2.1 cliff cnpollc(0);
1021 1.1.2.1 cliff }
1022 1.1.2.1 cliff
1023 1.1.2.1 cliff printf("rebooting...\n\n");
1024 1.1.2.1 cliff
1025 1.1.2.12 cliff rmixl_reset();
1026 1.1.2.1 cliff }
1027 1.1.2.1 cliff
1028 1.1.2.1 cliff /*
1029 1.1.2.1 cliff * goodbye world
1030 1.1.2.1 cliff */
1031 1.1.2.1 cliff void __attribute__((__noreturn__))
1032 1.1.2.12 cliff rmixl_reset(void)
1033 1.1.2.1 cliff {
1034 1.1.2.12 cliff uint32_t r;
1035 1.1.2.12 cliff
1036 1.1.2.12 cliff r = RMIXL_IOREG_READ(RMIXL_IO_DEV_GPIO + RMIXL_GPIO_RESET);
1037 1.1.2.12 cliff r |= RMIXL_GPIO_RESET_RESET;
1038 1.1.2.12 cliff RMIXL_IOREG_WRITE(RMIXL_IO_DEV_GPIO + RMIXL_GPIO_RESET, r);
1039 1.1.2.12 cliff
1040 1.1.2.12 cliff printf("soft reset failed, spinning...\n");
1041 1.1.2.1 cliff for (;;);
1042 1.1.2.1 cliff }
1043