machdep.c revision 1.3 1 1.3 rmind /* $NetBSD: machdep.c,v 1.3 2009/12/20 04:11:37 rmind Exp $ */
2 1.2 matt
3 1.2 matt /*
4 1.2 matt * Copyright 2001, 2002 Wasabi Systems, Inc.
5 1.2 matt * All rights reserved.
6 1.2 matt *
7 1.2 matt * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc.
8 1.2 matt *
9 1.2 matt * Redistribution and use in source and binary forms, with or without
10 1.2 matt * modification, are permitted provided that the following conditions
11 1.2 matt * are met:
12 1.2 matt * 1. Redistributions of source code must retain the above copyright
13 1.2 matt * notice, this list of conditions and the following disclaimer.
14 1.2 matt * 2. Redistributions in binary form must reproduce the above copyright
15 1.2 matt * notice, this list of conditions and the following disclaimer in the
16 1.2 matt * documentation and/or other materials provided with the distribution.
17 1.2 matt * 3. All advertising materials mentioning features or use of this software
18 1.2 matt * must display the following acknowledgement:
19 1.2 matt * This product includes software developed for the NetBSD Project by
20 1.2 matt * Wasabi Systems, Inc.
21 1.2 matt * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.2 matt * or promote products derived from this software without specific prior
23 1.2 matt * written permission.
24 1.2 matt *
25 1.2 matt * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.2 matt * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.2 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.2 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.2 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.2 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.2 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.2 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.2 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.2 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.2 matt * POSSIBILITY OF SUCH DAMAGE.
36 1.2 matt */
37 1.2 matt
38 1.2 matt /*
39 1.2 matt * Copyright (c) 1992, 1993
40 1.2 matt * The Regents of the University of California. All rights reserved.
41 1.2 matt *
42 1.2 matt * This code is derived from software contributed to Berkeley by
43 1.2 matt * the Systems Programming Group of the University of Utah Computer
44 1.2 matt * Science Department, The Mach Operating System project at
45 1.2 matt * Carnegie-Mellon University and Ralph Campbell.
46 1.2 matt *
47 1.2 matt * Redistribution and use in source and binary forms, with or without
48 1.2 matt * modification, are permitted provided that the following conditions
49 1.2 matt * are met:
50 1.2 matt * 1. Redistributions of source code must retain the above copyright
51 1.2 matt * notice, this list of conditions and the following disclaimer.
52 1.2 matt * 2. Redistributions in binary form must reproduce the above copyright
53 1.2 matt * notice, this list of conditions and the following disclaimer in the
54 1.2 matt * documentation and/or other materials provided with the distribution.
55 1.2 matt * 3. Neither the name of the University nor the names of its contributors
56 1.2 matt * may be used to endorse or promote products derived from this software
57 1.2 matt * without specific prior written permission.
58 1.2 matt *
59 1.2 matt * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
60 1.2 matt * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
61 1.2 matt * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
62 1.2 matt * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
63 1.2 matt * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
64 1.2 matt * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
65 1.2 matt * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 1.2 matt * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 1.2 matt * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 1.2 matt * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 1.2 matt * SUCH DAMAGE.
70 1.2 matt *
71 1.2 matt * @(#)machdep.c 8.3 (Berkeley) 1/12/94
72 1.2 matt * from: Utah Hdr: machdep.c 1.63 91/04/24
73 1.2 matt */
74 1.2 matt /*
75 1.2 matt * Copyright (c) 1988 University of Utah.
76 1.2 matt *
77 1.2 matt * This code is derived from software contributed to Berkeley by
78 1.2 matt * the Systems Programming Group of the University of Utah Computer
79 1.2 matt * Science Department, The Mach Operating System project at
80 1.2 matt * Carnegie-Mellon University and Ralph Campbell.
81 1.2 matt *
82 1.2 matt * Redistribution and use in source and binary forms, with or without
83 1.2 matt * modification, are permitted provided that the following conditions
84 1.2 matt * are met:
85 1.2 matt * 1. Redistributions of source code must retain the above copyright
86 1.2 matt * notice, this list of conditions and the following disclaimer.
87 1.2 matt * 2. Redistributions in binary form must reproduce the above copyright
88 1.2 matt * notice, this list of conditions and the following disclaimer in the
89 1.2 matt * documentation and/or other materials provided with the distribution.
90 1.2 matt * 3. All advertising materials mentioning features or use of this software
91 1.2 matt * must display the following acknowledgement:
92 1.2 matt * This product includes software developed by the University of
93 1.2 matt * California, Berkeley and its contributors.
94 1.2 matt * 4. Neither the name of the University nor the names of its contributors
95 1.2 matt * may be used to endorse or promote products derived from this software
96 1.2 matt * without specific prior written permission.
97 1.2 matt *
98 1.2 matt * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
99 1.2 matt * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
100 1.2 matt * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
101 1.2 matt * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
102 1.2 matt * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
103 1.2 matt * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
104 1.2 matt * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
105 1.2 matt * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
106 1.2 matt * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
107 1.2 matt * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
108 1.2 matt * SUCH DAMAGE.
109 1.2 matt *
110 1.2 matt * @(#)machdep.c 8.3 (Berkeley) 1/12/94
111 1.2 matt * from: Utah Hdr: machdep.c 1.63 91/04/24
112 1.2 matt */
113 1.2 matt
114 1.2 matt #include <sys/cdefs.h>
115 1.3 rmind __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.3 2009/12/20 04:11:37 rmind Exp $");
116 1.2 matt
117 1.2 matt #include "opt_ddb.h"
118 1.2 matt #include "opt_com.h"
119 1.2 matt #include "opt_execfmt.h"
120 1.2 matt #include "opt_memsize.h"
121 1.2 matt
122 1.2 matt #include <sys/param.h>
123 1.2 matt #include <sys/systm.h>
124 1.2 matt #include <sys/kernel.h>
125 1.2 matt #include <sys/buf.h>
126 1.2 matt #include <sys/reboot.h>
127 1.2 matt #include <sys/mount.h>
128 1.2 matt #include <sys/kcore.h>
129 1.2 matt #include <sys/boot_flag.h>
130 1.2 matt #include <sys/termios.h>
131 1.2 matt #include <sys/ksyms.h>
132 1.2 matt #include <sys/bus.h>
133 1.2 matt #include <sys/device.h>
134 1.2 matt #include <sys/extent.h>
135 1.2 matt #include <sys/malloc.h>
136 1.2 matt
137 1.2 matt #include <uvm/uvm_extern.h>
138 1.2 matt
139 1.2 matt #include <dev/cons.h>
140 1.2 matt
141 1.2 matt #include "ksyms.h"
142 1.2 matt
143 1.2 matt #if NKSYMS || defined(DDB) || defined(LKM)
144 1.2 matt #include <machine/db_machdep.h>
145 1.2 matt #include <ddb/db_extern.h>
146 1.2 matt #endif
147 1.2 matt
148 1.2 matt #include <machine/cpu.h>
149 1.2 matt #include <machine/psl.h>
150 1.2 matt
151 1.2 matt #include "com.h"
152 1.2 matt #if NCOM == 0
153 1.2 matt #error no serial console
154 1.2 matt #endif
155 1.2 matt
156 1.2 matt #include <dev/ic/comreg.h>
157 1.2 matt #include <dev/ic/comvar.h>
158 1.2 matt
159 1.2 matt #include <mips/rmi/rmixl_comvar.h>
160 1.2 matt #include <mips/rmi/rmixlvar.h>
161 1.2 matt #include <mips/rmi/rmixl_firmware.h>
162 1.2 matt #include <mips/rmi/rmixlreg.h>
163 1.2 matt
164 1.2 matt #define MACHDEP_DEBUG 1
165 1.2 matt #ifdef MACHDEP_DEBUG
166 1.2 matt int machdep_debug=MACHDEP_DEBUG;
167 1.2 matt # define DPRINTF(x) do { if (machdep_debug) printf x ; } while(0)
168 1.2 matt #else
169 1.2 matt # define DPRINTF(x)
170 1.2 matt #endif
171 1.2 matt
172 1.2 matt #ifndef CONSFREQ
173 1.2 matt # define CONSFREQ -1 /* inherit from firmware */
174 1.2 matt #endif
175 1.2 matt #ifndef CONSPEED
176 1.2 matt # define CONSPEED 38400
177 1.2 matt #endif
178 1.2 matt #ifndef CONMODE
179 1.2 matt # define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)
180 1.2 matt #endif
181 1.2 matt #ifndef CONSADDR
182 1.2 matt # define CONSADDR RMIXL_IO_DEV_UART_1
183 1.2 matt #endif
184 1.2 matt
185 1.2 matt int comcnfreq = CONSFREQ;
186 1.2 matt int comcnspeed = CONSPEED;
187 1.2 matt tcflag_t comcnmode = CONMODE;
188 1.2 matt bus_addr_t comcnaddr = (bus_addr_t)CONSADDR;
189 1.2 matt
190 1.2 matt struct rmixl_config rmixl_configuration;
191 1.2 matt
192 1.2 matt
193 1.2 matt /*
194 1.2 matt * array of tested firmware versions
195 1.2 matt * if you find new ones and they work
196 1.2 matt * please add them
197 1.2 matt */
198 1.2 matt static uint64_t rmiclfw_psb_versions[] = {
199 1.2 matt 0x4958d4fb00000056ULL,
200 1.2 matt 0x49a5a8fa00000056ULL,
201 1.2 matt 0x4aacdb6a00000056ULL,
202 1.2 matt };
203 1.2 matt #define RMICLFW_PSB_VERSIONS_LEN \
204 1.2 matt (sizeof(rmiclfw_psb_versions)/sizeof(rmiclfw_psb_versions[0]))
205 1.2 matt
206 1.2 matt /*
207 1.2 matt * kernel copies of firmware info
208 1.2 matt */
209 1.2 matt static rmixlfw_info_t rmixlfw_info;
210 1.2 matt static rmixlfw_mmap_t rmixlfw_phys_mmap;
211 1.2 matt static rmixlfw_mmap_t rmixlfw_avail_mmap;
212 1.2 matt #define RMIXLFW_INFOP_LEGAL 0x8c000000
213 1.2 matt
214 1.2 matt
215 1.2 matt /*
216 1.2 matt * storage for fixed extent used to allocate physical address regions
217 1.2 matt * because extent(9) start and end values are u_long, they are only
218 1.2 matt * 32 bits on a 32 bit kernel, which is insuffucuent since XLS physical
219 1.2 matt * address is 40 bits wide. So the "physaddr" map stores regions
220 1.2 matt * in units of megabytes.
221 1.2 matt */
222 1.2 matt static u_long rmixl_physaddr_storage[
223 1.2 matt EXTENT_FIXED_STORAGE_SIZE(32)/sizeof(u_long)
224 1.2 matt ];
225 1.2 matt
226 1.2 matt /* For sysctl_hw. */
227 1.2 matt extern char cpu_model[];
228 1.2 matt
229 1.2 matt /* Our exported CPU info; we can have only one. */
230 1.2 matt struct cpu_info cpu_info_store;
231 1.2 matt
232 1.2 matt /* Maps for VM objects. */
233 1.2 matt struct vm_map *mb_map = NULL;
234 1.2 matt struct vm_map *phys_map = NULL;
235 1.2 matt
236 1.2 matt int physmem; /* Total physical memory */
237 1.2 matt
238 1.2 matt int netboot; /* Are we netbooting? */
239 1.2 matt
240 1.2 matt
241 1.2 matt phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
242 1.2 matt u_int mem_cluster_cnt;
243 1.2 matt
244 1.2 matt
245 1.2 matt void configure(void);
246 1.2 matt void mach_init(int, int32_t *, void *, int64_t);
247 1.2 matt static u_long rmixlfw_init(int64_t);
248 1.2 matt static u_long mem_clusters_init(rmixlfw_mmap_t *, rmixlfw_mmap_t *);
249 1.2 matt static void __attribute__((__noreturn__)) rmixl_exit(int);
250 1.2 matt static void rmixl_physaddr_init(void);
251 1.2 matt static u_int ram_seg_resv(phys_ram_seg_t *, u_int, u_quad_t, u_quad_t);
252 1.2 matt void rmixlfw_mmap_print(rmixlfw_mmap_t *);
253 1.2 matt
254 1.2 matt
255 1.2 matt /*
256 1.2 matt * safepri is a safe priority for sleep to set for a spin-wait during
257 1.2 matt * autoconfiguration or after a panic. Used as an argument to splx().
258 1.2 matt */
259 1.2 matt int safepri = MIPS1_PSL_LOWIPL;
260 1.2 matt
261 1.2 matt extern struct user *proc0paddr;
262 1.2 matt
263 1.2 matt /*
264 1.2 matt * Do all the stuff that locore normally does before calling main().
265 1.2 matt */
266 1.2 matt void
267 1.2 matt mach_init(int argc, int32_t *argv, void *envp, int64_t infop)
268 1.2 matt {
269 1.2 matt struct rmixl_config *rcp = &rmixl_configuration;
270 1.3 rmind void *kernend;
271 1.2 matt u_long memsize;
272 1.2 matt u_int vm_cluster_cnt;
273 1.2 matt uint32_t r;
274 1.2 matt phys_ram_seg_t vm_clusters[VM_PHYSSEG_MAX];
275 1.2 matt extern char edata[], end[];
276 1.2 matt
277 1.2 matt rmixl_mtcr(0, 1); /* disable all threads except #0 */
278 1.2 matt
279 1.2 matt r = rmixl_mfcr(0x300);
280 1.2 matt r &= ~__BIT(14); /* disabled Unaligned Access */
281 1.2 matt rmixl_mtcr(0x300, r);
282 1.2 matt
283 1.2 matt rmixl_mtcr(0x400, 0); /* enable MMU clock gating */
284 1.2 matt /* set single MMU Thread Mode */
285 1.2 matt /* TLB is partitioned (1 partition) */
286 1.2 matt
287 1.2 matt /*
288 1.2 matt * Clear the BSS segment.
289 1.2 matt */
290 1.2 matt kernend = (void *)mips_round_page(end);
291 1.2 matt memset(edata, 0, (char *)kernend - edata);
292 1.2 matt
293 1.2 matt /*
294 1.2 matt * Set up the exception vectors and CPU-specific function
295 1.2 matt * vectors early on. We need the wbflush() vector set up
296 1.2 matt * before comcnattach() is called (or at least before the
297 1.2 matt * first printf() after that is called).
298 1.2 matt * Also clears the I+D caches.
299 1.2 matt */
300 1.2 matt mips_vector_init();
301 1.2 matt
302 1.2 matt memsize = rmixlfw_init(infop);
303 1.2 matt
304 1.2 matt /* set the VM page size */
305 1.2 matt uvm_setpagesize();
306 1.2 matt
307 1.2 matt physmem = btoc(memsize);
308 1.2 matt
309 1.2 matt rmixl_obio_bus_mem_init(&rcp->rc_obio_memt, rcp); /* need for console */
310 1.2 matt
311 1.2 matt #if NCOM > 0
312 1.2 matt rmixl_com_cnattach(comcnaddr, comcnspeed, comcnfreq,
313 1.2 matt COM_TYPE_NORMAL, comcnmode);
314 1.2 matt #endif
315 1.2 matt
316 1.2 matt printf("\nNetBSD/rmixl\n");
317 1.2 matt printf("memsize = %#lx\n", memsize);
318 1.2 matt
319 1.2 matt rmixl_physaddr_init();
320 1.2 matt
321 1.2 matt /*
322 1.2 matt * Obtain the cpu frequency
323 1.2 matt * Compute the number of ticks for hz.
324 1.2 matt * Compute the delay divisor.
325 1.2 matt * Double the Hz if this CPU runs at twice the
326 1.2 matt * external/cp0-count frequency
327 1.2 matt */
328 1.2 matt curcpu()->ci_cpu_freq = rmixlfw_info.cpu_frequency;
329 1.2 matt curcpu()->ci_cycles_per_hz = (curcpu()->ci_cpu_freq + hz / 2) / hz;
330 1.2 matt curcpu()->ci_divisor_delay =
331 1.2 matt ((curcpu()->ci_cpu_freq + 500000) / 1000000);
332 1.2 matt if (mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
333 1.2 matt curcpu()->ci_cpu_freq *= 2;
334 1.2 matt
335 1.2 matt /*
336 1.2 matt * Look at arguments passed to us and compute boothowto.
337 1.2 matt * - rmixl firmware gives us a 32 bit argv[i], so adapt
338 1.2 matt * by forcing sign extension in cast to (char *)
339 1.2 matt */
340 1.2 matt boothowto = RB_AUTOBOOT;
341 1.2 matt for (int i = 1; i < argc; i++) {
342 1.2 matt for (char *cp = (char *)(intptr_t)argv[i]; *cp; cp++) {
343 1.2 matt int howto;
344 1.2 matt /* Ignore superfluous '-', if there is one */
345 1.2 matt if (*cp == '-')
346 1.2 matt continue;
347 1.2 matt
348 1.2 matt howto = 0;
349 1.2 matt BOOT_FLAG(*cp, howto);
350 1.2 matt if (howto != 0)
351 1.2 matt boothowto |= howto;
352 1.2 matt #ifdef DIAGNOSTIC
353 1.2 matt else
354 1.2 matt printf("bootflag '%c' not recognised\n", *cp);
355 1.2 matt #endif
356 1.2 matt }
357 1.2 matt }
358 1.2 matt #ifdef DIAGNOSTIC
359 1.2 matt printf("boothowto %#x\n", boothowto);
360 1.2 matt #endif
361 1.2 matt
362 1.2 matt /*
363 1.2 matt * Reserve pages from the VM system.
364 1.2 matt * to maintain mem_clusters[] as a map of raw ram,
365 1.2 matt * copy into temporary table vm_clusters[]
366 1.2 matt * work on that and use it to feed vm_physload()
367 1.2 matt */
368 1.2 matt KASSERT(sizeof(mem_clusters) == sizeof(vm_clusters));
369 1.2 matt memcpy(&vm_clusters, &mem_clusters, sizeof(vm_clusters));
370 1.2 matt vm_cluster_cnt = mem_cluster_cnt;
371 1.2 matt
372 1.2 matt /* reserve 0..start..kernend pages */
373 1.2 matt vm_cluster_cnt = ram_seg_resv(vm_clusters, vm_cluster_cnt,
374 1.2 matt 0, round_page(MIPS_KSEG0_TO_PHYS(kernend)));
375 1.2 matt
376 1.2 matt /* reserve reset exception vector page */
377 1.2 matt /* should never be in our clusters anyway... */
378 1.2 matt vm_cluster_cnt = ram_seg_resv(vm_clusters, vm_cluster_cnt,
379 1.2 matt MIPS_RESET_EXC_VEC, MIPS_RESET_EXC_VEC+NBPG);
380 1.2 matt
381 1.2 matt /*
382 1.2 matt * Load vm_clusters[] into the VM system.
383 1.2 matt */
384 1.2 matt for (u_int i=0; i < vm_cluster_cnt; i++) {
385 1.2 matt u_quad_t first, last;
386 1.2 matt
387 1.2 matt first = trunc_page(vm_clusters[i].start);
388 1.2 matt last = round_page(vm_clusters[i].start + vm_clusters[i].size);
389 1.2 matt DPRINTF(("%s: %d: %#"PRIx64", %#"PRIx64"\n",
390 1.2 matt __func__, i, first, last));
391 1.2 matt
392 1.2 matt uvm_page_physload(atop(first), atop(last), atop(first),
393 1.2 matt atop(last), VM_FREELIST_DEFAULT);
394 1.2 matt }
395 1.2 matt
396 1.2 matt /*
397 1.2 matt * Initialize error message buffer (at end of core).
398 1.2 matt */
399 1.2 matt mips_init_msgbuf();
400 1.2 matt
401 1.2 matt pmap_bootstrap();
402 1.2 matt
403 1.2 matt /*
404 1.3 rmind * Allocate uarea page for lwp0 and set it.
405 1.2 matt */
406 1.3 rmind mips_init_lwp0_uarea();
407 1.2 matt
408 1.2 matt #if defined(DDB)
409 1.2 matt if (boothowto & RB_KDB)
410 1.2 matt Debugger();
411 1.2 matt #endif
412 1.2 matt }
413 1.2 matt
414 1.2 matt /*
415 1.2 matt * ram_seg_resv - cut reserved regions out of segs, fragmenting as needed
416 1.2 matt *
417 1.2 matt * we simply build a new table of segs, then copy it back over the given one
418 1.2 matt * this is inefficient but simple and called only a few times
419 1.2 matt *
420 1.2 matt * note: 'last' here means 1st addr past the end of the segment (start+size)
421 1.2 matt */
422 1.2 matt static u_int
423 1.2 matt ram_seg_resv(phys_ram_seg_t *segs, u_int nsegs,
424 1.2 matt u_quad_t resv_first, u_quad_t resv_last)
425 1.2 matt {
426 1.2 matt u_quad_t first, last;
427 1.2 matt int new_nsegs=0;
428 1.2 matt int resv_flag;
429 1.2 matt phys_ram_seg_t new_segs[VM_PHYSSEG_MAX];
430 1.2 matt
431 1.2 matt for (u_int i=0; i < nsegs; i++) {
432 1.2 matt resv_flag = 0;
433 1.2 matt first = trunc_page(segs[i].start);
434 1.2 matt last = round_page(segs[i].start + segs[i].size);
435 1.2 matt
436 1.2 matt KASSERT(new_nsegs < VM_PHYSSEG_MAX);
437 1.2 matt if ((resv_first <= first) && (resv_last >= last)) {
438 1.2 matt /* whole segment is resverved */
439 1.2 matt continue;
440 1.2 matt }
441 1.2 matt if ((resv_first > first) && (resv_first < last)) {
442 1.2 matt u_quad_t new_last;
443 1.2 matt
444 1.2 matt /*
445 1.2 matt * reserved start in segment
446 1.2 matt * salvage the leading fragment
447 1.2 matt */
448 1.2 matt resv_flag = 1;
449 1.2 matt new_last = last - (last - resv_first);
450 1.2 matt KASSERT (new_last > first);
451 1.2 matt new_segs[new_nsegs].start = first;
452 1.2 matt new_segs[new_nsegs].size = new_last - first;
453 1.2 matt new_nsegs++;
454 1.2 matt }
455 1.2 matt if ((resv_last > first) && (resv_last < last)) {
456 1.2 matt u_quad_t new_first;
457 1.2 matt
458 1.2 matt /*
459 1.2 matt * reserved end in segment
460 1.2 matt * salvage the trailing fragment
461 1.2 matt */
462 1.2 matt resv_flag = 1;
463 1.2 matt new_first = first + (resv_last - first);
464 1.2 matt KASSERT (last > (new_first + NBPG));
465 1.2 matt new_segs[new_nsegs].start = new_first;
466 1.2 matt new_segs[new_nsegs].size = last - new_first;
467 1.2 matt new_nsegs++;
468 1.2 matt }
469 1.2 matt if (resv_flag == 0) {
470 1.2 matt /*
471 1.2 matt * nothing reserved here, take it all
472 1.2 matt */
473 1.2 matt new_segs[new_nsegs].start = first;
474 1.2 matt new_segs[new_nsegs].size = last - first;
475 1.2 matt new_nsegs++;
476 1.2 matt }
477 1.2 matt
478 1.2 matt }
479 1.2 matt
480 1.2 matt memcpy(segs, new_segs, sizeof(new_segs));
481 1.2 matt
482 1.2 matt return new_nsegs;
483 1.2 matt }
484 1.2 matt
485 1.2 matt /*
486 1.2 matt * create an extent for physical address space
487 1.2 matt * these are in units of MB for sake of compression (for sake of 32 bit kernels)
488 1.2 matt * allocate the regions where we have known functions (DRAM, IO, etc)
489 1.2 matt * what remains can be allocated as needed for other stuff
490 1.2 matt * e.g. to configure BARs that are not already initialized and enabled.
491 1.2 matt */
492 1.2 matt static void
493 1.2 matt rmixl_physaddr_init(void)
494 1.2 matt {
495 1.2 matt struct extent *ext;
496 1.2 matt unsigned long start = 0UL;
497 1.2 matt unsigned long end = (__BIT(40) / (1024 * 1024)) -1;
498 1.2 matt u_long base;
499 1.2 matt u_long size;
500 1.2 matt uint32_t r;
501 1.2 matt
502 1.2 matt ext = extent_create("physaddr", start, end, M_DEVBUF,
503 1.2 matt (void *)rmixl_physaddr_storage, sizeof(rmixl_physaddr_storage),
504 1.2 matt EX_NOWAIT | EX_NOCOALESCE);
505 1.2 matt
506 1.2 matt if (ext == NULL)
507 1.2 matt panic("%s: extent_create failed", __func__);
508 1.2 matt
509 1.2 matt /*
510 1.2 matt * grab regions per DRAM BARs
511 1.2 matt */
512 1.2 matt for (u_int i=0; i < RMIXL_SBC_DRAM_NBARS; i++) {
513 1.2 matt r = RMIXL_IOREG_READ(RMIXL_SBC_DRAM_BAR(i));
514 1.2 matt if ((r & RMIXL_DRAM_BAR_STATUS) == 0)
515 1.2 matt continue; /* not enabled */
516 1.2 matt base = (u_long)(DRAM_BAR_TO_BASE((uint64_t)r) / (1024 * 1024));
517 1.2 matt size = (u_long)(DRAM_BAR_TO_SIZE((uint64_t)r) / (1024 * 1024));
518 1.2 matt
519 1.2 matt DPRINTF(("%s: %d: %d: 0x%08x -- 0x%010lx:%lu MB\n",
520 1.2 matt __func__, __LINE__, i, r, base * (1024 * 1024), size));
521 1.2 matt if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
522 1.2 matt panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
523 1.2 matt "failed", __func__, ext, base, size, EX_NOWAIT);
524 1.2 matt }
525 1.2 matt
526 1.2 matt /*
527 1.2 matt * grab regions per PCIe CFG, ECFG, IO, MEM BARs
528 1.2 matt */
529 1.2 matt r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_CFG_BAR);
530 1.2 matt if ((r & RMIXL_PCIE_CFG_BAR_ENB) != 0) {
531 1.2 matt base = (u_long)(RMIXL_PCIE_CFG_BAR_TO_BA((uint64_t)r)
532 1.2 matt / (1024 * 1024));
533 1.2 matt size = (u_long)RMIXL_PCIE_CFG_SIZE / (1024 * 1024);
534 1.2 matt DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
535 1.2 matt __LINE__, "CFG", r, base * 1024 * 1024, size));
536 1.2 matt if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
537 1.2 matt panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
538 1.2 matt "failed", __func__, ext, base, size, EX_NOWAIT);
539 1.2 matt }
540 1.2 matt r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_ECFG_BAR);
541 1.2 matt if ((r & RMIXL_PCIE_ECFG_BAR_ENB) != 0) {
542 1.2 matt base = (u_long)(RMIXL_PCIE_ECFG_BAR_TO_BA((uint64_t)r)
543 1.2 matt / (1024 * 1024));
544 1.2 matt size = (u_long)RMIXL_PCIE_ECFG_SIZE / (1024 * 1024);
545 1.2 matt DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
546 1.2 matt __LINE__, "ECFG", r, base * 1024 * 1024, size));
547 1.2 matt if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
548 1.2 matt panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
549 1.2 matt "failed", __func__, ext, base, size, EX_NOWAIT);
550 1.2 matt }
551 1.2 matt r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_MEM_BAR);
552 1.2 matt if ((r & RMIXL_PCIE_MEM_BAR_ENB) != 0) {
553 1.2 matt base = (u_long)(RMIXL_PCIE_MEM_BAR_TO_BA((uint64_t)r)
554 1.2 matt / (1024 * 1024));
555 1.2 matt size = (u_long)(RMIXL_PCIE_MEM_BAR_TO_SIZE((uint64_t)r)
556 1.2 matt / (1024 * 1024));
557 1.2 matt DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
558 1.2 matt __LINE__, "MEM", r, base * 1024 * 1024, size));
559 1.2 matt if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
560 1.2 matt panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
561 1.2 matt "failed", __func__, ext, base, size, EX_NOWAIT);
562 1.2 matt }
563 1.2 matt r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_IO_BAR);
564 1.2 matt if ((r & RMIXL_PCIE_IO_BAR_ENB) != 0) {
565 1.2 matt base = (u_long)(RMIXL_PCIE_IO_BAR_TO_BA((uint64_t)r)
566 1.2 matt / (1024 * 1024));
567 1.2 matt size = (u_long)(RMIXL_PCIE_IO_BAR_TO_SIZE((uint64_t)r)
568 1.2 matt / (1024 * 1024));
569 1.2 matt DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
570 1.2 matt __LINE__, "IO", r, base * 1024 * 1024, size));
571 1.2 matt if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
572 1.2 matt panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
573 1.2 matt "failed", __func__, ext, base, size, EX_NOWAIT);
574 1.2 matt }
575 1.2 matt
576 1.2 matt /*
577 1.2 matt * at this point all regions left in "physaddr" extent
578 1.2 matt * are unused holes in the physical adress space
579 1.2 matt * available for use as needed.
580 1.2 matt */
581 1.2 matt rmixl_configuration.rc_phys_ex = ext;
582 1.2 matt #ifdef MACHDEP_DEBUG
583 1.2 matt extent_print(ext);
584 1.2 matt #endif
585 1.2 matt }
586 1.2 matt
587 1.2 matt static u_long
588 1.2 matt rmixlfw_init(int64_t infop)
589 1.2 matt {
590 1.2 matt struct rmixl_config *rcp = &rmixl_configuration;
591 1.2 matt
592 1.2 matt strcpy(cpu_model, "RMI XLS616ATX VIIA"); /* XXX */
593 1.2 matt
594 1.2 matt infop |= MIPS_KSEG0_START;
595 1.2 matt rmixlfw_info = *(rmixlfw_info_t *)(intptr_t)infop;
596 1.2 matt
597 1.2 matt for (int i=0; i < RMICLFW_PSB_VERSIONS_LEN; i++) {
598 1.2 matt if (rmiclfw_psb_versions[i] == rmixlfw_info.psb_version)
599 1.2 matt goto found;
600 1.2 matt }
601 1.2 matt
602 1.2 matt rcp->rc_io_pbase = RMIXL_IO_DEV_PBASE;
603 1.2 matt rmixl_putchar_init(rcp->rc_io_pbase);
604 1.2 matt
605 1.2 matt #ifdef DIAGNOSTIC
606 1.2 matt rmixl_puts("\r\nWARNING: untested psb_version: ");
607 1.2 matt rmixl_puthex64(rmixlfw_info.psb_version);
608 1.2 matt rmixl_puts("\r\n");
609 1.2 matt #endif
610 1.2 matt
611 1.2 matt /* XXX trust and use MEMSIZE */
612 1.2 matt mem_clusters[0].start = 0;
613 1.2 matt mem_clusters[0].size = MEMSIZE;
614 1.2 matt mem_cluster_cnt = 1;
615 1.2 matt return MEMSIZE;
616 1.2 matt
617 1.2 matt found:
618 1.2 matt rcp->rc_io_pbase = MIPS_KSEG1_TO_PHYS(rmixlfw_info.io_base);
619 1.2 matt rmixl_putchar_init(rcp->rc_io_pbase);
620 1.2 matt #ifdef MACHDEP_DEBUG
621 1.2 matt rmixl_puts("\r\ninfop: ");
622 1.2 matt rmixl_puthex64((uint64_t)(intptr_t)infop);
623 1.2 matt #endif
624 1.2 matt #ifdef DIAGNOSTIC
625 1.2 matt rmixl_puts("\r\nrecognized psb_version: ");
626 1.2 matt rmixl_puthex64(rmixlfw_info.psb_version);
627 1.2 matt rmixl_puts("\r\n");
628 1.2 matt #endif
629 1.2 matt
630 1.2 matt return mem_clusters_init(
631 1.2 matt (rmixlfw_mmap_t *)(intptr_t)rmixlfw_info.psb_physaddr_map,
632 1.2 matt (rmixlfw_mmap_t *)(intptr_t)rmixlfw_info.avail_mem_map);
633 1.2 matt }
634 1.2 matt
635 1.2 matt void
636 1.2 matt rmixlfw_mmap_print(rmixlfw_mmap_t *map)
637 1.2 matt {
638 1.2 matt #ifdef MACHDEP_DEBUG
639 1.2 matt for (uint32_t i=0; i < map->nmmaps; i++) {
640 1.2 matt rmixl_puthex32(i);
641 1.2 matt rmixl_puts(", ");
642 1.2 matt rmixl_puthex64(map->entry[i].start);
643 1.2 matt rmixl_puts(", ");
644 1.2 matt rmixl_puthex64(map->entry[i].size);
645 1.2 matt rmixl_puts(", ");
646 1.2 matt rmixl_puthex32(map->entry[i].type);
647 1.2 matt rmixl_puts("\r\n");
648 1.2 matt }
649 1.2 matt #endif
650 1.2 matt }
651 1.2 matt
652 1.2 matt /*
653 1.2 matt * mem_clusters_init
654 1.2 matt *
655 1.2 matt * initialize mem_clusters[] table based on memory address mapping
656 1.2 matt * provided by boot firmware.
657 1.2 matt *
658 1.2 matt * prefer avail_mem_map if we can, otherwise use psb_physaddr_map.
659 1.2 matt * these will be limited by MEMSIZE if it is configured.
660 1.2 matt * if neither are available, just use MEMSIZE.
661 1.2 matt */
662 1.2 matt static u_long
663 1.2 matt mem_clusters_init(
664 1.2 matt rmixlfw_mmap_t *psb_physaddr_map,
665 1.2 matt rmixlfw_mmap_t *avail_mem_map)
666 1.2 matt {
667 1.2 matt rmixlfw_mmap_t *map = NULL;
668 1.2 matt const char *mapname;
669 1.2 matt uint64_t tmp;
670 1.2 matt uint64_t sz;
671 1.2 matt uint64_t sum;
672 1.2 matt u_int cnt;
673 1.2 matt #ifdef MEMSIZE
674 1.2 matt u_long memsize = MEMSIZE;
675 1.2 matt #endif
676 1.2 matt
677 1.2 matt #ifdef MACHDEP_DEBUG
678 1.2 matt rmixl_puts("psb_physaddr_map: ");
679 1.2 matt rmixl_puthex64((uint64_t)(intptr_t)psb_physaddr_map);
680 1.2 matt rmixl_puts("\r\n");
681 1.2 matt #endif
682 1.2 matt if (psb_physaddr_map != NULL) {
683 1.2 matt rmixlfw_phys_mmap = *psb_physaddr_map;
684 1.2 matt map = &rmixlfw_phys_mmap;
685 1.2 matt mapname = "psb_physaddr_map";
686 1.2 matt rmixlfw_mmap_print(map);
687 1.2 matt }
688 1.2 matt #ifdef DIAGNOSTIC
689 1.2 matt else {
690 1.2 matt rmixl_puts("WARNING: no psb_physaddr_map\r\n");
691 1.2 matt }
692 1.2 matt #endif
693 1.2 matt
694 1.2 matt #ifdef MACHDEP_DEBUG
695 1.2 matt rmixl_puts("avail_mem_map: ");
696 1.2 matt rmixl_puthex64((uint64_t)(intptr_t)avail_mem_map);
697 1.2 matt rmixl_puts("\r\n");
698 1.2 matt #endif
699 1.2 matt if (avail_mem_map != NULL) {
700 1.2 matt rmixlfw_avail_mmap = *avail_mem_map;
701 1.2 matt map = &rmixlfw_avail_mmap;
702 1.2 matt mapname = "avail_mem_map";
703 1.2 matt rmixlfw_mmap_print(map);
704 1.2 matt }
705 1.2 matt #ifdef DIAGNOSTIC
706 1.2 matt else {
707 1.2 matt rmixl_puts("WARNING: no avail_mem_map\r\n");
708 1.2 matt }
709 1.2 matt #endif
710 1.2 matt
711 1.2 matt if (map == NULL) {
712 1.2 matt #ifndef MEMSIZE
713 1.2 matt rmixl_puts("panic: no firmware memory map, "
714 1.2 matt "must configure MEMSIZE\r\n");
715 1.2 matt for(;;); /* XXX */
716 1.2 matt #else
717 1.2 matt #ifdef DIAGNOSTIC
718 1.2 matt rmixl_puts("WARNING: no avail_mem_map, "
719 1.2 matt "using MEMSIZE\r\n");
720 1.2 matt #endif
721 1.2 matt
722 1.2 matt mem_clusters[0].start = 0;
723 1.2 matt mem_clusters[0].size = MEMSIZE;
724 1.2 matt mem_cluster_cnt = 1;
725 1.2 matt return MEMSIZE;
726 1.2 matt #endif /* MEMSIZE */
727 1.2 matt }
728 1.2 matt
729 1.2 matt #ifdef DIAGNOSTIC
730 1.2 matt rmixl_puts("using ");
731 1.2 matt rmixl_puts(mapname);
732 1.2 matt rmixl_puts("\r\n");
733 1.2 matt #endif
734 1.2 matt #ifdef MACHDEP_DEBUG
735 1.2 matt rmixl_puts("memory clusters:\r\n");
736 1.2 matt #endif
737 1.2 matt sum = 0;
738 1.2 matt cnt = 0;
739 1.2 matt for (uint32_t i=0; i < map->nmmaps; i++) {
740 1.2 matt if (map->entry[i].type != RMIXLFW_MMAP_TYPE_RAM)
741 1.2 matt continue;
742 1.2 matt mem_clusters[cnt].start = map->entry[i].start;
743 1.2 matt sz = map->entry[i].size;
744 1.2 matt sum += sz;
745 1.2 matt mem_clusters[cnt].size = sz;
746 1.2 matt #ifdef MACHDEP_DEBUG
747 1.2 matt rmixl_puthex32(i);
748 1.2 matt rmixl_puts(": ");
749 1.2 matt rmixl_puthex64(mem_clusters[cnt].start);
750 1.2 matt rmixl_puts(", ");
751 1.2 matt rmixl_puthex64(sz);
752 1.2 matt rmixl_puts(": ");
753 1.2 matt rmixl_puthex64(sum);
754 1.2 matt rmixl_puts("\r\n");
755 1.2 matt #endif
756 1.2 matt #ifdef MEMSIZE
757 1.2 matt /*
758 1.2 matt * configurably limit memsize
759 1.2 matt */
760 1.2 matt if (sum == memsize)
761 1.2 matt break;
762 1.2 matt if (sum > memsize) {
763 1.2 matt tmp = sum - memsize;
764 1.2 matt sz -= tmp;
765 1.2 matt sum -= tmp;
766 1.2 matt mem_clusters[cnt].size = sz;
767 1.2 matt break;
768 1.2 matt }
769 1.2 matt #endif
770 1.2 matt cnt++;
771 1.2 matt }
772 1.2 matt mem_cluster_cnt = cnt;
773 1.2 matt return sum;
774 1.2 matt }
775 1.2 matt
776 1.2 matt void
777 1.2 matt consinit(void)
778 1.2 matt {
779 1.2 matt
780 1.2 matt /*
781 1.2 matt * Everything related to console initialization is done
782 1.2 matt * in mach_init().
783 1.2 matt */
784 1.2 matt }
785 1.2 matt
786 1.2 matt /*
787 1.2 matt * Allocate memory for variable-sized tables,
788 1.2 matt */
789 1.2 matt void
790 1.2 matt cpu_startup()
791 1.2 matt {
792 1.2 matt vaddr_t minaddr, maxaddr;
793 1.2 matt char pbuf[9];
794 1.2 matt
795 1.2 matt /*
796 1.2 matt * Good {morning,afternoon,evening,night}.
797 1.2 matt */
798 1.2 matt printf("%s%s", copyright, version);
799 1.2 matt format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
800 1.2 matt printf("total memory = %s\n", pbuf);
801 1.2 matt
802 1.2 matt /*
803 1.2 matt * Virtual memory is bootstrapped -- notify the bus spaces
804 1.2 matt * that memory allocation is now safe.
805 1.2 matt */
806 1.2 matt rmixl_configuration.rc_mallocsafe = 1;
807 1.2 matt
808 1.2 matt minaddr = 0;
809 1.2 matt /*
810 1.2 matt * Allocate a submap for physio.
811 1.2 matt */
812 1.2 matt phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
813 1.2 matt VM_PHYS_SIZE, 0, FALSE, NULL);
814 1.2 matt
815 1.2 matt /*
816 1.2 matt * (No need to allocate an mbuf cluster submap. Mbuf clusters
817 1.2 matt * are allocated via the pool allocator, and we use XKSEG to
818 1.2 matt * map those pages.)
819 1.2 matt */
820 1.2 matt
821 1.2 matt format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
822 1.2 matt printf("avail memory = %s\n", pbuf);
823 1.2 matt }
824 1.2 matt
825 1.2 matt int waittime = -1;
826 1.2 matt
827 1.2 matt void
828 1.3 rmind cpu_reboot(int howto, char *bootstr)
829 1.2 matt {
830 1.2 matt
831 1.2 matt /* Take a snapshot before clobbering any registers. */
832 1.2 matt if (curproc)
833 1.3 rmind savectx(curpcb);
834 1.2 matt
835 1.2 matt if (cold) {
836 1.2 matt howto |= RB_HALT;
837 1.2 matt goto haltsys;
838 1.2 matt }
839 1.2 matt
840 1.2 matt /* If "always halt" was specified as a boot flag, obey. */
841 1.2 matt if (boothowto & RB_HALT)
842 1.2 matt howto |= RB_HALT;
843 1.2 matt
844 1.2 matt boothowto = howto;
845 1.2 matt if ((howto & RB_NOSYNC) == 0 && (waittime < 0)) {
846 1.2 matt waittime = 0;
847 1.2 matt vfs_shutdown();
848 1.2 matt
849 1.2 matt /*
850 1.2 matt * If we've been adjusting the clock, the todr
851 1.2 matt * will be out of synch; adjust it now.
852 1.2 matt */
853 1.2 matt resettodr();
854 1.2 matt }
855 1.2 matt
856 1.2 matt splhigh();
857 1.2 matt
858 1.2 matt if (howto & RB_DUMP)
859 1.2 matt dumpsys();
860 1.2 matt
861 1.2 matt haltsys:
862 1.2 matt doshutdownhooks();
863 1.2 matt
864 1.2 matt if (howto & RB_HALT) {
865 1.2 matt printf("\n");
866 1.2 matt printf("The operating system has halted.\n");
867 1.2 matt printf("Please press any key to reboot.\n\n");
868 1.2 matt cnpollc(1); /* For proper keyboard command handling */
869 1.2 matt cngetc();
870 1.2 matt cnpollc(0);
871 1.2 matt }
872 1.2 matt
873 1.2 matt printf("rebooting...\n\n");
874 1.2 matt
875 1.2 matt rmixl_exit(0);
876 1.2 matt }
877 1.2 matt
878 1.2 matt /*
879 1.2 matt * goodbye world
880 1.2 matt */
881 1.2 matt #define GPIO_CPU_RST 0xa0 /* XXX TMP */
882 1.2 matt void __attribute__((__noreturn__))
883 1.2 matt rmixl_exit(int howto)
884 1.2 matt {
885 1.2 matt /* use firmware callbak to reboot */
886 1.2 matt void (*reset)(void) = (void *)(intptr_t)rmixlfw_info.warm_reset;
887 1.2 matt if (reset != 0) {
888 1.2 matt (*reset)();
889 1.2 matt printf("warm reset callback failed, spinning...\n");
890 1.2 matt } else {
891 1.2 matt printf("warm reset callback absent, spinning...\n");
892 1.2 matt }
893 1.2 matt for (;;);
894 1.2 matt }
895