machdep.c revision 1.1.2.8
1 /* $NetBSD: machdep.c,v 1.1.2.8 2009/11/16 23:57:26 cliff Exp $ */ 2 3 /* 4 * Copyright 2001, 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Copyright (c) 1992, 1993 40 * The Regents of the University of California. All rights reserved. 41 * 42 * This code is derived from software contributed to Berkeley by 43 * the Systems Programming Group of the University of Utah Computer 44 * Science Department, The Mach Operating System project at 45 * Carnegie-Mellon University and Ralph Campbell. 46 * 47 * Redistribution and use in source and binary forms, with or without 48 * modification, are permitted provided that the following conditions 49 * are met: 50 * 1. Redistributions of source code must retain the above copyright 51 * notice, this list of conditions and the following disclaimer. 52 * 2. Redistributions in binary form must reproduce the above copyright 53 * notice, this list of conditions and the following disclaimer in the 54 * documentation and/or other materials provided with the distribution. 55 * 3. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)machdep.c 8.3 (Berkeley) 1/12/94 72 * from: Utah Hdr: machdep.c 1.63 91/04/24 73 */ 74 /* 75 * Copyright (c) 1988 University of Utah. 76 * 77 * This code is derived from software contributed to Berkeley by 78 * the Systems Programming Group of the University of Utah Computer 79 * Science Department, The Mach Operating System project at 80 * Carnegie-Mellon University and Ralph Campbell. 81 * 82 * Redistribution and use in source and binary forms, with or without 83 * modification, are permitted provided that the following conditions 84 * are met: 85 * 1. Redistributions of source code must retain the above copyright 86 * notice, this list of conditions and the following disclaimer. 87 * 2. Redistributions in binary form must reproduce the above copyright 88 * notice, this list of conditions and the following disclaimer in the 89 * documentation and/or other materials provided with the distribution. 90 * 3. All advertising materials mentioning features or use of this software 91 * must display the following acknowledgement: 92 * This product includes software developed by the University of 93 * California, Berkeley and its contributors. 94 * 4. Neither the name of the University nor the names of its contributors 95 * may be used to endorse or promote products derived from this software 96 * without specific prior written permission. 97 * 98 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 99 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 100 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 101 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 102 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 103 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 104 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 105 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 106 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 107 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 108 * SUCH DAMAGE. 109 * 110 * @(#)machdep.c 8.3 (Berkeley) 1/12/94 111 * from: Utah Hdr: machdep.c 1.63 91/04/24 112 */ 113 114 #include <sys/cdefs.h> 115 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.1.2.8 2009/11/16 23:57:26 cliff Exp $"); 116 117 #include "opt_ddb.h" 118 #include "opt_com.h" 119 #include "opt_execfmt.h" 120 #include "opt_memsize.h" 121 122 #include <sys/param.h> 123 #include <sys/systm.h> 124 #include <sys/kernel.h> 125 #include <sys/buf.h> 126 #include <sys/reboot.h> 127 #include <sys/user.h> 128 #include <sys/mount.h> 129 #include <sys/kcore.h> 130 #include <sys/boot_flag.h> 131 #include <sys/termios.h> 132 #include <sys/ksyms.h> 133 #include <sys/bus.h> 134 #include <sys/device.h> 135 #include <sys/extent.h> 136 #include <sys/malloc.h> 137 138 #include <uvm/uvm_extern.h> 139 140 #include <dev/cons.h> 141 142 #include "ksyms.h" 143 144 #if NKSYMS || defined(DDB) || defined(LKM) 145 #include <machine/db_machdep.h> 146 #include <ddb/db_extern.h> 147 #endif 148 149 #include <machine/cpu.h> 150 #include <machine/psl.h> 151 152 #include "com.h" 153 #if NCOM == 0 154 #error no serial console 155 #endif 156 157 #include <dev/ic/comreg.h> 158 #include <dev/ic/comvar.h> 159 160 #include <mips/rmi/rmixl_comvar.h> 161 #include <mips/rmi/rmixlvar.h> 162 #include <mips/rmi/rmixl_firmware.h> 163 #include <mips/rmi/rmixlreg.h> 164 165 #define MACHDEP_DEBUG 1 166 #ifdef MACHDEP_DEBUG 167 int machdep_debug=MACHDEP_DEBUG; 168 # define DPRINTF(x) do { if (machdep_debug) printf x ; } while(0) 169 #else 170 # define DPRINTF(x) 171 #endif 172 173 #ifndef CONSFREQ 174 # define CONSFREQ -1 /* inherit from firmware */ 175 #endif 176 #ifndef CONSPEED 177 # define CONSPEED 38400 178 #endif 179 #ifndef CONMODE 180 # define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8) 181 #endif 182 #ifndef CONSADDR 183 # define CONSADDR RMIXL_IO_DEV_UART_1 184 #endif 185 186 int comcnfreq = CONSFREQ; 187 int comcnspeed = CONSPEED; 188 tcflag_t comcnmode = CONMODE; 189 bus_addr_t comcnaddr = (bus_addr_t)CONSADDR; 190 191 struct rmixl_config rmixl_configuration; 192 193 194 /* 195 * array of tested firmware versions 196 * if you find new ones and they work 197 * please add them 198 */ 199 static uint64_t rmiclfw_psb_versions[] = { 200 0x4958d4fb00000056ULL, 201 0x49a5a8fa00000056ULL, 202 }; 203 #define RMICLFW_PSB_VERSIONS_LEN \ 204 (sizeof(rmiclfw_psb_versions)/sizeof(rmiclfw_psb_versions[0])) 205 206 /* 207 * kernel copies of firmware info 208 */ 209 static rmixlfw_info_t rmixlfw_info; 210 static rmixlfw_mmap_t rmixlfw_phys_mmap; 211 static rmixlfw_mmap_t rmixlfw_avail_mmap; 212 #define RMIXLFW_INFOP_LEGAL 0x8c000000 213 214 215 /* 216 * storage for fixed extent used to allocate physical address regions 217 * because extent(9) start and end values are u_long, they are only 218 * 32 bits on a 32 bit kernel, which is insuffucuent since XLS physical 219 * address is 40 bits wide. So the "physaddr" map stores regions 220 * in units of megabytes. 221 */ 222 static u_long rmixl_physaddr_storage[ 223 EXTENT_FIXED_STORAGE_SIZE(32)/sizeof(u_long) 224 ]; 225 226 /* For sysctl_hw. */ 227 extern char cpu_model[]; 228 229 /* Our exported CPU info; we can have only one. */ 230 struct cpu_info cpu_info_store; 231 232 /* Maps for VM objects. */ 233 struct vm_map *mb_map = NULL; 234 struct vm_map *phys_map = NULL; 235 236 int physmem; /* Total physical memory */ 237 238 int netboot; /* Are we netbooting? */ 239 240 241 phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX]; 242 u_int mem_cluster_cnt; 243 244 245 void configure(void); 246 void mach_init(int, int32_t *, void *, int64_t); 247 static u_long rmixlfw_init(int64_t); 248 static u_long mem_clusters_init(rmixlfw_mmap_t *, rmixlfw_mmap_t *); 249 static void __attribute__((__noreturn__)) rmixl_exit(int); 250 static void rmixl_physaddr_init(void); 251 static u_int ram_seg_resv(phys_ram_seg_t *, u_int, u_quad_t, u_quad_t); 252 void rmixlfw_mmap_print(rmixlfw_mmap_t *); 253 254 255 /* 256 * safepri is a safe priority for sleep to set for a spin-wait during 257 * autoconfiguration or after a panic. Used as an argument to splx(). 258 */ 259 int safepri = MIPS1_PSL_LOWIPL; 260 261 extern struct user *proc0paddr; 262 263 /* 264 * Do all the stuff that locore normally does before calling main(). 265 */ 266 void 267 mach_init(int argc, int32_t *argv, void *envp, int64_t infop) 268 { 269 struct rmixl_config *rcp = &rmixl_configuration; 270 void *kernend, *v; 271 u_long memsize; 272 u_int vm_cluster_cnt; 273 uint32_t r; 274 phys_ram_seg_t vm_clusters[VM_PHYSSEG_MAX]; 275 extern char edata[], end[]; 276 277 rmixl_mtcr(0, 1); /* disable all threads except #0 */ 278 279 r = rmixl_mfcr(0x300); 280 r &= ~__BIT(14); /* disabled Unaligned Access */ 281 rmixl_mtcr(0x300, r); 282 283 rmixl_mtcr(0x400, 0); /* enable MMU clock gating */ 284 /* set single MMU Thread Mode */ 285 /* TLB is partitioned (but 1 partition) */ 286 287 /* 288 * Clear the BSS segment. 289 */ 290 kernend = (void *)mips_round_page(end); 291 memset(edata, 0, (char *)kernend - edata); 292 293 /* 294 * Set up the exception vectors and CPU-specific function 295 * vectors early on. We need the wbflush() vector set up 296 * before comcnattach() is called (or at least before the 297 * first printf() after that is called). 298 * Also clears the I+D caches. 299 */ 300 mips_vector_init(); 301 302 memsize = rmixlfw_init(infop); 303 304 /* set the VM page size */ 305 uvm_setpagesize(); 306 307 physmem = btoc(memsize); 308 309 rmixl_obio_bus_mem_init(&rcp->rc_obio_memt, rcp); /* need for console */ 310 311 #if NCOM > 0 312 rmixl_com_cnattach(comcnaddr, comcnspeed, -1, 313 COM_TYPE_NORMAL, comcnmode); 314 #endif 315 316 printf("\nNetBSD/rmixl\n"); 317 printf("memsize = %#lx\n", memsize); 318 319 rmixl_physaddr_init(); 320 321 /* 322 * Obtain the cpu frequency 323 * Compute the number of ticks for hz. 324 * Compute the delay divisor. 325 * Double the Hz if this CPU runs at twice the 326 * external/cp0-count frequency 327 */ 328 curcpu()->ci_cpu_freq = rmixlfw_info.cpu_frequency; 329 curcpu()->ci_cycles_per_hz = (curcpu()->ci_cpu_freq + hz / 2) / hz; 330 curcpu()->ci_divisor_delay = 331 ((curcpu()->ci_cpu_freq + 500000) / 1000000); 332 if (mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT) 333 curcpu()->ci_cpu_freq *= 2; 334 335 /* 336 * Look at arguments passed to us and compute boothowto. 337 * - rmixl firmware gives us a 32 bit argv[i], so adapt 338 * by forcing sign extension in cast to (char *) 339 */ 340 boothowto = RB_AUTOBOOT; 341 for (int i = 1; i < argc; i++) { 342 for (char *cp = (char *)(intptr_t)argv[i]; *cp; cp++) { 343 int howto; 344 /* Ignore superfluous '-', if there is one */ 345 if (*cp == '-') 346 continue; 347 348 howto = 0; 349 BOOT_FLAG(*cp, howto); 350 if (howto != 0) 351 boothowto |= howto; 352 #ifdef DIAGNOSTIC 353 else 354 printf("bootflag '%c' not recognised\n", *cp); 355 #endif 356 } 357 } 358 #ifdef DIAGNOSTIC 359 printf("boothowto %#x\n", boothowto); 360 #endif 361 362 /* 363 * Reserve pages from the VM system. 364 * to maintain mem_clusters[] as a map of raw ram, 365 * copy into temporary table vm_clusters[] 366 * work on that and use it to feed vm_physload() 367 */ 368 KASSERT(sizeof(mem_clusters) == sizeof(vm_clusters)); 369 memcpy(&vm_clusters, &mem_clusters, sizeof(vm_clusters)); 370 vm_cluster_cnt = mem_cluster_cnt; 371 372 /* reserve 0..start..kernend pages */ 373 vm_cluster_cnt = ram_seg_resv(vm_clusters, vm_cluster_cnt, 374 0, round_page(MIPS_KSEG0_TO_PHYS(kernend))); 375 376 /* reserve reset exception vector page */ 377 vm_cluster_cnt = ram_seg_resv(vm_clusters, vm_cluster_cnt, 378 MIPS_KSEG1_TO_PHYS(MIPS_RESET_EXC_VEC), 379 MIPS_KSEG1_TO_PHYS(MIPS_RESET_EXC_VEC+NBPG)); 380 381 /* 382 * Load vm_clusters[] into the VM system. 383 */ 384 for (u_int i=0; i < vm_cluster_cnt; i++) { 385 u_quad_t first, last; 386 387 first = trunc_page(vm_clusters[i].start); 388 last = round_page(vm_clusters[i].start + vm_clusters[i].size); 389 DPRINTF(("%s: %d: %#"PRIx64", %#"PRIx64"\n", 390 __func__, i, first, last)); 391 uvm_page_physload(atop(first), atop(last), atop(first), 392 atop(last), VM_FREELIST_DEFAULT); 393 } 394 395 /* 396 * Initialize error message buffer (at end of core). 397 */ 398 mips_init_msgbuf(); 399 400 pmap_bootstrap(); 401 402 /* 403 * Allocate space for proc0's USPACE. 404 */ 405 v = (void *)uvm_pageboot_alloc(USPACE); 406 lwp0.l_addr = proc0paddr = (struct user *)v; 407 lwp0.l_md.md_regs = (struct frame *)((char *)v + USPACE) - 1; 408 #ifdef _LP64 409 lwp0.l_md.md_regs->f_regs[_R_SR] = MIPS_SR_KX; 410 #endif 411 proc0paddr->u_pcb.pcb_context.val[_L_SR] = 412 #ifdef _LP64 413 MIPS_SR_KX | 414 #endif 415 MIPS_INT_MASK | MIPS_SR_INT_IE; /* SR */ 416 417 418 /* 419 * Initialize debuggers, and break into them, if appropriate. 420 */ 421 #if NKSYMS || defined(DDB) || defined(LKM) 422 ksyms_init(0, 0, 0); 423 #endif 424 425 #if defined(DDB) 426 if (boothowto & RB_KDB) 427 Debugger(); 428 #endif 429 } 430 431 432 /* 433 * ram_seg_resv - cut reserved regions out of segs, fragmenting as needed 434 * 435 * we simply build a new table of segs, then copy it back over the given one 436 * this is inefficient but simple and called only a few times 437 * 438 * note: 'last' here means 1st addr past the end of the segment (start+size) 439 */ 440 static u_int 441 ram_seg_resv(phys_ram_seg_t *segs, u_int nsegs, 442 u_quad_t resv_first, u_quad_t resv_last) 443 { 444 u_quad_t first, last; 445 int new_nsegs=0; 446 int resv_flag; 447 phys_ram_seg_t new_segs[VM_PHYSSEG_MAX]; 448 449 for (u_int i=0; i < nsegs; i++) { 450 resv_flag = 0; 451 first = trunc_page(segs[i].start); 452 last = round_page(segs[i].start + segs[i].size); 453 454 KASSERT(new_nsegs < VM_PHYSSEG_MAX); 455 if ((resv_first <= first) && (resv_last >= last)) { 456 /* whole segment is resverved */ 457 continue; 458 } 459 if ((resv_first > first) && (resv_first < last)) { 460 u_quad_t new_last; 461 462 /* 463 * reserved start in segment 464 * salvage the leading fragment 465 */ 466 resv_flag = 1; 467 new_last = last - (last - resv_first); 468 KASSERT (new_last > first); 469 new_segs[new_nsegs].start = first; 470 new_segs[new_nsegs].size = new_last - first; 471 new_nsegs++; 472 } 473 if ((resv_last > first) && (resv_last < last)) { 474 u_quad_t new_first; 475 476 /* 477 * reserved end in segment 478 * salvage the trailing fragment 479 */ 480 resv_flag = 1; 481 new_first = first + (resv_last - first); 482 KASSERT (last > (new_first + NBPG)); 483 new_segs[new_nsegs].start = new_first; 484 new_segs[new_nsegs].size = last - new_first; 485 new_nsegs++; 486 } 487 if (resv_flag == 0) { 488 /* 489 * nothing reserved here, take it all 490 */ 491 new_segs[new_nsegs].start = first; 492 new_segs[new_nsegs].size = last - first; 493 new_nsegs++; 494 } 495 496 } 497 498 memcpy(segs, new_segs, sizeof(new_segs)); 499 500 return new_nsegs; 501 } 502 503 /* 504 * create an extent for physical address space 505 * these are in units of MB for sake of compression (for sake of 32 bit kernels) 506 * allocate the regions where we have known functions (DRAM, IO, etc) 507 * what remains can be allocated as needed for other stuff 508 * e.g. to configure BARs that are not already initialized and enabled. 509 */ 510 static void 511 rmixl_physaddr_init(void) 512 { 513 struct extent *ext; 514 unsigned long start = 0UL; 515 unsigned long end = (__BIT(40) / (1024 * 1024)) -1; 516 u_long base; 517 u_long size; 518 uint32_t r; 519 520 ext = extent_create("physaddr", start, end, M_DEVBUF, 521 (void *)rmixl_physaddr_storage, sizeof(rmixl_physaddr_storage), 522 EX_NOWAIT | EX_NOCOALESCE); 523 524 if (ext == NULL) 525 panic("%s: extent_create failed", __func__); 526 527 /* 528 * grab regions per DRAM BARs 529 */ 530 for (u_int i=0; i < RMIXL_SBC_DRAM_NBARS; i++) { 531 r = RMIXL_IOREG_READ(RMIXL_SBC_DRAM_BAR(i)); 532 if ((r & RMIXL_DRAM_BAR_STATUS) == 0) 533 continue; /* not enabled */ 534 base = (u_long)(DRAM_BAR_TO_BASE((uint64_t)r) / (1024 * 1024)); 535 size = (u_long)(DRAM_BAR_TO_SIZE((uint64_t)r) / (1024 * 1024)); 536 537 DPRINTF(("%s: %d: %d: 0x%08x -- 0x%010lx:%lu MB\n", 538 __func__, __LINE__, i, r, base * (1024 * 1024), size)); 539 if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0) 540 panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) " 541 "failed", __func__, ext, base, size, EX_NOWAIT); 542 } 543 544 /* 545 * grab regions per PCIe CFG, ECFG, IO, MEM BARs 546 */ 547 r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_CFG_BAR); 548 if ((r & RMIXL_PCIE_CFG_BAR_ENB) != 0) { 549 base = (u_long)(RMIXL_PCIE_CFG_BAR_TO_BA((uint64_t)r) 550 / (1024 * 1024)); 551 size = (u_long)RMIXL_PCIE_CFG_SIZE / (1024 * 1024); 552 DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__, 553 __LINE__, "CFG", r, base * 1024 * 1024, size)); 554 if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0) 555 panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) " 556 "failed", __func__, ext, base, size, EX_NOWAIT); 557 } 558 r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_ECFG_BAR); 559 if ((r & RMIXL_PCIE_ECFG_BAR_ENB) != 0) { 560 base = (u_long)(RMIXL_PCIE_ECFG_BAR_TO_BA((uint64_t)r) 561 / (1024 * 1024)); 562 size = (u_long)RMIXL_PCIE_ECFG_SIZE / (1024 * 1024); 563 DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__, 564 __LINE__, "ECFG", r, base * 1024 * 1024, size)); 565 if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0) 566 panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) " 567 "failed", __func__, ext, base, size, EX_NOWAIT); 568 } 569 r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_MEM_BAR); 570 if ((r & RMIXL_PCIE_MEM_BAR_ENB) != 0) { 571 base = (u_long)(RMIXL_PCIE_MEM_BAR_TO_BA((uint64_t)r) 572 / (1024 * 1024)); 573 size = (u_long)(RMIXL_PCIE_MEM_BAR_TO_SIZE((uint64_t)r) 574 / (1024 * 1024)); 575 DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__, 576 __LINE__, "MEM", r, base * 1024 * 1024, size)); 577 if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0) 578 panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) " 579 "failed", __func__, ext, base, size, EX_NOWAIT); 580 } 581 r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_IO_BAR); 582 if ((r & RMIXL_PCIE_IO_BAR_ENB) != 0) { 583 base = (u_long)(RMIXL_PCIE_IO_BAR_TO_BA((uint64_t)r) 584 / (1024 * 1024)); 585 size = (u_long)(RMIXL_PCIE_IO_BAR_TO_SIZE((uint64_t)r) 586 / (1024 * 1024)); 587 DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__, 588 __LINE__, "IO", r, base * 1024 * 1024, size)); 589 if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0) 590 panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) " 591 "failed", __func__, ext, base, size, EX_NOWAIT); 592 } 593 594 /* 595 * at this point all regions left in "physaddr" extent 596 * are unused holes in the physical adress space 597 * available for use as needed. 598 */ 599 rmixl_configuration.rc_phys_ex = ext; 600 #ifdef MACHDEP_DEBUG 601 extent_print(ext); 602 #endif 603 } 604 605 static u_long 606 rmixlfw_init(int64_t infop) 607 { 608 struct rmixl_config *rcp = &rmixl_configuration; 609 610 strcpy(cpu_model, "RMI XLS616ATX VIIA"); /* XXX */ 611 612 infop |= MIPS_KSEG0_START; 613 rmixlfw_info = *(rmixlfw_info_t *)(intptr_t)infop; 614 615 for (int i=0; i < RMICLFW_PSB_VERSIONS_LEN; i++) { 616 if (rmiclfw_psb_versions[i] == rmixlfw_info.psb_version) 617 goto found; 618 } 619 620 rcp->rc_io_pbase = RMIXL_IO_DEV_PBASE; 621 rmixl_putchar_init(rcp->rc_io_pbase); 622 623 #ifdef DIAGNOSTIC 624 rmixl_puts("\r\nWARNING: untested psb_version: "); 625 rmixl_puthex64(rmixlfw_info.psb_version); 626 rmixl_puts("\r\n"); 627 #endif 628 return MEMSIZE; 629 630 found: 631 rcp->rc_io_pbase = MIPS_KSEG1_TO_PHYS(rmixlfw_info.io_base); 632 rmixl_putchar_init(rcp->rc_io_pbase); 633 #ifdef MACHDEP_DEBUG 634 rmixl_puts("\r\ninfop: "); 635 rmixl_puthex64((uint64_t)(intptr_t)infop); 636 #endif 637 #ifdef DIAGNOSTIC 638 rmixl_puts("\r\nrecognized psb_version: "); 639 rmixl_puthex64(rmixlfw_info.psb_version); 640 rmixl_puts("\r\n"); 641 #endif 642 643 return mem_clusters_init( 644 (rmixlfw_mmap_t *)(intptr_t)rmixlfw_info.psb_physaddr_map, 645 (rmixlfw_mmap_t *)(intptr_t)rmixlfw_info.avail_mem_map); 646 } 647 648 void 649 rmixlfw_mmap_print(rmixlfw_mmap_t *map) 650 { 651 #ifdef MACHDEP_DEBUG 652 for (uint32_t i=0; i < map->nmmaps; i++) { 653 rmixl_puthex32(i); 654 rmixl_puts(", "); 655 rmixl_puthex64(map->entry[i].start); 656 rmixl_puts(", "); 657 rmixl_puthex64(map->entry[i].size); 658 rmixl_puts(", "); 659 rmixl_puthex32(map->entry[i].type); 660 rmixl_puts("\r\n"); 661 } 662 #endif 663 } 664 665 /* 666 * mem_clusters_init 667 * 668 * initialize mem_clusters[] table based on memory address mapping 669 * provided by boot firmware. 670 * 671 * prefer avail_mem_map if we can, otherwise use psb_physaddr_map. 672 * these will be limited by MEMSIZE if it is configured. 673 * if neither are available, just use MEMSIZE. 674 */ 675 static u_long 676 mem_clusters_init( 677 rmixlfw_mmap_t *psb_physaddr_map, 678 rmixlfw_mmap_t *avail_mem_map) 679 { 680 rmixlfw_mmap_t *map = NULL; 681 const char *mapname; 682 uint64_t tmp; 683 uint64_t sz; 684 uint64_t sum; 685 u_int cnt; 686 #ifdef MEMSIZE 687 u_long memsize = MEMSIZE; 688 #endif 689 690 #ifdef MACHDEP_DEBUG 691 rmixl_puts("psb_physaddr_map: "); 692 rmixl_puthex64((uint64_t)(intptr_t)psb_physaddr_map); 693 rmixl_puts("\r\n"); 694 #endif 695 if (psb_physaddr_map != NULL) { 696 rmixlfw_phys_mmap = *psb_physaddr_map; 697 map = &rmixlfw_phys_mmap; 698 mapname = "psb_physaddr_map"; 699 rmixlfw_mmap_print(map); 700 } 701 #ifdef DIAGNOSTIC 702 else { 703 rmixl_puts("WARNING: no psb_physaddr_map\r\n"); 704 } 705 #endif 706 707 #ifdef MACHDEP_DEBUG 708 rmixl_puts("avail_mem_map: "); 709 rmixl_puthex64((uint64_t)(intptr_t)avail_mem_map); 710 rmixl_puts("\r\n"); 711 #endif 712 if (avail_mem_map != NULL) { 713 rmixlfw_avail_mmap = *avail_mem_map; 714 map = &rmixlfw_avail_mmap; 715 mapname = "avail_mem_map"; 716 rmixlfw_mmap_print(map); 717 } 718 #ifdef DIAGNOSTIC 719 else { 720 rmixl_puts("WARNING: no avail_mem_map\r\n"); 721 } 722 #endif 723 724 if (map == NULL) { 725 #ifndef MEMSIZE 726 rmixl_puts("panic: no firmware memory map, " 727 "must configure MEMSIZE\r\n"); 728 for(;;); /* XXX */ 729 #else 730 #ifdef DIAGNOSTIC 731 rmixl_puts("WARNING: no avail_mem_map, " 732 "using MEMSIZE\r\n"); 733 #endif 734 735 mem_clusters[0].start = 0; 736 mem_clusters[0].size = MEMSIZE; 737 mem_cluster_cnt = 1; 738 return MEMSIZE; 739 #endif /* MEMSIZE */ 740 } 741 742 #ifdef DIAGNOSTIC 743 rmixl_puts("using "); 744 rmixl_puts(mapname); 745 rmixl_puts("\r\n"); 746 #endif 747 #ifdef MACHDEP_DEBUG 748 rmixl_puts("memory clusters:\r\n"); 749 #endif 750 sum = 0; 751 cnt = 0; 752 for (uint32_t i=0; i < map->nmmaps; i++) { 753 if (map->entry[i].type != RMIXLFW_MMAP_TYPE_RAM) 754 continue; 755 mem_clusters[cnt].start = map->entry[i].start; 756 sz = map->entry[i].size; 757 sum += sz; 758 mem_clusters[cnt].size = sz; 759 #ifdef MACHDEP_DEBUG 760 rmixl_puthex32(i); 761 rmixl_puts(": "); 762 rmixl_puthex64(mem_clusters[cnt].start); 763 rmixl_puts(", "); 764 rmixl_puthex64(sz); 765 rmixl_puts(": "); 766 rmixl_puthex64(sum); 767 rmixl_puts("\r\n"); 768 #endif 769 #ifdef MEMSIZE 770 /* 771 * configurably limit memsize 772 */ 773 if (sum == memsize) 774 break; 775 if (sum > memsize) { 776 tmp = sum - memsize; 777 sz -= tmp; 778 sum -= tmp; 779 mem_clusters[cnt].size = sz; 780 break; 781 } 782 #endif 783 cnt++; 784 } 785 mem_cluster_cnt = cnt; 786 return sum; 787 } 788 789 void 790 consinit(void) 791 { 792 793 /* 794 * Everything related to console initialization is done 795 * in mach_init(). 796 */ 797 } 798 799 /* 800 * Allocate memory for variable-sized tables, 801 */ 802 void 803 cpu_startup() 804 { 805 vaddr_t minaddr, maxaddr; 806 char pbuf[9]; 807 808 /* 809 * Good {morning,afternoon,evening,night}. 810 */ 811 printf("%s%s", copyright, version); 812 format_bytes(pbuf, sizeof(pbuf), ctob(physmem)); 813 printf("total memory = %s\n", pbuf); 814 815 /* 816 * Virtual memory is bootstrapped -- notify the bus spaces 817 * that memory allocation is now safe. 818 */ 819 rmixl_configuration.rc_mallocsafe = 1; 820 821 minaddr = 0; 822 /* 823 * Allocate a submap for physio. 824 */ 825 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 826 VM_PHYS_SIZE, 0, FALSE, NULL); 827 828 /* 829 * (No need to allocate an mbuf cluster submap. Mbuf clusters 830 * are allocated via the pool allocator, and we use XKSEG to 831 * map those pages.) 832 */ 833 834 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free)); 835 printf("avail memory = %s\n", pbuf); 836 } 837 838 int waittime = -1; 839 840 void 841 cpu_reboot(howto, bootstr) 842 int howto; 843 char *bootstr; 844 { 845 846 /* Take a snapshot before clobbering any registers. */ 847 if (curproc) 848 savectx((struct user *)curpcb); 849 850 if (cold) { 851 howto |= RB_HALT; 852 goto haltsys; 853 } 854 855 /* If "always halt" was specified as a boot flag, obey. */ 856 if (boothowto & RB_HALT) 857 howto |= RB_HALT; 858 859 boothowto = howto; 860 if ((howto & RB_NOSYNC) == 0 && (waittime < 0)) { 861 waittime = 0; 862 vfs_shutdown(); 863 864 /* 865 * If we've been adjusting the clock, the todr 866 * will be out of synch; adjust it now. 867 */ 868 resettodr(); 869 } 870 871 splhigh(); 872 873 if (howto & RB_DUMP) 874 dumpsys(); 875 876 haltsys: 877 doshutdownhooks(); 878 879 if (howto & RB_HALT) { 880 printf("\n"); 881 printf("The operating system has halted.\n"); 882 printf("Please press any key to reboot.\n\n"); 883 cnpollc(1); /* For proper keyboard command handling */ 884 cngetc(); 885 cnpollc(0); 886 } 887 888 printf("rebooting...\n\n"); 889 890 rmixl_exit(0); 891 } 892 893 /* 894 * goodbye world 895 */ 896 #define GPIO_CPU_RST 0xa0 /* XXX TMP */ 897 void __attribute__((__noreturn__)) 898 rmixl_exit(int howto) 899 { 900 /* use firmware callbak to reboot */ 901 void (*reset)(void) = (void *)(intptr_t)rmixlfw_info.warm_reset; 902 if (reset != 0) { 903 (*reset)(); 904 printf("warm reset callback failed, spinning...\n"); 905 } else { 906 printf("warm reset callback absent, spinning...\n"); 907 } 908 for (;;); 909 } 910
Indexes created Sat Nov 01 05:10:12 GMT 2025