machdep.c revision 1.3.2.1 1 /* $NetBSD: machdep.c,v 1.3.2.1 2010/04/30 14:39:17 uebayasi Exp $ */
2
3 /*
4 * Copyright 2001, 2002 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * Copyright (c) 1992, 1993
40 * The Regents of the University of California. All rights reserved.
41 *
42 * This code is derived from software contributed to Berkeley by
43 * the Systems Programming Group of the University of Utah Computer
44 * Science Department, The Mach Operating System project at
45 * Carnegie-Mellon University and Ralph Campbell.
46 *
47 * Redistribution and use in source and binary forms, with or without
48 * modification, are permitted provided that the following conditions
49 * are met:
50 * 1. Redistributions of source code must retain the above copyright
51 * notice, this list of conditions and the following disclaimer.
52 * 2. Redistributions in binary form must reproduce the above copyright
53 * notice, this list of conditions and the following disclaimer in the
54 * documentation and/or other materials provided with the distribution.
55 * 3. Neither the name of the University nor the names of its contributors
56 * may be used to endorse or promote products derived from this software
57 * without specific prior written permission.
58 *
59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 * SUCH DAMAGE.
70 *
71 * @(#)machdep.c 8.3 (Berkeley) 1/12/94
72 * from: Utah Hdr: machdep.c 1.63 91/04/24
73 */
74 /*
75 * Copyright (c) 1988 University of Utah.
76 *
77 * This code is derived from software contributed to Berkeley by
78 * the Systems Programming Group of the University of Utah Computer
79 * Science Department, The Mach Operating System project at
80 * Carnegie-Mellon University and Ralph Campbell.
81 *
82 * Redistribution and use in source and binary forms, with or without
83 * modification, are permitted provided that the following conditions
84 * are met:
85 * 1. Redistributions of source code must retain the above copyright
86 * notice, this list of conditions and the following disclaimer.
87 * 2. Redistributions in binary form must reproduce the above copyright
88 * notice, this list of conditions and the following disclaimer in the
89 * documentation and/or other materials provided with the distribution.
90 * 3. All advertising materials mentioning features or use of this software
91 * must display the following acknowledgement:
92 * This product includes software developed by the University of
93 * California, Berkeley and its contributors.
94 * 4. Neither the name of the University nor the names of its contributors
95 * may be used to endorse or promote products derived from this software
96 * without specific prior written permission.
97 *
98 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
99 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
100 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
101 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
102 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
103 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
104 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
105 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
106 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
107 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
108 * SUCH DAMAGE.
109 *
110 * @(#)machdep.c 8.3 (Berkeley) 1/12/94
111 * from: Utah Hdr: machdep.c 1.63 91/04/24
112 */
113
114 #include <sys/cdefs.h>
115 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.3.2.1 2010/04/30 14:39:17 uebayasi Exp $");
116
117 #include "opt_ddb.h"
118 #include "opt_com.h"
119 #include "opt_execfmt.h"
120 #include "opt_memsize.h"
121
122 #include <sys/param.h>
123 #include <sys/systm.h>
124 #include <sys/kernel.h>
125 #include <sys/buf.h>
126 #include <sys/reboot.h>
127 #include <sys/mount.h>
128 #include <sys/kcore.h>
129 #include <sys/boot_flag.h>
130 #include <sys/termios.h>
131 #include <sys/ksyms.h>
132 #include <sys/bus.h>
133 #include <sys/device.h>
134 #include <sys/extent.h>
135 #include <sys/malloc.h>
136
137 #include <uvm/uvm_extern.h>
138
139 #include <dev/cons.h>
140
141 #include "ksyms.h"
142
143 #if NKSYMS || defined(DDB) || defined(LKM)
144 #include <machine/db_machdep.h>
145 #include <ddb/db_extern.h>
146 #endif
147
148 #include <machine/cpu.h>
149 #include <machine/psl.h>
150
151 #include "com.h"
152 #if NCOM == 0
153 #error no serial console
154 #endif
155
156 #include <dev/ic/comreg.h>
157 #include <dev/ic/comvar.h>
158
159 #include <mips/rmi/rmixl_comvar.h>
160 #include <mips/rmi/rmixlvar.h>
161 #include <mips/rmi/rmixl_firmware.h>
162 #include <mips/rmi/rmixlreg.h>
163
164 #define MACHDEP_DEBUG 1
165 #ifdef MACHDEP_DEBUG
166 int machdep_debug=MACHDEP_DEBUG;
167 # define DPRINTF(x) do { if (machdep_debug) printf x ; } while(0)
168 #else
169 # define DPRINTF(x)
170 #endif
171
172 #ifndef CONSFREQ
173 # define CONSFREQ -1 /* inherit from firmware */
174 #endif
175 #ifndef CONSPEED
176 # define CONSPEED 38400
177 #endif
178 #ifndef CONMODE
179 # define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)
180 #endif
181 #ifndef CONSADDR
182 # define CONSADDR RMIXL_IO_DEV_UART_1
183 #endif
184
185 int comcnfreq = CONSFREQ;
186 int comcnspeed = CONSPEED;
187 tcflag_t comcnmode = CONMODE;
188 bus_addr_t comcnaddr = (bus_addr_t)CONSADDR;
189
190 struct rmixl_config rmixl_configuration;
191
192
193 /*
194 * array of tested firmware versions
195 * if you find new ones and they work
196 * please add them
197 */
198 static uint64_t rmiclfw_psb_versions[] = {
199 0x4958d4fb00000056ULL,
200 0x49a5a8fa00000056ULL,
201 0x4aacdb6a00000056ULL,
202 };
203 #define RMICLFW_PSB_VERSIONS_LEN \
204 (sizeof(rmiclfw_psb_versions)/sizeof(rmiclfw_psb_versions[0]))
205
206 /*
207 * kernel copies of firmware info
208 */
209 static rmixlfw_info_t rmixlfw_info;
210 static rmixlfw_mmap_t rmixlfw_phys_mmap;
211 static rmixlfw_mmap_t rmixlfw_avail_mmap;
212 #define RMIXLFW_INFOP_LEGAL 0x8c000000
213
214
215 /*
216 * storage for fixed extent used to allocate physical address regions
217 * because extent(9) start and end values are u_long, they are only
218 * 32 bits on a 32 bit kernel, which is insuffucuent since XLS physical
219 * address is 40 bits wide. So the "physaddr" map stores regions
220 * in units of megabytes.
221 */
222 static u_long rmixl_physaddr_storage[
223 EXTENT_FIXED_STORAGE_SIZE(32)/sizeof(u_long)
224 ];
225
226 /* For sysctl_hw. */
227 extern char cpu_model[];
228
229 /* Our exported CPU info; we can have only one. */
230 struct cpu_info cpu_info_store;
231
232 /* Maps for VM objects. */
233 struct vm_map *phys_map = NULL;
234
235 int physmem; /* Total physical memory */
236
237 int netboot; /* Are we netbooting? */
238
239
240 phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
241 u_int mem_cluster_cnt;
242
243
244 void configure(void);
245 void mach_init(int, int32_t *, void *, int64_t);
246 static u_long rmixlfw_init(int64_t);
247 static u_long mem_clusters_init(rmixlfw_mmap_t *, rmixlfw_mmap_t *);
248 static void __attribute__((__noreturn__)) rmixl_exit(int);
249 static void rmixl_physaddr_init(void);
250 static u_int ram_seg_resv(phys_ram_seg_t *, u_int, u_quad_t, u_quad_t);
251 void rmixlfw_mmap_print(rmixlfw_mmap_t *);
252
253
254 /*
255 * safepri is a safe priority for sleep to set for a spin-wait during
256 * autoconfiguration or after a panic. Used as an argument to splx().
257 */
258 int safepri = MIPS1_PSL_LOWIPL;
259
260 extern struct user *proc0paddr;
261
262 /*
263 * Do all the stuff that locore normally does before calling main().
264 */
265 void
266 mach_init(int argc, int32_t *argv, void *envp, int64_t infop)
267 {
268 struct rmixl_config *rcp = &rmixl_configuration;
269 void *kernend;
270 u_long memsize;
271 u_int vm_cluster_cnt;
272 uint32_t r;
273 phys_ram_seg_t vm_clusters[VM_PHYSSEG_MAX];
274 extern char edata[], end[];
275
276 rmixl_mtcr(0, 1); /* disable all threads except #0 */
277
278 r = rmixl_mfcr(0x300);
279 r &= ~__BIT(14); /* disabled Unaligned Access */
280 rmixl_mtcr(0x300, r);
281
282 rmixl_mtcr(0x400, 0); /* enable MMU clock gating */
283 /* set single MMU Thread Mode */
284 /* TLB is partitioned (1 partition) */
285
286 /*
287 * Clear the BSS segment.
288 */
289 kernend = (void *)mips_round_page(end);
290 memset(edata, 0, (char *)kernend - edata);
291
292 /*
293 * Set up the exception vectors and CPU-specific function
294 * vectors early on. We need the wbflush() vector set up
295 * before comcnattach() is called (or at least before the
296 * first printf() after that is called).
297 * Also clears the I+D caches.
298 */
299 mips_vector_init();
300
301 memsize = rmixlfw_init(infop);
302
303 /* set the VM page size */
304 uvm_setpagesize();
305
306 physmem = btoc(memsize);
307
308 rmixl_obio_bus_mem_init(&rcp->rc_obio_memt, rcp); /* need for console */
309
310 #if NCOM > 0
311 rmixl_com_cnattach(comcnaddr, comcnspeed, comcnfreq,
312 COM_TYPE_NORMAL, comcnmode);
313 #endif
314
315 printf("\nNetBSD/rmixl\n");
316 printf("memsize = %#lx\n", memsize);
317
318 rmixl_physaddr_init();
319
320 /*
321 * Obtain the cpu frequency
322 * Compute the number of ticks for hz.
323 * Compute the delay divisor.
324 * Double the Hz if this CPU runs at twice the
325 * external/cp0-count frequency
326 */
327 curcpu()->ci_cpu_freq = rmixlfw_info.cpu_frequency;
328 curcpu()->ci_cycles_per_hz = (curcpu()->ci_cpu_freq + hz / 2) / hz;
329 curcpu()->ci_divisor_delay =
330 ((curcpu()->ci_cpu_freq + 500000) / 1000000);
331 if (mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
332 curcpu()->ci_cpu_freq *= 2;
333
334 /*
335 * Look at arguments passed to us and compute boothowto.
336 * - rmixl firmware gives us a 32 bit argv[i], so adapt
337 * by forcing sign extension in cast to (char *)
338 */
339 boothowto = RB_AUTOBOOT;
340 for (int i = 1; i < argc; i++) {
341 for (char *cp = (char *)(intptr_t)argv[i]; *cp; cp++) {
342 int howto;
343 /* Ignore superfluous '-', if there is one */
344 if (*cp == '-')
345 continue;
346
347 howto = 0;
348 BOOT_FLAG(*cp, howto);
349 if (howto != 0)
350 boothowto |= howto;
351 #ifdef DIAGNOSTIC
352 else
353 printf("bootflag '%c' not recognised\n", *cp);
354 #endif
355 }
356 }
357 #ifdef DIAGNOSTIC
358 printf("boothowto %#x\n", boothowto);
359 #endif
360
361 /*
362 * Reserve pages from the VM system.
363 * to maintain mem_clusters[] as a map of raw ram,
364 * copy into temporary table vm_clusters[]
365 * work on that and use it to feed vm_physload()
366 */
367 KASSERT(sizeof(mem_clusters) == sizeof(vm_clusters));
368 memcpy(&vm_clusters, &mem_clusters, sizeof(vm_clusters));
369 vm_cluster_cnt = mem_cluster_cnt;
370
371 /* reserve 0..start..kernend pages */
372 vm_cluster_cnt = ram_seg_resv(vm_clusters, vm_cluster_cnt,
373 0, round_page(MIPS_KSEG0_TO_PHYS(kernend)));
374
375 /* reserve reset exception vector page */
376 /* should never be in our clusters anyway... */
377 vm_cluster_cnt = ram_seg_resv(vm_clusters, vm_cluster_cnt,
378 MIPS_RESET_EXC_VEC, MIPS_RESET_EXC_VEC+NBPG);
379
380 /*
381 * Load vm_clusters[] into the VM system.
382 */
383 for (u_int i=0; i < vm_cluster_cnt; i++) {
384 u_quad_t first, last;
385
386 first = trunc_page(vm_clusters[i].start);
387 last = round_page(vm_clusters[i].start + vm_clusters[i].size);
388 DPRINTF(("%s: %d: %#"PRIx64", %#"PRIx64"\n",
389 __func__, i, first, last));
390
391 uvm_page_physload(atop(first), atop(last), atop(first),
392 atop(last), VM_FREELIST_DEFAULT);
393 }
394
395 /*
396 * Initialize error message buffer (at end of core).
397 */
398 mips_init_msgbuf();
399
400 pmap_bootstrap();
401
402 /*
403 * Allocate uarea page for lwp0 and set it.
404 */
405 mips_init_lwp0_uarea();
406
407 #if defined(DDB)
408 if (boothowto & RB_KDB)
409 Debugger();
410 #endif
411 }
412
413 /*
414 * ram_seg_resv - cut reserved regions out of segs, fragmenting as needed
415 *
416 * we simply build a new table of segs, then copy it back over the given one
417 * this is inefficient but simple and called only a few times
418 *
419 * note: 'last' here means 1st addr past the end of the segment (start+size)
420 */
421 static u_int
422 ram_seg_resv(phys_ram_seg_t *segs, u_int nsegs,
423 u_quad_t resv_first, u_quad_t resv_last)
424 {
425 u_quad_t first, last;
426 int new_nsegs=0;
427 int resv_flag;
428 phys_ram_seg_t new_segs[VM_PHYSSEG_MAX];
429
430 for (u_int i=0; i < nsegs; i++) {
431 resv_flag = 0;
432 first = trunc_page(segs[i].start);
433 last = round_page(segs[i].start + segs[i].size);
434
435 KASSERT(new_nsegs < VM_PHYSSEG_MAX);
436 if ((resv_first <= first) && (resv_last >= last)) {
437 /* whole segment is resverved */
438 continue;
439 }
440 if ((resv_first > first) && (resv_first < last)) {
441 u_quad_t new_last;
442
443 /*
444 * reserved start in segment
445 * salvage the leading fragment
446 */
447 resv_flag = 1;
448 new_last = last - (last - resv_first);
449 KASSERT (new_last > first);
450 new_segs[new_nsegs].start = first;
451 new_segs[new_nsegs].size = new_last - first;
452 new_nsegs++;
453 }
454 if ((resv_last > first) && (resv_last < last)) {
455 u_quad_t new_first;
456
457 /*
458 * reserved end in segment
459 * salvage the trailing fragment
460 */
461 resv_flag = 1;
462 new_first = first + (resv_last - first);
463 KASSERT (last > (new_first + NBPG));
464 new_segs[new_nsegs].start = new_first;
465 new_segs[new_nsegs].size = last - new_first;
466 new_nsegs++;
467 }
468 if (resv_flag == 0) {
469 /*
470 * nothing reserved here, take it all
471 */
472 new_segs[new_nsegs].start = first;
473 new_segs[new_nsegs].size = last - first;
474 new_nsegs++;
475 }
476
477 }
478
479 memcpy(segs, new_segs, sizeof(new_segs));
480
481 return new_nsegs;
482 }
483
484 /*
485 * create an extent for physical address space
486 * these are in units of MB for sake of compression (for sake of 32 bit kernels)
487 * allocate the regions where we have known functions (DRAM, IO, etc)
488 * what remains can be allocated as needed for other stuff
489 * e.g. to configure BARs that are not already initialized and enabled.
490 */
491 static void
492 rmixl_physaddr_init(void)
493 {
494 struct extent *ext;
495 unsigned long start = 0UL;
496 unsigned long end = (__BIT(40) / (1024 * 1024)) -1;
497 u_long base;
498 u_long size;
499 uint32_t r;
500
501 ext = extent_create("physaddr", start, end, M_DEVBUF,
502 (void *)rmixl_physaddr_storage, sizeof(rmixl_physaddr_storage),
503 EX_NOWAIT | EX_NOCOALESCE);
504
505 if (ext == NULL)
506 panic("%s: extent_create failed", __func__);
507
508 /*
509 * grab regions per DRAM BARs
510 */
511 for (u_int i=0; i < RMIXL_SBC_DRAM_NBARS; i++) {
512 r = RMIXL_IOREG_READ(RMIXL_SBC_DRAM_BAR(i));
513 if ((r & RMIXL_DRAM_BAR_STATUS) == 0)
514 continue; /* not enabled */
515 base = (u_long)(DRAM_BAR_TO_BASE((uint64_t)r) / (1024 * 1024));
516 size = (u_long)(DRAM_BAR_TO_SIZE((uint64_t)r) / (1024 * 1024));
517
518 DPRINTF(("%s: %d: %d: 0x%08x -- 0x%010lx:%lu MB\n",
519 __func__, __LINE__, i, r, base * (1024 * 1024), size));
520 if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
521 panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
522 "failed", __func__, ext, base, size, EX_NOWAIT);
523 }
524
525 /*
526 * grab regions per PCIe CFG, ECFG, IO, MEM BARs
527 */
528 r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_CFG_BAR);
529 if ((r & RMIXL_PCIE_CFG_BAR_ENB) != 0) {
530 base = (u_long)(RMIXL_PCIE_CFG_BAR_TO_BA((uint64_t)r)
531 / (1024 * 1024));
532 size = (u_long)RMIXL_PCIE_CFG_SIZE / (1024 * 1024);
533 DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
534 __LINE__, "CFG", r, base * 1024 * 1024, size));
535 if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
536 panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
537 "failed", __func__, ext, base, size, EX_NOWAIT);
538 }
539 r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_ECFG_BAR);
540 if ((r & RMIXL_PCIE_ECFG_BAR_ENB) != 0) {
541 base = (u_long)(RMIXL_PCIE_ECFG_BAR_TO_BA((uint64_t)r)
542 / (1024 * 1024));
543 size = (u_long)RMIXL_PCIE_ECFG_SIZE / (1024 * 1024);
544 DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
545 __LINE__, "ECFG", r, base * 1024 * 1024, size));
546 if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
547 panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
548 "failed", __func__, ext, base, size, EX_NOWAIT);
549 }
550 r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_MEM_BAR);
551 if ((r & RMIXL_PCIE_MEM_BAR_ENB) != 0) {
552 base = (u_long)(RMIXL_PCIE_MEM_BAR_TO_BA((uint64_t)r)
553 / (1024 * 1024));
554 size = (u_long)(RMIXL_PCIE_MEM_BAR_TO_SIZE((uint64_t)r)
555 / (1024 * 1024));
556 DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
557 __LINE__, "MEM", r, base * 1024 * 1024, size));
558 if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
559 panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
560 "failed", __func__, ext, base, size, EX_NOWAIT);
561 }
562 r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_IO_BAR);
563 if ((r & RMIXL_PCIE_IO_BAR_ENB) != 0) {
564 base = (u_long)(RMIXL_PCIE_IO_BAR_TO_BA((uint64_t)r)
565 / (1024 * 1024));
566 size = (u_long)(RMIXL_PCIE_IO_BAR_TO_SIZE((uint64_t)r)
567 / (1024 * 1024));
568 DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
569 __LINE__, "IO", r, base * 1024 * 1024, size));
570 if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
571 panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
572 "failed", __func__, ext, base, size, EX_NOWAIT);
573 }
574
575 /*
576 * at this point all regions left in "physaddr" extent
577 * are unused holes in the physical adress space
578 * available for use as needed.
579 */
580 rmixl_configuration.rc_phys_ex = ext;
581 #ifdef MACHDEP_DEBUG
582 extent_print(ext);
583 #endif
584 }
585
586 static u_long
587 rmixlfw_init(int64_t infop)
588 {
589 struct rmixl_config *rcp = &rmixl_configuration;
590
591 strcpy(cpu_model, "RMI XLS616ATX VIIA"); /* XXX */
592
593 infop |= MIPS_KSEG0_START;
594 rmixlfw_info = *(rmixlfw_info_t *)(intptr_t)infop;
595
596 for (int i=0; i < RMICLFW_PSB_VERSIONS_LEN; i++) {
597 if (rmiclfw_psb_versions[i] == rmixlfw_info.psb_version)
598 goto found;
599 }
600
601 rcp->rc_io_pbase = RMIXL_IO_DEV_PBASE;
602 rmixl_putchar_init(rcp->rc_io_pbase);
603
604 #ifdef DIAGNOSTIC
605 rmixl_puts("\r\nWARNING: untested psb_version: ");
606 rmixl_puthex64(rmixlfw_info.psb_version);
607 rmixl_puts("\r\n");
608 #endif
609
610 /* XXX trust and use MEMSIZE */
611 mem_clusters[0].start = 0;
612 mem_clusters[0].size = MEMSIZE;
613 mem_cluster_cnt = 1;
614 return MEMSIZE;
615
616 found:
617 rcp->rc_io_pbase = MIPS_KSEG1_TO_PHYS(rmixlfw_info.io_base);
618 rmixl_putchar_init(rcp->rc_io_pbase);
619 #ifdef MACHDEP_DEBUG
620 rmixl_puts("\r\ninfop: ");
621 rmixl_puthex64((uint64_t)(intptr_t)infop);
622 #endif
623 #ifdef DIAGNOSTIC
624 rmixl_puts("\r\nrecognized psb_version: ");
625 rmixl_puthex64(rmixlfw_info.psb_version);
626 rmixl_puts("\r\n");
627 #endif
628
629 return mem_clusters_init(
630 (rmixlfw_mmap_t *)(intptr_t)rmixlfw_info.psb_physaddr_map,
631 (rmixlfw_mmap_t *)(intptr_t)rmixlfw_info.avail_mem_map);
632 }
633
634 void
635 rmixlfw_mmap_print(rmixlfw_mmap_t *map)
636 {
637 #ifdef MACHDEP_DEBUG
638 for (uint32_t i=0; i < map->nmmaps; i++) {
639 rmixl_puthex32(i);
640 rmixl_puts(", ");
641 rmixl_puthex64(map->entry[i].start);
642 rmixl_puts(", ");
643 rmixl_puthex64(map->entry[i].size);
644 rmixl_puts(", ");
645 rmixl_puthex32(map->entry[i].type);
646 rmixl_puts("\r\n");
647 }
648 #endif
649 }
650
651 /*
652 * mem_clusters_init
653 *
654 * initialize mem_clusters[] table based on memory address mapping
655 * provided by boot firmware.
656 *
657 * prefer avail_mem_map if we can, otherwise use psb_physaddr_map.
658 * these will be limited by MEMSIZE if it is configured.
659 * if neither are available, just use MEMSIZE.
660 */
661 static u_long
662 mem_clusters_init(
663 rmixlfw_mmap_t *psb_physaddr_map,
664 rmixlfw_mmap_t *avail_mem_map)
665 {
666 rmixlfw_mmap_t *map = NULL;
667 const char *mapname;
668 uint64_t tmp;
669 uint64_t sz;
670 uint64_t sum;
671 u_int cnt;
672 #ifdef MEMSIZE
673 u_long memsize = MEMSIZE;
674 #endif
675
676 #ifdef MACHDEP_DEBUG
677 rmixl_puts("psb_physaddr_map: ");
678 rmixl_puthex64((uint64_t)(intptr_t)psb_physaddr_map);
679 rmixl_puts("\r\n");
680 #endif
681 if (psb_physaddr_map != NULL) {
682 rmixlfw_phys_mmap = *psb_physaddr_map;
683 map = &rmixlfw_phys_mmap;
684 mapname = "psb_physaddr_map";
685 rmixlfw_mmap_print(map);
686 }
687 #ifdef DIAGNOSTIC
688 else {
689 rmixl_puts("WARNING: no psb_physaddr_map\r\n");
690 }
691 #endif
692
693 #ifdef MACHDEP_DEBUG
694 rmixl_puts("avail_mem_map: ");
695 rmixl_puthex64((uint64_t)(intptr_t)avail_mem_map);
696 rmixl_puts("\r\n");
697 #endif
698 if (avail_mem_map != NULL) {
699 rmixlfw_avail_mmap = *avail_mem_map;
700 map = &rmixlfw_avail_mmap;
701 mapname = "avail_mem_map";
702 rmixlfw_mmap_print(map);
703 }
704 #ifdef DIAGNOSTIC
705 else {
706 rmixl_puts("WARNING: no avail_mem_map\r\n");
707 }
708 #endif
709
710 if (map == NULL) {
711 #ifndef MEMSIZE
712 rmixl_puts("panic: no firmware memory map, "
713 "must configure MEMSIZE\r\n");
714 for(;;); /* XXX */
715 #else
716 #ifdef DIAGNOSTIC
717 rmixl_puts("WARNING: no avail_mem_map, "
718 "using MEMSIZE\r\n");
719 #endif
720
721 mem_clusters[0].start = 0;
722 mem_clusters[0].size = MEMSIZE;
723 mem_cluster_cnt = 1;
724 return MEMSIZE;
725 #endif /* MEMSIZE */
726 }
727
728 #ifdef DIAGNOSTIC
729 rmixl_puts("using ");
730 rmixl_puts(mapname);
731 rmixl_puts("\r\n");
732 #endif
733 #ifdef MACHDEP_DEBUG
734 rmixl_puts("memory clusters:\r\n");
735 #endif
736 sum = 0;
737 cnt = 0;
738 for (uint32_t i=0; i < map->nmmaps; i++) {
739 if (map->entry[i].type != RMIXLFW_MMAP_TYPE_RAM)
740 continue;
741 mem_clusters[cnt].start = map->entry[i].start;
742 sz = map->entry[i].size;
743 sum += sz;
744 mem_clusters[cnt].size = sz;
745 #ifdef MACHDEP_DEBUG
746 rmixl_puthex32(i);
747 rmixl_puts(": ");
748 rmixl_puthex64(mem_clusters[cnt].start);
749 rmixl_puts(", ");
750 rmixl_puthex64(sz);
751 rmixl_puts(": ");
752 rmixl_puthex64(sum);
753 rmixl_puts("\r\n");
754 #endif
755 #ifdef MEMSIZE
756 /*
757 * configurably limit memsize
758 */
759 if (sum == memsize)
760 break;
761 if (sum > memsize) {
762 tmp = sum - memsize;
763 sz -= tmp;
764 sum -= tmp;
765 mem_clusters[cnt].size = sz;
766 break;
767 }
768 #endif
769 cnt++;
770 }
771 mem_cluster_cnt = cnt;
772 return sum;
773 }
774
775 void
776 consinit(void)
777 {
778
779 /*
780 * Everything related to console initialization is done
781 * in mach_init().
782 */
783 }
784
785 /*
786 * Allocate memory for variable-sized tables,
787 */
788 void
789 cpu_startup()
790 {
791 vaddr_t minaddr, maxaddr;
792 char pbuf[9];
793
794 /*
795 * Good {morning,afternoon,evening,night}.
796 */
797 printf("%s%s", copyright, version);
798 format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
799 printf("total memory = %s\n", pbuf);
800
801 /*
802 * Virtual memory is bootstrapped -- notify the bus spaces
803 * that memory allocation is now safe.
804 */
805 rmixl_configuration.rc_mallocsafe = 1;
806
807 minaddr = 0;
808 /*
809 * Allocate a submap for physio.
810 */
811 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
812 VM_PHYS_SIZE, 0, FALSE, NULL);
813
814 /*
815 * (No need to allocate an mbuf cluster submap. Mbuf clusters
816 * are allocated via the pool allocator, and we use XKSEG to
817 * map those pages.)
818 */
819
820 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
821 printf("avail memory = %s\n", pbuf);
822 }
823
824 int waittime = -1;
825
826 void
827 cpu_reboot(int howto, char *bootstr)
828 {
829
830 /* Take a snapshot before clobbering any registers. */
831 if (curproc)
832 savectx(curpcb);
833
834 if (cold) {
835 howto |= RB_HALT;
836 goto haltsys;
837 }
838
839 /* If "always halt" was specified as a boot flag, obey. */
840 if (boothowto & RB_HALT)
841 howto |= RB_HALT;
842
843 boothowto = howto;
844 if ((howto & RB_NOSYNC) == 0 && (waittime < 0)) {
845 waittime = 0;
846 vfs_shutdown();
847
848 /*
849 * If we've been adjusting the clock, the todr
850 * will be out of synch; adjust it now.
851 */
852 resettodr();
853 }
854
855 splhigh();
856
857 if (howto & RB_DUMP)
858 dumpsys();
859
860 haltsys:
861 doshutdownhooks();
862
863 if (howto & RB_HALT) {
864 printf("\n");
865 printf("The operating system has halted.\n");
866 printf("Please press any key to reboot.\n\n");
867 cnpollc(1); /* For proper keyboard command handling */
868 cngetc();
869 cnpollc(0);
870 }
871
872 printf("rebooting...\n\n");
873
874 rmixl_exit(0);
875 }
876
877 /*
878 * goodbye world
879 */
880 #define GPIO_CPU_RST 0xa0 /* XXX TMP */
881 void __attribute__((__noreturn__))
882 rmixl_exit(int howto)
883 {
884 /* use firmware callbak to reboot */
885 void (*reset)(void) = (void *)(intptr_t)rmixlfw_info.warm_reset;
886 if (reset != 0) {
887 (*reset)();
888 printf("warm reset callback failed, spinning...\n");
889 } else {
890 printf("warm reset callback absent, spinning...\n");
891 }
892 for (;;);
893 }
894